/**
* Chordal register allocation.
* @author Sebastian Hack
- * @date 8.12.2004
+ * @date 8.12.2004
+ * @cvs-id $Id$
*
* Copyright (C) Universitaet Karlsruhe
* Released under the GPL
#include "irgwalk.h"
#include "irdump.h"
#include "irdom.h"
+#include "irtools.h"
#include "debug.h"
#include "xmalloc.h"
#include "bearch.h"
#include "beirgmod.h"
#include "beifg.h"
+#include "beinsn_t.h"
#include "bechordal_t.h"
#include "bechordal_draw.h"
#define NO_COLOR (-1)
-#define MAX(x, y) ((x) > (y) ? (x) : (y))
-#define MIN(x, y) ((x) < (y) ? (x) : (y))
-
#define DUMP_INTERVALS
typedef struct _be_chordal_alloc_env_t {
be_chordal_env_t *chordal_env;
- firm_dbg_module_t *constr_dbg; /**< Debug output for the constraint handler. */
pset *pre_colored; /**< Set of precolored nodes. */
bitset_t *live; /**< A liveness bitset. */
bitset_t *tmp_colors; /**< An auxiliary bitset which is as long as the number of colors in the class. */
bitset_t *colors; /**< The color mask. */
bitset_t *in_colors; /**< Colors used by live in values. */
- bitset_t *ignore_regs; /**< A bitset of all ignore registers in the current class. */
int colors_n; /**< The number of colors. */
+ DEBUG_ONLY(firm_dbg_module_t *constr_dbg;) /**< Debug output for the constraint handler. */
} be_chordal_alloc_env_t;
#include "fourcc.h"
/* Make a fourcc for border checking. */
#define BORDER_FOURCC FOURCC('B', 'O', 'R', 'D')
+#if 0
static void check_border_list(struct list_head *head)
{
border_t *x;
check_border_list(ent->value);
}
}
-
+#endif
/**
* Add an interval border to the list of a block's list
*/
static INLINE int has_reg_class(const be_chordal_env_t *env, const ir_node *irn)
{
- // return arch_irn_has_reg_class(env->main_env->arch_env, irn, -1, env->cls);
- return arch_irn_consider_in_reg_alloc(env->birg->main_env->arch_env, env->cls, irn);
+ return arch_irn_has_reg_class(env->birg->main_env->arch_env, irn, -1, env->cls);
+ // return arch_irn_consider_in_reg_alloc(env->birg->main_env->arch_env, env->cls, irn);
}
#define has_limited_constr(req, irn) \
{
bitset_t *tmp = alloc_env->tmp_colors;
bitset_copy(tmp, colors);
- bitset_or(tmp, alloc_env->ignore_regs);
+ bitset_or(tmp, alloc_env->chordal_env->ignore_colors);
return bitset_next_clear(tmp, 0);
}
-typedef struct _operand_t operand_t;
-
-struct _operand_t {
- ir_node *irn;
- ir_node *carrier;
- operand_t *partner;
- bitset_t *regs;
- int pos;
- arch_register_req_t req;
- unsigned has_constraints : 1;
-};
-
-typedef struct {
- operand_t *ops;
- int n_ops;
- int use_start;
- ir_node *next_insn;
- ir_node *irn;
- unsigned in_constraints : 1;
- unsigned out_constraints : 1;
- unsigned has_constraints : 1;
- unsigned pre_colored : 1;
-} insn_t;
-
-#define insn_n_defs(insn) ((insn)->use_start)
-#define insn_n_uses(insn) ((insn)->n_ops - (insn)->use_start)
-
-static insn_t *scan_insn(be_chordal_alloc_env_t *alloc_env, ir_node *irn, struct obstack *obst)
-{
- const be_chordal_env_t *env = alloc_env->chordal_env;
- const arch_env_t *arch_env = env->birg->main_env->arch_env;
- operand_t o;
- insn_t *insn;
- int i, n;
- int pre_colored = 0;
-
- insn = obstack_alloc(obst, sizeof(insn[0]));
- memset(insn, 0, sizeof(insn[0]));
-
- insn->irn = irn;
- insn->next_insn = sched_next(irn);
- if(get_irn_mode(irn) == mode_T) {
- ir_node *p;
-
- for(p = sched_next(irn); is_Proj(p); p = sched_next(p)) {
- if(arch_irn_consider_in_reg_alloc(arch_env, env->cls, p)) {
- arch_get_register_req(arch_env, &o.req, p, -1);
- o.carrier = p;
- o.irn = irn;
- o.pos = -(get_Proj_proj(p) + 1);
- o.partner = NULL;
- o.has_constraints = arch_register_req_is(&o.req, limited);
- obstack_grow(obst, &o, sizeof(o));
- insn->n_ops++;
- insn->out_constraints |= o.has_constraints;
- pre_colored += arch_get_irn_register(arch_env, p) != NULL;
- }
- }
-
- insn->next_insn = p;
- }
-
- else if(arch_irn_consider_in_reg_alloc(arch_env, env->cls, irn)) {
- arch_get_register_req(arch_env, &o.req, irn, -1);
- o.carrier = irn;
- o.irn = irn;
- o.pos = -1;
- o.partner = NULL;
- o.has_constraints = arch_register_req_is(&o.req, limited);
- obstack_grow(obst, &o, sizeof(o));
- insn->n_ops++;
- insn->out_constraints |= o.has_constraints;
- pre_colored += arch_get_irn_register(arch_env, irn) != NULL;
- }
-
- insn->pre_colored = pre_colored == insn->n_ops && insn->n_ops > 0;
- insn->use_start = insn->n_ops;
-
- for(i = 0, n = get_irn_arity(irn); i < n; ++i) {
- ir_node *op = get_irn_n(irn, i);
-
- if(arch_irn_consider_in_reg_alloc(arch_env, env->cls, op)) {
- arch_get_register_req(arch_env, &o.req, irn, i);
- o.carrier = op;
- o.irn = irn;
- o.pos = i;
- o.partner = NULL;
- o.has_constraints = arch_register_req_is(&o.req, limited);
- obstack_grow(obst, &o, sizeof(o));
- insn->n_ops++;
- insn->in_constraints |= o.has_constraints;
- }
- }
-
- insn->has_constraints = insn->in_constraints | insn->out_constraints;
- insn->ops = obstack_finish(obst);
-
- /* Compute the admissible registers bitsets. */
- for(i = 0; i < insn->n_ops; ++i) {
- operand_t *op = &insn->ops[i];
-
- assert(op->req.cls == env->cls);
- op->regs = bitset_obstack_alloc(obst, env->cls->n_regs);
-
- if(arch_register_req_is(&op->req, limited)) {
- op->req.limited(op->req.limited_env, op->regs);
- bitset_andnot(op->regs, alloc_env->ignore_regs);
- }
- else
- arch_put_non_ignore_regs(env->birg->main_env->arch_env, env->cls, op->regs);
- }
-
- return insn;
-}
-
-static bitset_t *get_decisive_partner_regs(bitset_t *bs, const operand_t *o1, const operand_t *o2)
+static bitset_t *get_decisive_partner_regs(bitset_t *bs, const be_operand_t *o1, const be_operand_t *o2)
{
bitset_t *res = bs;
return res;
}
-static void pair_up_operands(const be_chordal_alloc_env_t *alloc_env, insn_t *insn)
+static be_insn_t *chordal_scan_insn(be_chordal_env_t *env, ir_node *irn)
+{
+ be_insn_env_t ie;
+
+ ie.ignore_colors = env->ignore_colors;
+ ie.aenv = env->birg->main_env->arch_env;
+ ie.obst = &env->obst;
+ ie.cls = env->cls;
+ return be_scan_insn(&ie, irn);
+}
+
+static ir_node *prepare_constr_insn(be_chordal_env_t *env, ir_node *irn)
+{
+ be_insn_t *insn = chordal_scan_insn(env, irn);
+ int i;
+
+ if(!insn->has_constraints)
+ goto end;
+
+ for(i = insn->use_start; i < insn->n_ops; ++i) {
+ be_operand_t *op = &insn->ops[i];
+ if(op->has_constraints && values_interfere(env->lv, insn->irn, op->carrier)) {
+ ir_node *bl = get_nodes_block(insn->irn);
+ ir_node *copy = be_new_Copy(env->cls, env->irg, bl, op->carrier);
+
+ sched_add_before(insn->irn, copy);
+ set_irn_n(insn->irn, op->pos, copy);
+ DBG((env->dbg, LEVEL_3, "inserting constr copy %+F for %+F pos %d\n", copy, insn->irn, op->pos));
+ be_liveness_update(env->lv, op->carrier);
+ }
+ }
+
+end:
+ obstack_free(&env->obst, insn);
+ return insn->next_insn;
+}
+
+static void pre_spill_prepare_constr_walker(ir_node *bl, void *data)
+{
+ be_chordal_env_t *env = data;
+ ir_node *irn;
+ for(irn = sched_first(bl); !sched_is_end(irn);) {
+ irn = prepare_constr_insn(env, irn);
+ }
+}
+
+void be_pre_spill_prepare_constr(be_chordal_env_t *cenv) {
+ irg_block_walk_graph(cenv->irg, pre_spill_prepare_constr_walker, NULL, (void *) cenv);
+}
+
+static void pair_up_operands(const be_chordal_alloc_env_t *alloc_env, be_insn_t *insn)
{
const be_chordal_env_t *env = alloc_env->chordal_env;
- const arch_env_t *aenv = env->birg->main_env->arch_env;
- firm_dbg_module_t *dbg = alloc_env->constr_dbg;
- int n_uses = insn_n_uses(insn);
- int n_defs = insn_n_defs(insn);
- int max_pairs = MIN(n_uses, n_defs);
- bitset_t *bs = bitset_alloca(env->cls->n_regs);
- bipartite_t *bp = bipartite_new(n_defs, n_uses);
- int *pairing = alloca(MAX(n_defs, n_uses) * sizeof(pairing[0]));
+ int n_uses = be_insn_n_uses(insn);
+ int n_defs = be_insn_n_defs(insn);
+ bitset_t *bs = bitset_alloca(env->cls->n_regs);
+ int *pairing = alloca(MAX(n_defs, n_uses) * sizeof(pairing[0]));
int i, j;
For each out operand, try to find an in operand which can be assigned the
same register as the out operand.
*/
- for(j = 0; j < insn->use_start; ++j) {
- operand_t *out_op = &insn->ops[j];
+ for (j = 0; j < insn->use_start; ++j) {
+ int smallest = -1;
+ int smallest_n_regs = 2 * env->cls->n_regs + 1;
+ be_operand_t *out_op = &insn->ops[j];
/* Try to find an in operand which has ... */
for(i = insn->use_start; i < insn->n_ops; ++i) {
- const operand_t *op = &insn->ops[i];
-
- /*
- The in operand can only be paired with a def, if the node defining the
- operand's value does not interfere with the instruction itself. That
- would mean, that it is live at the instruction, so no result of the instruction
- can have the same register as the operand.
-
- Furthermore, tow operands can be paired, if the admissible registers
- of one are a subset of the other's. We record the operand whose constraints
- count in the decisive array.
- */
- if(!values_interfere(op->irn, op->carrier)) {
- if(get_decisive_partner_regs(bs, out_op, op))
- bipartite_add(bp, j, i - insn->use_start);
+ int n_total;
+ const be_operand_t *op = &insn->ops[i];
+
+ if (! values_interfere(env->lv, op->irn, op->carrier) && ! op->partner) {
+ bitset_clear_all(bs);
+ bitset_copy(bs, op->regs);
+ bitset_and(bs, out_op->regs);
+ n_total = bitset_popcnt(op->regs) + bitset_popcnt(out_op->regs);
+
+ if (bitset_popcnt(bs) > 0 && n_total < smallest_n_regs) {
+ smallest = i;
+ smallest_n_regs = n_total;
+ }
}
}
- }
- /* Compute the pairing. */
- bipartite_matching(bp, pairing);
- for(i = 0; i < insn->use_start; ++i) {
- int p = pairing[i] + insn->use_start;
-
- if(p >= insn->use_start) {
- insn->ops[i].partner = &insn->ops[p];
- insn->ops[p].partner = &insn->ops[i];
+ if (smallest >= 0) {
+ be_operand_t *partner = &insn->ops[smallest];
+ out_op->partner = partner;
+ partner->partner = out_op;
}
}
-
- bipartite_free(bp);
}
-static ir_node *pre_process_constraints(be_chordal_alloc_env_t *alloc_env, insn_t **the_insn)
+static ir_node *pre_process_constraints(be_chordal_alloc_env_t *alloc_env, be_insn_t **the_insn)
{
be_chordal_env_t *env = alloc_env->chordal_env;
const arch_env_t *aenv = env->birg->main_env->arch_env;
- firm_dbg_module_t *dbg = alloc_env->constr_dbg;
- insn_t *insn = *the_insn;
+ be_insn_t *insn = *the_insn;
ir_node *bl = get_nodes_block(insn->irn);
ir_node *copy = NULL;
ir_node *perm = NULL;
bitset_t *out_constr = bitset_alloca(env->cls->n_regs);
bitset_t *bs = bitset_alloca(env->cls->n_regs);
+ DEBUG_ONLY(firm_dbg_module_t *dbg = alloc_env->constr_dbg;)
int i;
be copied.
*/
for(i = 0; i < insn->use_start; ++i) {
- operand_t *op = &insn->ops[i];
+ be_operand_t *op = &insn->ops[i];
if(op->has_constraints)
bitset_or(out_constr, op->regs);
}
Now, figure out which input operand must be copied since it has input
constraints which are also output constraints.
*/
+ (void) bl;
+ (void) copy;
+ (void) bs;
+ (void) dbg;
+#if 0
for(i = insn->use_start; i < insn->n_ops; ++i) {
- operand_t *op = &insn->ops[i];
- if(op->has_constraints && (values_interfere(op->carrier, insn->irn) || arch_irn_is(aenv, op->carrier, ignore))) {
+ be_operand_t *op = &insn->ops[i];
+ if(op->has_constraints && (values_interfere(env->lv, op->carrier, insn->irn) || arch_irn_is(aenv, op->carrier, ignore))) {
bitset_copy(bs, op->regs);
bitset_and(bs, out_constr);
which also occur as output constraints, so insert a copy.
*/
if(bitset_popcnt(bs) > 0) {
- copy = be_new_Copy(op->req.cls, env->irg, bl, op->carrier);
- insn->ops[i].carrier = copy;
+ copy = be_new_Copy(op->req.cls, env->irg, bl, op->carrier);
+ op->carrier = copy;
sched_add_before(insn->irn, copy);
+ set_irn_n(insn->irn, op->pos, op->carrier);
DBG((dbg, LEVEL_2, "adding copy for interfering and constrained op %+F\n", op->carrier));
}
}
}
+#endif
/*
Make the Perm, recompute liveness and re-scan the insn since the
in operands are now the Projs of the Perm.
*/
- perm = insert_Perm_after(aenv, env->cls, env->dom_front, sched_prev(insn->irn));
+ perm = insert_Perm_after(aenv, env->lv, env->cls, env->dom_front, sched_prev(insn->irn));
/* Registers are propagated by insert_Perm_after(). Clean them here! */
if(perm) {
the Perm. Recomputing liveness is also a good idea if a Perm is inserted, since
the live sets may change.
*/
- be_liveness(env->irg);
+ // be_liveness_recompute(env->lv);
obstack_free(&env->obst, insn);
- *the_insn = insn = scan_insn(alloc_env, insn->irn, &env->obst);
+ *the_insn = insn = chordal_scan_insn(env, insn->irn);
/*
Copy the input constraints of the insn to the Perm as output
constraints. Succeeding phases (coalescing will need that).
*/
for(i = insn->use_start; i < insn->n_ops; ++i) {
- operand_t *op = &insn->ops[i];
+ be_operand_t *op = &insn->ops[i];
ir_node *proj = op->carrier;
/*
Note that the predecessor must not be a Proj of the Perm,
return perm;
}
-static ir_node *handle_constraints(be_chordal_alloc_env_t *alloc_env, ir_node *irn)
+static ir_node *handle_constraints(be_chordal_alloc_env_t *alloc_env, ir_node *irn, int *silent)
{
be_chordal_env_t *env = alloc_env->chordal_env;
void *base = obstack_base(&env->obst);
- insn_t *insn = scan_insn(alloc_env, irn, &env->obst);
+ be_insn_t *insn = chordal_scan_insn(env, irn);
ir_node *res = insn->next_insn;
+ int be_silent = *silent;
if(insn->pre_colored) {
int i;
pset_insert_ptr(alloc_env->pre_colored, insn->ops[i].carrier);
}
- if(be_is_Perm(irn) || be_is_RegParams(irn) || (be_is_Barrier(irn) && !insn->in_constraints))
+ /*
+ If the current node is a barrier toggle the silent flag.
+ If we are in the start block, we are ought to be silent at the beginning,
+ so the toggling activates the constraint handling but skips the barrier.
+ If we are in the end block we handle the in requirements of the barrier
+ and set the rest to silent.
+ */
+ if(be_is_Barrier(irn))
+ *silent = !*silent;
+
+ if(be_silent)
goto end;
/*
correctly precolored. These Perms arise during the ABI handling phase.
*/
if(insn->has_constraints) {
- firm_dbg_module_t *dbg = alloc_env->constr_dbg;
const arch_env_t *aenv = env->birg->main_env->arch_env;
int n_regs = env->cls->n_regs;
bitset_t *bs = bitset_alloca(n_regs);
- bitset_t *non_ignore = bitset_alloca(n_regs);
ir_node **alloc_nodes = alloca(n_regs * sizeof(alloc_nodes[0]));
bipartite_t *bp = bipartite_new(n_regs, n_regs);
int *assignment = alloca(n_regs * sizeof(assignment[0]));
pmap *partners = pmap_create();
+ DEBUG_ONLY(firm_dbg_module_t *dbg = alloc_env->constr_dbg;)
int i, n_alloc;
long col;
to a bipartite graph (left: nodes with partners, right: admissible colors).
*/
for(i = 0, n_alloc = 0; i < insn->n_ops; ++i) {
- operand_t *op = &insn->ops[i];
+ be_operand_t *op = &insn->ops[i];
/*
If the operand has no partner or the partner has not been marked
assert(is_Proj(proj));
- if(values_interfere(proj, irn)) {
+ if(values_interfere(env->lv, proj, irn) && !pmap_contains(partners, proj)) {
assert(n_alloc < n_regs);
alloc_nodes[n_alloc] = proj;
pmap_insert(partners, proj, NULL);
}
}
+ bipartite_free(bp);
pmap_destroy(partners);
}
/**
* Handle constraint nodes in each basic block.
- * be_insert_constr_perms() inserts Perm nodes which perm
+ * handle_constraints() inserts Perm nodes which perm
* over all values live at the constrained node right in front
* of the constrained node. These Perms signal a constrained node.
- * For further comments, refer to handle_constraints_at_perm().
+ * For further comments, refer to handle_constraints().
*/
static void constraints(ir_node *bl, void *data)
{
- firm_dbg_module_t *dbg = firm_dbg_register("firm.be.chordal.constr");
be_chordal_alloc_env_t *env = data;
- arch_env_t *arch_env = env->chordal_env->birg->main_env->arch_env;
+
+ /*
+ Start silent in the start block.
+ The silence remains until the first barrier is seen.
+ Each other block is begun loud.
+ */
+ int silent = bl == get_irg_start_block(get_irn_irg(bl));
ir_node *irn;
+ /*
+ If the block is the start block search the barrier and
+ start handling constraints from there.
+ */
+
for(irn = sched_first(bl); !sched_is_end(irn);) {
- irn = handle_constraints(env, irn);
+ irn = handle_constraints(env, irn, &silent);
}
}
be_chordal_alloc_env_t *alloc_env = env_ptr;
be_chordal_env_t *env = alloc_env->chordal_env;
- const arch_env_t *arch_env = env->birg->main_env->arch_env;
bitset_t *live = alloc_env->live;
- firm_dbg_module_t *dbg = env->dbg;
ir_node *irn;
+ DEBUG_ONLY(firm_dbg_module_t *dbg = env->dbg;)
int i, n;
unsigned step = 0;
unsigned pressure = 0;
struct list_head *head;
- pset *live_in = put_live_in(block, pset_new_ptr_default());
- pset *live_end = put_live_end(block, pset_new_ptr_default());
+ pset *live_in = be_lv_pset_put_in(env->lv, block, pset_new_ptr_default());
+ pset *live_end = be_lv_pset_put_end(env->lv, block, pset_new_ptr_default());
DBG((dbg, LEVEL_1, "Computing pressure in block %+F\n", block));
bitset_clear_all(live);
* Make final uses of all values live out of the block.
* They are necessary to build up real intervals.
*/
- for(irn = pset_first(live_end); irn; irn = pset_next(live_end)) {
+ foreach_pset(live_end, irn) {
if(has_reg_class(env, irn)) {
- DBG((dbg, LEVEL_3, "\tMaking live: %+F/%d\n", irn, get_irn_graph_nr(irn)));
- bitset_set(live, get_irn_graph_nr(irn));
+ DBG((dbg, LEVEL_3, "\tMaking live: %+F/%d\n", irn, get_irn_idx(irn)));
+ bitset_set(live, get_irn_idx(irn));
border_use(irn, step, 0);
}
}
*/
sched_foreach_reverse(block, irn) {
DBG((dbg, LEVEL_1, "\tinsn: %+F, pressure: %d\n", irn, pressure));
- DBG((dbg, LEVEL_2, "\tlive: %b\n", live));
+ DBG((dbg, LEVEL_2, "\tlive: %B\n", live));
/*
* If the node defines some value, which can put into a
* register of the current class, make a border for it.
*/
if(has_reg_class(env, irn)) {
- int nr = get_irn_graph_nr(irn);
+ int nr = get_irn_idx(irn);
bitset_clear(live, nr);
border_def(irn, step, 1);
ir_node *op = get_irn_n(irn, i);
if(has_reg_class(env, op)) {
- int nr = get_irn_graph_nr(op);
-
- DBG((dbg, LEVEL_4, "\t\tpos: %d, use: %+F\n", i, op));
+ int nr = get_irn_idx(op);
+ const char *msg = "-";
if(!bitset_is_set(live, nr)) {
border_use(op, step, 1);
bitset_set(live, nr);
+ msg = "X";
}
+
+ DBG((dbg, LEVEL_4, "\t\t%s pos: %d, use: %+F\n", msg, i, op));
}
}
}
/*
* Add initial defs for all values live in.
*/
- for(irn = pset_first(live_in); irn; irn = pset_next(live_in)) {
+ foreach_pset(live_in, irn) {
if(has_reg_class(env, irn)) {
/* Mark the value live in. */
- bitset_set(live, get_irn_graph_nr(irn));
+ bitset_set(live, get_irn_idx(irn));
/* Add the def */
border_def(irn, step, 0);
}
}
-
- del_pset(live_in);
- del_pset(live_end);
+ del_pset(live_in);
+ del_pset(live_end);
}
static void assign(ir_node *block, void *env_ptr)
{
be_chordal_alloc_env_t *alloc_env = env_ptr;
be_chordal_env_t *env = alloc_env->chordal_env;
- firm_dbg_module_t *dbg = env->dbg;
bitset_t *live = alloc_env->live;
bitset_t *colors = alloc_env->colors;
bitset_t *in_colors = alloc_env->in_colors;
const arch_env_t *arch_env = env->birg->main_env->arch_env;
+ struct list_head *head = get_block_border_head(env, block);
+ pset *live_in = be_lv_pset_put_in(env->lv, block, pset_new_ptr_default());
const ir_node *irn;
border_t *b;
- struct list_head *head = get_block_border_head(env, block);
- pset *live_in = put_live_in(block, pset_new_ptr_default());
+ DEBUG_ONLY(firm_dbg_module_t *dbg = env->dbg;)
bitset_clear_all(colors);
bitset_clear_all(live);
DBG((dbg, LEVEL_4, "\tusedef chain for block\n"));
list_for_each_entry(border_t, b, head, list) {
DBG((dbg, LEVEL_4, "\t%s %+F/%d\n", b->is_def ? "def" : "use",
- b->irn, get_irn_graph_nr(b->irn)));
+ b->irn, get_irn_idx(b->irn)));
}
/*
* Since their colors have already been assigned (The dominators were
* allocated before), we have to mark their colors as used also.
*/
- for(irn = pset_first(live_in); irn; irn = pset_next(live_in)) {
+ foreach_pset(live_in, irn) {
if(has_reg_class(env, irn)) {
const arch_register_t *reg = arch_get_irn_register(arch_env, irn);
int col;
assert(reg && "Node must have been assigned a register");
col = arch_register_get_index(reg);
+ DBG((dbg, LEVEL_4, "%+F has reg %s\n", irn, reg->name));
+
/* Mark the color of the live in value as used. */
bitset_set(colors, col);
bitset_set(in_colors, col);
/* Mark the value live in. */
- bitset_set(live, get_irn_graph_nr(irn));
+ bitset_set(live, get_irn_idx(irn));
}
}
*/
list_for_each_entry_reverse(border_t, b, head, list) {
ir_node *irn = b->irn;
- int nr = get_irn_graph_nr(irn);
+ int nr = get_irn_idx(irn);
+ int ignore = arch_irn_is(arch_env, irn, ignore);
/*
* Assign a color, if it is a local def. Global defs already have a
* color.
*/
- if(b->is_def && !is_live_in(block, irn)) {
+ if(b->is_def && !be_is_live_in(env->lv, block, irn)) {
const arch_register_t *reg;
int col = NO_COLOR;
- if(pset_find_ptr(alloc_env->pre_colored, irn)) {
+ if(pset_find_ptr(alloc_env->pre_colored, irn) || ignore) {
reg = arch_get_irn_register(arch_env, irn);
col = reg->index;
assert(!bitset_is_set(colors, col) && "pre-colored register must be free");
col = get_next_free_reg(alloc_env, colors);
reg = arch_register_for_index(env->cls, col);
assert(arch_get_irn_register(arch_env, irn) == NULL && "This node must not have been assigned a register yet");
+ assert(!arch_register_type_is(reg, ignore) && "Must not assign ignore register");
}
bitset_set(colors, col);
-
- assert(!arch_register_type_is(reg, ignore) && "Must not assign ignore register");
arch_set_irn_register(arch_env, irn, reg);
- DBG((dbg, LEVEL_1, "\tassigning register %s(%d) to %+F\n",
- arch_register_get_name(reg), col, irn));
+ DBG((dbg, LEVEL_1, "\tassigning register %s(%d) to %+F\n", arch_register_get_name(reg), col, irn));
assert(!bitset_is_set(live, nr) && "Value's definition must not have been encountered");
bitset_set(live, nr);
{
be_chordal_alloc_env_t env;
char buf[256];
- int i;
int colors_n = arch_register_class_n_regs(chordal_env->cls);
ir_graph *irg = chordal_env->irg;
- if(get_irg_dom_state(irg) != dom_consistent)
- compute_doms(irg);
+ assure_doms(irg);
env.chordal_env = chordal_env;
env.colors_n = colors_n;
env.colors = bitset_alloca(colors_n);
env.tmp_colors = bitset_alloca(colors_n);
env.in_colors = bitset_alloca(colors_n);
- env.ignore_regs = bitset_alloca(colors_n);
env.pre_colored = pset_new_ptr_default();
- env.constr_dbg = firm_dbg_register("firm.be.chordal.constr");
+ FIRM_DBG_REGISTER(env.constr_dbg, "firm.be.chordal.constr");
- for(i = 0; i < colors_n; ++i)
- if(arch_register_type_is(&chordal_env->cls->regs[i], ignore))
- bitset_set(env.ignore_regs, i);
/* Handle register targeting constraints */
dom_tree_walk_irg(irg, constraints, NULL, &env);
}
be_numbering(irg);
- env.live = bitset_malloc(get_graph_node_count(chordal_env->irg));
+ env.live = bitset_malloc(get_irg_last_idx(chordal_env->irg));
/* First, determine the pressure */
dom_tree_walk_irg(irg, pressure, NULL, &env);
be_numbering_done(irg);
if(chordal_env->opts->dump_flags & BE_CH_DUMP_TREE_INTV) {
- plotter_t *plotter;
+ plotter_t *plotter;
ir_snprintf(buf, sizeof(buf), "ifg_%s_%F.eps", chordal_env->cls->name, irg);
- plotter = new_plotter_ps(buf);
- draw_interval_tree(&draw_chordal_def_opts, chordal_env, plotter);
- plotter_free(plotter);
+ plotter = new_plotter_ps(buf);
+ draw_interval_tree(&draw_chordal_def_opts, chordal_env, plotter);
+ plotter_free(plotter);
}
+ bitset_free(env.live);
del_pset(env.pre_colored);
}
projects / libfirm / blobdiff