/*
- * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
+ * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
*
* This file is part of libFirm.
*
else {
b = get_irn_link(irn);
- assert(b && b->magic == BORDER_FOURCC && "Illegal border encountered");
+ DEBUG_ONLY(assert(b && b->magic == BORDER_FOURCC && "Illegal border encountered"));
}
b->pressure = pressure;
if(a_op->carrier != op->carrier || !a_op->has_constraints)
continue;
+ /* if the constraint is the same, no copy is necessary
+ * TODO generalise unequal but overlapping constraints */
+ if (a_op->req == op->req)
+ continue;
+
if (be_is_Copy(get_irn_n(insn->irn, a_op->pos)))
continue;
}
}
- /* collect all registers occuring in out constraints. */
+ /* collect all registers occurring in out constraints. */
for(i = 0; i < insn->use_start; ++i) {
be_operand_t *op = &insn->ops[i];
if(op->has_constraints)
Check, if
1) the operand is constrained.
2) lives through the node.
- 3) is constrained to a register occuring in out constraints.
+ 3) is constrained to a register occurring in out constraints.
*/
if(!op->has_constraints ||
!values_interfere(birg, insn->irn, op->carrier) ||
int colors_n = arch_register_class_n_regs(cls);
ir_graph *irg = chordal_env->irg;
- int allocatable_regs = colors_n - be_put_ignore_regs(birg, cls, NULL);
-
- /* some special classes contain only ignore regs, no work to be done */
- if(allocatable_regs == 0)
- return;
be_assure_dom_front(birg);
lv = be_assure_liveness(birg);
env.in_colors = bitset_alloca(colors_n);
env.pre_colored = pset_new_ptr_default();
+ BE_TIMER_PUSH(t_constr);
+
/* Handle register targeting constraints */
dom_tree_walk_irg(irg, constraints, NULL, &env);
be_dump(chordal_env->irg, buf, dump_ir_block_graph_sched);
}
+ BE_TIMER_POP(t_constr);
+
env.live = bitset_malloc(get_irg_last_idx(chordal_env->irg));
/* First, determine the pressure */