/*
- * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
+ * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
*
* This file is part of libFirm.
*
#define DUMP_INTERVALS
-/* new style assign routine without borders. */
-#undef NEW_STYLE_ASSIGN
-
typedef struct _be_chordal_alloc_env_t {
be_chordal_env_t *chordal_env;
else {
b = get_irn_link(irn);
- assert(b && b->magic == BORDER_FOURCC && "Illegal border encountered");
+ DEBUG_ONLY(assert(b && b->magic == BORDER_FOURCC && "Illegal border encountered"));
}
b->pressure = pressure;
if(a_op->carrier != op->carrier || !a_op->has_constraints)
continue;
+ /* if the constraint is the same, no copy is necessary
+ * TODO generalise unequal but overlapping constraints */
+ if (a_op->req == op->req)
+ continue;
+
if (be_is_Copy(get_irn_n(insn->irn, a_op->pos)))
continue;
}
}
- /* collect all registers occuring in out constraints. */
+ /* collect all registers occurring in out constraints. */
for(i = 0; i < insn->use_start; ++i) {
be_operand_t *op = &insn->ops[i];
if(op->has_constraints)
Check, if
1) the operand is constrained.
2) lives through the node.
- 3) is constrained to a register occuring in out constraints.
+ 3) is constrained to a register occurring in out constraints.
*/
if(!op->has_constraints ||
- !values_interfere(birg, insn->irn, op->carrier) ||
- bitset_popcnt(tmp) == 0)
+ !values_interfere(birg, insn->irn, op->carrier) ||
+ bitset_popcnt(tmp) == 0)
continue;
/*
only create the copy if the operand is no copy.
this is necessary since the assure constraints phase inserts
- Copies and Keeps for operands which must be different from the results.
- Additional copies here would destroy this.
+ Copies and Keeps for operands which must be different from the
+ results. Additional copies here would destroy this.
*/
if (be_is_Copy(get_irn_n(insn->irn, op->pos)))
continue;
if (smallest >= 0) {
be_operand_t *partner = &insn->ops[smallest];
+ for(i = insn->use_start; i < insn->n_ops; ++i) {
+ if(insn->ops[i].carrier == partner->carrier)
+ insn->ops[i].partner = out_op;
+ }
+
out_op->partner = partner;
partner->partner = out_op;
}
the Perm. Recomputing liveness is also a good idea if a Perm is inserted, since
the live sets may change.
*/
- // be_liveness_recompute(lv);
obstack_free(env->obst, insn);
*the_insn = insn = chordal_scan_insn(env, insn->irn);
return perm;
}
-static ir_node *handle_constraints(be_chordal_alloc_env_t *alloc_env, ir_node *irn, int *silent)
+static ir_node *handle_constraints(be_chordal_alloc_env_t *alloc_env,
+ ir_node *irn, int *silent)
{
const arch_env_t *aenv;
int n_regs;
bitset_t *bs;
ir_node **alloc_nodes;
- hungarian_problem_t *bp;
+ //hungarian_problem_t *bp;
int *assignment;
pmap *partners;
int i, n_alloc;
- long col;
+ bitset_pos_t col;
const ir_edge_t *edge;
ir_node *perm = NULL;
- int match_res, cost;
+ //int match_res, cost;
be_chordal_env_t *env = alloc_env->chordal_env;
void *base = obstack_base(env->obst);
be_insn_t *insn = chordal_scan_insn(env, irn);
ir_node *res = insn->next_insn;
int be_silent = *silent;
be_irg_t *birg = env->birg;
+ bipartite_t *bp;
if(insn->pre_colored) {
int i;
n_regs = env->cls->n_regs;
bs = bitset_alloca(n_regs);
alloc_nodes = alloca(n_regs * sizeof(alloc_nodes[0]));
- bp = hungarian_new(n_regs, n_regs, 2, HUNGARIAN_MATCH_PERFECT);
- // bipartite_t *bp = bipartite_new(n_regs, n_regs);
+ //bp = hungarian_new(n_regs, n_regs, 2, HUNGARIAN_MATCH_PERFECT);
+ bp = bipartite_new(n_regs, n_regs);
assignment = alloca(n_regs * sizeof(assignment[0]));
partners = pmap_create();
set of admissible registers via a bipartite graph.
*/
if(!op->partner || !pmap_contains(partners, op->partner->carrier)) {
+ ir_node *partner = op->partner ? op->partner->carrier : NULL;
+ int i;
+
+ pmap_insert(partners, op->carrier, partner);
+ if(partner != NULL)
+ pmap_insert(partners, partner, op->carrier);
+
+ /* don't insert a node twice */
+ for(i = 0; i < n_alloc; ++i) {
+ if(alloc_nodes[i] == op->carrier) {
+ break;
+ }
+ }
+ if(i < n_alloc)
+ continue;
- pmap_insert(partners, op->carrier, op->partner ? op->partner->carrier : NULL);
alloc_nodes[n_alloc] = op->carrier;
- DBG((dbg, LEVEL_2, "\tassociating %+F and %+F\n", op->carrier, op->partner ? op->partner->carrier : NULL));
+ DBG((dbg, LEVEL_2, "\tassociating %+F and %+F\n", op->carrier,
+ partner));
bitset_clear_all(bs);
get_decisive_partner_regs(bs, op, op->partner);
- DBG((dbg, LEVEL_2, "\tallowed registers for %+F: %B\n", op->carrier, bs));
+ DBG((dbg, LEVEL_2, "\tallowed registers for %+F: %B\n", op->carrier,
+ bs));
bitset_foreach(bs, col) {
- hungarian_add(bp, n_alloc, col, 1);
- // bipartite_add(bp, n_alloc, col);
+ //hungarian_add(bp, n_alloc, col, 1);
+ bipartite_add(bp, n_alloc, col);
}
n_alloc++;
*/
if(perm != NULL) {
foreach_out_edge(perm, edge) {
+ int i;
ir_node *proj = get_edge_src_irn(edge);
assert(is_Proj(proj));
if(!values_interfere(birg, proj, irn) || pmap_contains(partners, proj))
continue;
+ /* don't insert a node twice */
+ for(i = 0; i < n_alloc; ++i) {
+ if(alloc_nodes[i] == proj) {
+ break;
+ }
+ }
+ if(i < n_alloc)
+ continue;
+
+
assert(n_alloc < n_regs);
+
alloc_nodes[n_alloc] = proj;
pmap_insert(partners, proj, NULL);
arch_put_non_ignore_regs(aenv, env->cls, bs);
bitset_andnot(bs, env->ignore_colors);
bitset_foreach(bs, col) {
- hungarian_add(bp, n_alloc, col, 1);
- // bipartite_add(bp, n_alloc, col);
+ //hungarian_add(bp, n_alloc, col, 1);
+ bipartite_add(bp, n_alloc, col);
}
n_alloc++;
}
/* Compute a valid register allocation. */
+#if 0
hungarian_prepare_cost_matrix(bp, HUNGARIAN_MODE_MAXIMIZE_UTIL);
match_res = hungarian_solve(bp, assignment, &cost, 1);
assert(match_res == 0 && "matching failed");
- //bipartite_matching(bp, assignment);
+#else
+ bipartite_matching(bp, assignment);
+#endif
/* Assign colors obtained from the matching. */
for(i = 0; i < n_alloc; ++i) {
const arch_register_t *reg;
- ir_node *nodes[2];
- int j;
+ ir_node *irn;
assert(assignment[i] >= 0 && "there must have been a register assigned");
reg = arch_register_for_index(env->cls, assignment[i]);
+ assert(! (reg->type & arch_register_type_ignore));
- nodes[0] = alloc_nodes[i];
- nodes[1] = pmap_get(partners, alloc_nodes[i]);
-
- for(j = 0; j < 2; ++j) {
- if(!nodes[j])
- continue;
+ irn = alloc_nodes[i];
+ if (irn != NULL) {
+ arch_set_irn_register(aenv, irn, reg);
+ (void) pset_hinsert_ptr(alloc_env->pre_colored, irn);
+ DBG((dbg, LEVEL_2, "\tsetting %+F to register %s\n", irn, reg->name));
+ }
- arch_set_irn_register(aenv, nodes[j], reg);
- (void) pset_hinsert_ptr(alloc_env->pre_colored, nodes[j]);
- DBG((dbg, LEVEL_2, "\tsetting %+F to register %s\n", nodes[j], reg->name));
+ irn = pmap_get(partners, alloc_nodes[i]);
+ if (irn != NULL) {
+ arch_set_irn_register(aenv, irn, reg);
+ (void) pset_hinsert_ptr(alloc_env->pre_colored, irn);
+ DBG((dbg, LEVEL_2, "\tsetting %+F to register %s\n", irn, reg->name));
}
}
}
}
- //bipartite_free(bp);
- hungarian_free(bp);
+ bipartite_free(bp);
+ //hungarian_free(bp);
pmap_destroy(partners);
end:
be_lv_t *lv = env->birg->lv;
int i, n;
+ bitset_pos_t elm;
unsigned step = 0;
unsigned pressure = 0;
struct list_head *head;
- pset *live_in = be_lv_pset_put_in(lv, block, pset_new_ptr_default());
- pset *live_end = be_lv_pset_put_end(lv, block, pset_new_ptr_default());
DBG((dbg, LEVEL_1, "Computing pressure in block %+F\n", block));
bitset_clear_all(live);
* Make final uses of all values live out of the block.
* They are necessary to build up real intervals.
*/
- foreach_pset(live_end, irn) {
+ be_lv_foreach(lv, block, be_lv_state_end, i) {
+ ir_node *irn = be_lv_get_irn(lv, block, i);
if(has_reg_class(env, irn)) {
DBG((dbg, LEVEL_3, "\tMaking live: %+F/%d\n", irn, get_irn_idx(irn)));
bitset_set(live, get_irn_idx(irn));
DBG((dbg, LEVEL_1, "\tinsn: %+F, pressure: %d\n", irn, pressure));
DBG((dbg, LEVEL_2, "\tlive: %B\n", live));
+ if (get_irn_mode(irn) == mode_T) {
+ const ir_edge_t *edge;
+
+ foreach_out_edge(irn, edge) {
+ ir_node *proj = get_edge_src_irn(edge);
+
+ /*
+ * If the node defines some value, which can put into a
+ * register of the current class, make a border for it.
+ */
+ if(has_reg_class(env, proj)) {
+ int nr = get_irn_idx(proj);
+
+ bitset_clear(live, nr);
+ border_def(proj, step, 1);
+ }
+ }
+ }
+
/*
* If the node defines some value, which can put into a
* register of the current class, make a border for it.
++step;
}
- /*
- * Add initial defs for all values live in.
- */
- foreach_pset(live_in, irn) {
- if(has_reg_class(env, irn)) {
-
- /* Mark the value live in. */
- bitset_set(live, get_irn_idx(irn));
-
- /* Add the def */
+ bitset_foreach(live, elm) {
+ ir_node *irn = get_idx_irn(env->irg, elm);
+ if (be_is_live_in(lv, block, irn))
border_def(irn, step, 0);
- }
}
-
- del_pset(live_in);
- del_pset(live_end);
}
static void assign(ir_node *block, void *env_ptr)
const arch_env_t *arch_env = env->birg->main_env->arch_env;
struct list_head *head = get_block_border_head(env, block);
be_lv_t *lv = env->birg->lv;
- pset *live_in = be_lv_pset_put_in(lv, block, pset_new_ptr_default());
const ir_node *irn;
border_t *b;
+ int idx;
bitset_clear_all(colors);
bitset_clear_all(live);
* Since their colors have already been assigned (The dominators were
* allocated before), we have to mark their colors as used also.
*/
- foreach_pset(live_in, irn) {
+ be_lv_foreach(lv, block, be_lv_state_in, idx) {
+ irn = be_lv_get_irn(lv, block, idx);
if(has_reg_class(env, irn)) {
const arch_register_t *reg = arch_get_irn_register(arch_env, irn);
int col;
bitset_clear(live, nr);
}
}
-
- del_pset(live_in);
-}
-
-/**
- * A new assign...
- */
-static void assign_new(ir_node *block, be_chordal_alloc_env_t *alloc_env, bitset_t *live_end_dom)
-{
- be_chordal_env_t *env = alloc_env->chordal_env;
- bitset_t *colors = alloc_env->colors;
- bitset_t *in_colors = alloc_env->in_colors;
- bitset_t *live = bitset_irg_malloc(env->irg);
- const arch_env_t *arch_env = env->birg->main_env->arch_env;
- be_irg_t *birg = env->birg;
- lv_chk_t *lv = be_get_birg_liveness_chk(birg);
-
- bitset_pos_t elm;
- ir_node *irn;
-
- bitset_clear_all(colors);
- bitset_clear_all(in_colors);
-
- /*
- * All variables which are live in to this block are live out
- * of the immediate dominator thanks to SSA properties. As we
- * have already visited the immediate dominator, we know these
- * variables. The only tjing left is to check wheather they are live
- * in here (they also could be phi arguments to some ohi not
- * in this block, hence we have to check).
- */
- bitset_foreach (live_end_dom, elm) {
- ir_node *irn = get_idx_irn(env->irg, elm);
- if (lv_chk_bl_in(lv, block, irn)) {
- const arch_register_t *reg = arch_get_irn_register(arch_env, irn);
- int col;
-
- assert(be_is_live_in(env->birg->lv, block, irn));
- assert(reg && "Node must have been assigned a register");
- col = arch_register_get_index(reg);
-
- DBG((dbg, LEVEL_4, "%+F has reg %s\n", irn, reg->name));
-
- /* Mark the color of the live in value as used. */
- bitset_set(colors, col);
- bitset_set(in_colors, col);
-
- /* Mark the value live in. */
- bitset_set(live, elm);
- }
-
- else {
- assert(!be_is_live_in(env->birg->lv, block, irn));
- }
- }
-
- /*
- * Mind that the sequence of defs from back to front defines a perfect
- * elimination order. So, coloring the definitions from first to last
- * will work.
- */
- sched_foreach (block, irn) {
- int nr = get_irn_idx(irn);
- int ignore = arch_irn_is(arch_env, irn, ignore);
-
- /* Clear the color upon a last use. */
- if(!is_Phi(irn)) {
- int i;
- for (i = get_irn_arity(irn) - 1; i >= 0; --i) {
- ir_node *op = get_irn_n(irn, i);
-
- /*
- * If the reg class matches and the operand is not live after
- * the node, irn is a last use of op and the register can
- * be freed.
- */
- if (has_reg_class(env, op)) {
- if (!be_lv_chk_after_irn(birg, op, irn)) {
- const arch_register_t *reg = arch_get_irn_register(arch_env, op);
- int col;
-
- assert(reg && "Register must have been assigned");
- col = arch_register_get_index(reg);
- bitset_clear(colors, col);
- bitset_clear(live, nr);
- }
- }
- }
- }
-
- if (has_reg_class(env, irn)) {
- const arch_register_t *reg;
- int col = NO_COLOR;
-
- /*
- * Assign a color, if it is a local def. Global defs already have a
- * color.
- */
- if(ignore || pset_find_ptr(alloc_env->pre_colored, irn)) {
- reg = arch_get_irn_register(arch_env, irn);
- col = reg->index;
- assert(!bitset_is_set(colors, col) && "pre-colored register must be free");
- } else {
- col = get_next_free_reg(alloc_env, colors);
- reg = arch_register_for_index(env->cls, col);
- assert(arch_get_irn_register(arch_env, irn) == NULL && "This node must not have been assigned a register yet");
- assert(!arch_register_type_is(reg, ignore) && "Must not assign ignore register");
- }
-
- bitset_set(colors, col);
- arch_set_irn_register(arch_env, irn, reg);
-
- DBG((dbg, LEVEL_1, "\tassigning register %s(%d) to %+F\n", arch_register_get_name(reg), col, irn));
-
- assert(!bitset_is_set(live, nr) && "Value's definition must not have been encountered");
- bitset_set(live, nr);
- }
-
- }
-
- dominates_for_each (block, irn) {
- assign_new(irn, alloc_env, live);
- }
-
- bitset_free(live);
}
void be_ra_chordal_color(be_chordal_env_t *chordal_env)
{
be_chordal_alloc_env_t env;
char buf[256];
+ be_lv_t *lv;
be_irg_t *birg = chordal_env->birg;
const arch_register_class_t *cls = chordal_env->cls;
int colors_n = arch_register_class_n_regs(cls);
ir_graph *irg = chordal_env->irg;
- int allocatable_regs = colors_n - be_put_ignore_regs(birg, cls, NULL);
-
- /* some special classes contain only ignore regs, no work to be done */
- if(allocatable_regs == 0)
- return;
be_assure_dom_front(birg);
- be_assure_liveness(birg);
+ lv = be_assure_liveness(birg);
+ be_liveness_assure_sets(lv);
+ be_liveness_assure_chk(lv);
+
assure_doms(irg);
env.chordal_env = chordal_env;
env.in_colors = bitset_alloca(colors_n);
env.pre_colored = pset_new_ptr_default();
+ BE_TIMER_PUSH(t_constr);
+
/* Handle register targeting constraints */
dom_tree_walk_irg(irg, constraints, NULL, &env);
be_dump(chordal_env->irg, buf, dump_ir_block_graph_sched);
}
+ BE_TIMER_POP(t_constr);
+
env.live = bitset_malloc(get_irg_last_idx(chordal_env->irg));
/* First, determine the pressure */
dom_tree_walk_irg(irg, pressure, NULL, &env);
/* Assign the colors */
-#ifdef NEW_STYLE_ASSIGN
- assign_new(get_irg_start_block(irg), &env, env.live);
-#else
dom_tree_walk_irg(irg, assign, NULL, &env);
-#endif
if(chordal_env->opts->dump_flags & BE_CH_DUMP_TREE_INTV) {
plotter_t *plotter;