-/**
- * Chordal register allocation.
- * @author Sebastian Hack
- * @date 8.12.2004
- * @cvs-id $Id$
+/*
+ * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
+ *
+ * This file is part of libFirm.
+ *
+ * This file may be distributed and/or modified under the terms of the
+ * GNU General Public License version 2 as published by the Free Software
+ * Foundation and appearing in the file LICENSE.GPL included in the
+ * packaging of this file.
+ *
+ * Licensees holding valid libFirm Professional Edition licenses may use
+ * this file in accordance with the libFirm Commercial License.
+ * Agreement provided with the Software.
*
- * Copyright (C) Universitaet Karlsruhe
- * Released under the GPL
+ * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
+ * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE.
+ */
+
+/**
+ * @file
+ * @brief Chordal register allocation.
+ * @author Sebastian Hack
+ * @date 08.12.2004
+ * @version $Id$
*/
-#ifdef HAVE_CONFIG_H
#include "config.h"
-#endif
#include <ctype.h>
#include "irdump.h"
#include "irdom.h"
#include "irtools.h"
+#include "irbitset.h"
#include "debug.h"
-#include "xmalloc.h"
+#include "iredges.h"
#include "beutil.h"
#include "besched.h"
#include "besched_t.h"
#include "belive_t.h"
#include "benode_t.h"
-#include "bearch.h"
+#include "bearch_t.h"
#include "beirgmod.h"
#include "beifg.h"
#include "beinsn_t.h"
#include "bestatevent.h"
#include "beirg_t.h"
-
+#include "beintlive_t.h"
+#include "bera.h"
#include "bechordal_t.h"
#include "bechordal_draw.h"
+#include "bemodule.h"
DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
typedef struct _be_chordal_alloc_env_t {
be_chordal_env_t *chordal_env;
- pset *pre_colored; /**< Set of precolored nodes. */
- bitset_t *live; /**< A liveness bitset. */
- bitset_t *tmp_colors; /**< An auxiliary bitset which is as long as the number of colors in the class. */
- bitset_t *colors; /**< The color mask. */
- bitset_t *in_colors; /**< Colors used by live in values. */
- int colors_n; /**< The number of colors. */
+ pset *pre_colored; /**< Set of precolored nodes. */
+ bitset_t *live; /**< A liveness bitset. */
+ bitset_t *tmp_colors; /**< An auxiliary bitset which is as long as the number of colors in the class. */
+ bitset_t *colors; /**< The color mask. */
+ bitset_t *in_colors; /**< Colors used by live in values. */
+ int colors_n; /**< The number of colors. */
} be_chordal_alloc_env_t;
#include "fourcc.h"
* @param is_def Is the border a use or a def.
* @return The created border.
*/
-static INLINE border_t *border_add(be_chordal_env_t *env, struct list_head *head,
+static inline border_t *border_add(be_chordal_env_t *env, struct list_head *head,
ir_node *irn, unsigned step, unsigned pressure,
unsigned is_def, unsigned is_real)
{
if(!is_def) {
border_t *def;
- b = obstack_alloc(&env->obst, sizeof(*b));
+ b = obstack_alloc(env->obst, sizeof(*b));
/* also allocate the def and tie it to the use. */
- def = obstack_alloc(&env->obst, sizeof(*def));
+ def = obstack_alloc(env->obst, sizeof(*def));
memset(def, 0, sizeof(*def));
b->other_end = def;
def->other_end = b;
else {
b = get_irn_link(irn);
- assert(b && b->magic == BORDER_FOURCC && "Illegal border encountered");
+ DEBUG_ONLY(assert(b && b->magic == BORDER_FOURCC && "Illegal border encountered"));
}
b->pressure = pressure;
b->irn = irn;
b->step = step;
list_add_tail(&b->list, head);
- DBG((env->dbg, LEVEL_5, "\t\t%s adding %+F, step: %d\n", is_def ? "def" : "use", irn, step));
+ DBG((dbg, LEVEL_5, "\t\t%s adding %+F, step: %d\n", is_def ? "def" : "use", irn, step));
return b;
* @param irn The node.
* @return 1, if the node is of that register class, 0 if not.
*/
-static INLINE int has_reg_class(const be_chordal_env_t *env, const ir_node *irn)
+static inline int has_reg_class(const be_chordal_env_t *env, const ir_node *irn)
{
- return arch_irn_has_reg_class(env->birg->main_env->arch_env, irn, -1, env->cls);
- // return arch_irn_consider_in_reg_alloc(env->birg->main_env->arch_env, env->cls, irn);
+ return arch_irn_consider_in_reg_alloc(env->cls, irn);
}
-#define has_limited_constr(req, irn) \
- (arch_get_register_req(arch_env, (req), irn, -1) && (req)->type == arch_register_req_type_limited)
-
static int get_next_free_reg(const be_chordal_alloc_env_t *alloc_env, bitset_t *colors)
{
bitset_t *tmp = alloc_env->tmp_colors;
be_insn_env_t ie;
ie.ignore_colors = env->ignore_colors;
- ie.aenv = env->birg->main_env->arch_env;
- ie.obst = &env->obst;
+ ie.obst = env->obst;
ie.cls = env->cls;
return be_scan_insn(&ie, irn);
}
static ir_node *prepare_constr_insn(be_chordal_env_t *env, ir_node *irn)
{
- const arch_env_t *aenv = env->birg->main_env->arch_env;
bitset_t *tmp = bitset_alloca(env->cls->n_regs);
bitset_t *def_constr = bitset_alloca(env->cls->n_regs);
ir_node *bl = get_nodes_block(irn);
- be_lv_t *lv = env->birg->lv;
+ const be_irg_t *birg = env->birg;
+ be_lv_t *lv = birg->lv;
be_insn_t *insn;
int i, j;
const arch_register_t *reg;
const arch_register_req_t *req;
- if (arch_get_irn_reg_class(aenv, irn, i) != env->cls)
+ req = arch_get_register_req(irn, i);
+ if (req->cls != env->cls)
continue;
- reg = arch_get_irn_register(aenv, op);
+ reg = arch_get_irn_register(op);
if (reg == NULL || !arch_register_type_is(reg, ignore))
continue;
if(arch_register_type_is(reg, joker))
continue;
- req = arch_get_register_req(aenv, irn, i);
if (!arch_register_req_is(req, limited))
continue;
sched_add_before(irn, copy);
set_irn_n(irn, i, copy);
- DBG((env->dbg, LEVEL_3, "inserting ignore arg copy %+F for %+F pos %d\n", copy, irn, i));
+ DBG((dbg, LEVEL_3, "inserting ignore arg copy %+F for %+F pos %d\n", copy, irn, i));
}
insn = chordal_scan_insn(env, irn);
if(a_op->carrier != op->carrier || !a_op->has_constraints)
continue;
+ /* if the constraint is the same, no copy is necessary
+ * TODO generalise unequal but overlapping constraints */
+ if (a_op->req == op->req)
+ continue;
+
+ if (be_is_Copy(get_irn_n(insn->irn, a_op->pos)))
+ continue;
+
copy = be_new_Copy(env->cls, env->irg, bl, op->carrier);
be_stat_ev("constr_copy", 1);
sched_add_before(insn->irn, copy);
set_irn_n(insn->irn, a_op->pos, copy);
- DBG((env->dbg, LEVEL_3, "inserting multiple constr copy %+F for %+F pos %d\n", copy, insn->irn, a_op->pos));
+ DBG((dbg, LEVEL_3, "inserting multiple constr copy %+F for %+F pos %d\n", copy, insn->irn, a_op->pos));
}
}
- /* collect all registers occuring in out constraints. */
+ /* collect all registers occurring in out constraints. */
for(i = 0; i < insn->use_start; ++i) {
be_operand_t *op = &insn->ops[i];
if(op->has_constraints)
Check, if
1) the operand is constrained.
2) lives through the node.
- 3) is constrained to a register occuring in out constraints.
+ 3) is constrained to a register occurring in out constraints.
*/
if(!op->has_constraints ||
- !values_interfere(lv, insn->irn, op->carrier) ||
- bitset_popcnt(tmp) == 0)
+ !values_interfere(birg, insn->irn, op->carrier) ||
+ bitset_popcnt(tmp) == 0)
continue;
/*
only create the copy if the operand is no copy.
this is necessary since the assure constraints phase inserts
- Copies and Keeps for operands which must be different from the results.
- Additional copies here would destroy this.
+ Copies and Keeps for operands which must be different from the
+ results. Additional copies here would destroy this.
*/
- if(be_is_Copy(op->carrier))
+ if (be_is_Copy(get_irn_n(insn->irn, op->pos)))
continue;
copy = be_new_Copy(env->cls, env->irg, bl, op->carrier);
sched_add_before(insn->irn, copy);
set_irn_n(insn->irn, op->pos, copy);
- DBG((env->dbg, LEVEL_3, "inserting constr copy %+F for %+F pos %d\n", copy, insn->irn, op->pos));
+ DBG((dbg, LEVEL_3, "inserting constr copy %+F for %+F pos %d\n", copy, insn->irn, op->pos));
be_liveness_update(lv, op->carrier);
}
end:
- obstack_free(&env->obst, insn);
+ obstack_free(env->obst, insn);
return insn->next_insn;
}
static void pair_up_operands(const be_chordal_alloc_env_t *alloc_env, be_insn_t *insn)
{
const be_chordal_env_t *env = alloc_env->chordal_env;
-
- int n_uses = be_insn_n_uses(insn);
- int n_defs = be_insn_n_defs(insn);
- bitset_t *bs = bitset_alloca(env->cls->n_regs);
- int *pairing = alloca(MAX(n_defs, n_uses) * sizeof(pairing[0]));
- be_lv_t *lv = env->birg->lv;
-
- int i, j;
+ bitset_t *bs = bitset_alloca(env->cls->n_regs);
+ int i;
+ int j;
/*
For each out operand, try to find an in operand which can be assigned the
if (op->partner != NULL)
continue;
- if (values_interfere(lv, op->irn, op->carrier))
+ if (values_interfere(env->birg, op->irn, op->carrier))
continue;
bitset_clear_all(bs);
if (smallest >= 0) {
be_operand_t *partner = &insn->ops[smallest];
+ for(i = insn->use_start; i < insn->n_ops; ++i) {
+ if(insn->ops[i].carrier == partner->carrier)
+ insn->ops[i].partner = out_op;
+ }
+
out_op->partner = partner;
partner->partner = out_op;
}
be_insn_t **the_insn)
{
be_chordal_env_t *env = alloc_env->chordal_env;
- const arch_env_t *aenv = env->birg->main_env->arch_env;
be_insn_t *insn = *the_insn;
ir_node *perm = NULL;
bitset_t *out_constr = bitset_alloca(env->cls->n_regs);
be_stat_ev("constr_perm", get_irn_arity(perm));
foreach_out_edge(perm, edge) {
ir_node *proj = get_edge_src_irn(edge);
- arch_set_irn_register(aenv, proj, NULL);
+ arch_set_irn_register(proj, NULL);
}
/*
the Perm. Recomputing liveness is also a good idea if a Perm is inserted, since
the live sets may change.
*/
- // be_liveness_recompute(lv);
- obstack_free(&env->obst, insn);
+ obstack_free(env->obst, insn);
*the_insn = insn = chordal_scan_insn(env, insn->irn);
/*
return perm;
}
-static ir_node *handle_constraints(be_chordal_alloc_env_t *alloc_env, ir_node *irn, int *silent)
+static ir_node *handle_constraints(be_chordal_alloc_env_t *alloc_env,
+ ir_node *irn, int *silent)
{
- const arch_env_t *aenv;
int n_regs;
bitset_t *bs;
ir_node **alloc_nodes;
- hungarian_problem_t *bp;
+ //hungarian_problem_t *bp;
int *assignment;
pmap *partners;
int i, n_alloc;
- long col;
+ bitset_pos_t col;
const ir_edge_t *edge;
ir_node *perm = NULL;
- int match_res, cost;
+ //int match_res, cost;
be_chordal_env_t *env = alloc_env->chordal_env;
- void *base = obstack_base(&env->obst);
+ void *base = obstack_base(env->obst);
be_insn_t *insn = chordal_scan_insn(env, irn);
ir_node *res = insn->next_insn;
int be_silent = *silent;
- be_lv_t *lv = env->birg->lv;
+ be_irg_t *birg = env->birg;
+ bipartite_t *bp;
if(insn->pre_colored) {
int i;
if(!insn->has_constraints)
goto end;
- aenv = env->birg->main_env->arch_env;
n_regs = env->cls->n_regs;
bs = bitset_alloca(n_regs);
- alloc_nodes = alloca(n_regs * sizeof(alloc_nodes[0]));
- bp = hungarian_new(n_regs, n_regs, 2, HUNGARIAN_MATCH_PERFECT);
- // bipartite_t *bp = bipartite_new(n_regs, n_regs);
- assignment = alloca(n_regs * sizeof(assignment[0]));
+ alloc_nodes = ALLOCAN(ir_node*, n_regs);
+ //bp = hungarian_new(n_regs, n_regs, 2, HUNGARIAN_MATCH_PERFECT);
+ bp = bipartite_new(n_regs, n_regs);
+ assignment = ALLOCAN(int, n_regs);
partners = pmap_create();
/*
set of admissible registers via a bipartite graph.
*/
if(!op->partner || !pmap_contains(partners, op->partner->carrier)) {
+ ir_node *partner = op->partner ? op->partner->carrier : NULL;
+ int i;
+
+ pmap_insert(partners, op->carrier, partner);
+ if(partner != NULL)
+ pmap_insert(partners, partner, op->carrier);
+
+ /* don't insert a node twice */
+ for(i = 0; i < n_alloc; ++i) {
+ if(alloc_nodes[i] == op->carrier) {
+ break;
+ }
+ }
+ if(i < n_alloc)
+ continue;
- pmap_insert(partners, op->carrier, op->partner ? op->partner->carrier : NULL);
alloc_nodes[n_alloc] = op->carrier;
- DBG((dbg, LEVEL_2, "\tassociating %+F and %+F\n", op->carrier, op->partner ? op->partner->carrier : NULL));
+ DBG((dbg, LEVEL_2, "\tassociating %+F and %+F\n", op->carrier,
+ partner));
bitset_clear_all(bs);
get_decisive_partner_regs(bs, op, op->partner);
- DBG((dbg, LEVEL_2, "\tallowed registers for %+F: %B\n", op->carrier, bs));
+ DBG((dbg, LEVEL_2, "\tallowed registers for %+F: %B\n", op->carrier,
+ bs));
bitset_foreach(bs, col) {
- hungarian_add(bp, n_alloc, col, 1);
- // bipartite_add(bp, n_alloc, col);
+ //hungarian_add(bp, n_alloc, col, 1);
+ bipartite_add(bp, n_alloc, col);
}
n_alloc++;
*/
if(perm != NULL) {
foreach_out_edge(perm, edge) {
+ int i;
ir_node *proj = get_edge_src_irn(edge);
assert(is_Proj(proj));
- if(!values_interfere(lv, proj, irn) || pmap_contains(partners, proj))
+ if(!values_interfere(birg, proj, irn) || pmap_contains(partners, proj))
+ continue;
+
+ /* don't insert a node twice */
+ for(i = 0; i < n_alloc; ++i) {
+ if(alloc_nodes[i] == proj) {
+ break;
+ }
+ }
+ if(i < n_alloc)
continue;
+
assert(n_alloc < n_regs);
+
alloc_nodes[n_alloc] = proj;
pmap_insert(partners, proj, NULL);
bitset_clear_all(bs);
- arch_put_non_ignore_regs(aenv, env->cls, bs);
+ arch_put_non_ignore_regs(env->cls, bs);
bitset_andnot(bs, env->ignore_colors);
bitset_foreach(bs, col) {
- hungarian_add(bp, n_alloc, col, 1);
- // bipartite_add(bp, n_alloc, col);
+ //hungarian_add(bp, n_alloc, col, 1);
+ bipartite_add(bp, n_alloc, col);
}
n_alloc++;
}
/* Compute a valid register allocation. */
+#if 0
hungarian_prepare_cost_matrix(bp, HUNGARIAN_MODE_MAXIMIZE_UTIL);
match_res = hungarian_solve(bp, assignment, &cost, 1);
assert(match_res == 0 && "matching failed");
- //bipartite_matching(bp, assignment);
+#else
+ bipartite_matching(bp, assignment);
+#endif
/* Assign colors obtained from the matching. */
for(i = 0; i < n_alloc; ++i) {
const arch_register_t *reg;
- ir_node *nodes[2];
- int j;
+ ir_node *irn;
assert(assignment[i] >= 0 && "there must have been a register assigned");
reg = arch_register_for_index(env->cls, assignment[i]);
+ assert(! (reg->type & arch_register_type_ignore));
- nodes[0] = alloc_nodes[i];
- nodes[1] = pmap_get(partners, alloc_nodes[i]);
-
- for(j = 0; j < 2; ++j) {
- if(!nodes[j])
- continue;
+ irn = alloc_nodes[i];
+ if (irn != NULL) {
+ arch_set_irn_register(irn, reg);
+ (void) pset_hinsert_ptr(alloc_env->pre_colored, irn);
+ DBG((dbg, LEVEL_2, "\tsetting %+F to register %s\n", irn, reg->name));
+ }
- arch_set_irn_register(aenv, nodes[j], reg);
- (void) pset_hinsert_ptr(alloc_env->pre_colored, nodes[j]);
- DBG((dbg, LEVEL_2, "\tsetting %+F to register %s\n", nodes[j], reg->name));
+ irn = pmap_get(partners, alloc_nodes[i]);
+ if (irn != NULL) {
+ arch_set_irn_register(irn, reg);
+ (void) pset_hinsert_ptr(alloc_env->pre_colored, irn);
+ DBG((dbg, LEVEL_2, "\tsetting %+F to register %s\n", irn, reg->name));
}
}
/* Put the colors of all Projs in a bitset. */
foreach_out_edge(perm, edge) {
ir_node *proj = get_edge_src_irn(edge);
- const arch_register_t *reg = arch_get_irn_register(aenv, proj);
+ const arch_register_t *reg = arch_get_irn_register(proj);
if(reg != NULL)
bitset_set(bs, reg->index);
/* Assign the not yet assigned Projs of the Perm a suitable color. */
foreach_out_edge(perm, edge) {
ir_node *proj = get_edge_src_irn(edge);
- const arch_register_t *reg = arch_get_irn_register(aenv, proj);
+ const arch_register_t *reg = arch_get_irn_register(proj);
DBG((dbg, LEVEL_2, "\tchecking reg of %+F: %s\n", proj, reg ? reg->name : "<none>"));
col = get_next_free_reg(alloc_env, bs);
reg = arch_register_for_index(env->cls, col);
bitset_set(bs, reg->index);
- arch_set_irn_register(aenv, proj, reg);
+ arch_set_irn_register(proj, reg);
pset_insert_ptr(alloc_env->pre_colored, proj);
DBG((dbg, LEVEL_2, "\tsetting %+F to register %s\n", proj, reg->name));
}
}
}
- //bipartite_free(bp);
- hungarian_free(bp);
+ bipartite_free(bp);
+ //hungarian_free(bp);
pmap_destroy(partners);
end:
- obstack_free(&env->obst, base);
+ obstack_free(env->obst, base);
return res;
}
be_lv_t *lv = env->birg->lv;
int i, n;
+ bitset_pos_t elm;
unsigned step = 0;
unsigned pressure = 0;
struct list_head *head;
- pset *live_in = be_lv_pset_put_in(lv, block, pset_new_ptr_default());
- pset *live_end = be_lv_pset_put_end(lv, block, pset_new_ptr_default());
DBG((dbg, LEVEL_1, "Computing pressure in block %+F\n", block));
bitset_clear_all(live);
/* Set up the border list in the block info */
- head = obstack_alloc(&env->obst, sizeof(*head));
+ head = obstack_alloc(env->obst, sizeof(*head));
INIT_LIST_HEAD(head);
assert(pmap_get(env->border_heads, block) == NULL);
pmap_insert(env->border_heads, block, head);
* Make final uses of all values live out of the block.
* They are necessary to build up real intervals.
*/
- foreach_pset(live_end, irn) {
+ be_lv_foreach(lv, block, be_lv_state_end, i) {
+ ir_node *irn = be_lv_get_irn(lv, block, i);
if(has_reg_class(env, irn)) {
DBG((dbg, LEVEL_3, "\tMaking live: %+F/%d\n", irn, get_irn_idx(irn)));
bitset_set(live, get_irn_idx(irn));
DBG((dbg, LEVEL_1, "\tinsn: %+F, pressure: %d\n", irn, pressure));
DBG((dbg, LEVEL_2, "\tlive: %B\n", live));
+ if (get_irn_mode(irn) == mode_T) {
+ const ir_edge_t *edge;
+
+ foreach_out_edge(irn, edge) {
+ ir_node *proj = get_edge_src_irn(edge);
+
+ /*
+ * If the node defines some value, which can put into a
+ * register of the current class, make a border for it.
+ */
+ if(has_reg_class(env, proj)) {
+ int nr = get_irn_idx(proj);
+
+ bitset_clear(live, nr);
+ border_def(proj, step, 1);
+ }
+ }
+ }
+
/*
* If the node defines some value, which can put into a
* register of the current class, make a border for it.
++step;
}
- /*
- * Add initial defs for all values live in.
- */
- foreach_pset(live_in, irn) {
- if(has_reg_class(env, irn)) {
-
- /* Mark the value live in. */
- bitset_set(live, get_irn_idx(irn));
-
- /* Add the def */
+ bitset_foreach(live, elm) {
+ ir_node *irn = get_idx_irn(env->irg, elm);
+ if (be_is_live_in(lv, block, irn))
border_def(irn, step, 0);
- }
}
-
- del_pset(live_in);
- del_pset(live_end);
}
static void assign(ir_node *block, void *env_ptr)
bitset_t *live = alloc_env->live;
bitset_t *colors = alloc_env->colors;
bitset_t *in_colors = alloc_env->in_colors;
- const arch_env_t *arch_env = env->birg->main_env->arch_env;
struct list_head *head = get_block_border_head(env, block);
be_lv_t *lv = env->birg->lv;
- pset *live_in = be_lv_pset_put_in(lv, block, pset_new_ptr_default());
const ir_node *irn;
border_t *b;
+ int idx;
bitset_clear_all(colors);
bitset_clear_all(live);
* Since their colors have already been assigned (The dominators were
* allocated before), we have to mark their colors as used also.
*/
- foreach_pset(live_in, irn) {
+ be_lv_foreach(lv, block, be_lv_state_in, idx) {
+ irn = be_lv_get_irn(lv, block, idx);
if(has_reg_class(env, irn)) {
- const arch_register_t *reg = arch_get_irn_register(arch_env, irn);
+ const arch_register_t *reg = arch_get_irn_register(irn);
int col;
assert(reg && "Node must have been assigned a register");
list_for_each_entry_reverse(border_t, b, head, list) {
ir_node *irn = b->irn;
int nr = get_irn_idx(irn);
- int ignore = arch_irn_is(arch_env, irn, ignore);
+ int ignore = arch_irn_is_ignore(irn);
/*
* Assign a color, if it is a local def. Global defs already have a
int col = NO_COLOR;
if(ignore || pset_find_ptr(alloc_env->pre_colored, irn)) {
- reg = arch_get_irn_register(arch_env, irn);
+ reg = arch_get_irn_register(irn);
col = reg->index;
assert(!bitset_is_set(colors, col) && "pre-colored register must be free");
} else {
col = get_next_free_reg(alloc_env, colors);
reg = arch_register_for_index(env->cls, col);
- assert(arch_get_irn_register(arch_env, irn) == NULL && "This node must not have been assigned a register yet");
+ assert(arch_get_irn_register(irn) == NULL && "This node must not have been assigned a register yet");
assert(!arch_register_type_is(reg, ignore) && "Must not assign ignore register");
}
bitset_set(colors, col);
- arch_set_irn_register(arch_env, irn, reg);
+ arch_set_irn_register(irn, reg);
DBG((dbg, LEVEL_1, "\tassigning register %s(%d) to %+F\n", arch_register_get_name(reg), col, irn));
/* Clear the color upon a use. */
else if(!b->is_def) {
- const arch_register_t *reg = arch_get_irn_register(arch_env, irn);
+ const arch_register_t *reg = arch_get_irn_register(irn);
int col;
assert(reg && "Register must have been assigned");
bitset_clear(live, nr);
}
}
-
- del_pset(live_in);
}
void be_ra_chordal_color(be_chordal_env_t *chordal_env)
{
be_chordal_alloc_env_t env;
char buf[256];
+ be_lv_t *lv;
be_irg_t *birg = chordal_env->birg;
const arch_register_class_t *cls = chordal_env->cls;
int colors_n = arch_register_class_n_regs(cls);
ir_graph *irg = chordal_env->irg;
- int allocatable_regs = colors_n - be_put_ignore_regs(birg, cls, NULL);
- /* some special classes contain only ignore regs, no work to be done */
- if(allocatable_regs == 0)
- return;
+ lv = be_assure_liveness(birg);
+ be_liveness_assure_sets(lv);
+ be_liveness_assure_chk(lv);
- be_assure_dom_front(birg);
- be_assure_liveness(birg);
assure_doms(irg);
env.chordal_env = chordal_env;
env.in_colors = bitset_alloca(colors_n);
env.pre_colored = pset_new_ptr_default();
+ BE_TIMER_PUSH(t_constr);
+
/* Handle register targeting constraints */
dom_tree_walk_irg(irg, constraints, NULL, &env);
be_dump(chordal_env->irg, buf, dump_ir_block_graph_sched);
}
+ BE_TIMER_POP(t_constr);
+
env.live = bitset_malloc(get_irg_last_idx(chordal_env->irg));
/* First, determine the pressure */
void be_init_chordal(void)
{
- FIRM_DBG_REGISTER(dbg, "firm.be.chordal.constr");
+ FIRM_DBG_REGISTER(dbg, "firm.be.chordal");
}
BE_REGISTER_MODULE_CONSTRUCTOR(be_init_chordal);