/**
* Chordal register allocation.
* @author Sebastian Hack
- * @date 8.12.2004
+ * @date 8.12.2004
+ * @cvs-id $Id$
*
* Copyright (C) Universitaet Karlsruhe
* Released under the GPL
#include "irgwalk.h"
#include "irdump.h"
#include "irdom.h"
+#include "irtools.h"
#include "debug.h"
#include "xmalloc.h"
#include "beirgmod.h"
#include "beifg.h"
#include "beinsn_t.h"
+#include "bestatevent.h"
#include "bechordal_t.h"
#include "bechordal_draw.h"
#define NO_COLOR (-1)
-#define MAX(x, y) ((x) > (y) ? (x) : (y))
-#define MIN(x, y) ((x) < (y) ? (x) : (y))
-
#define DUMP_INTERVALS
typedef struct _be_chordal_alloc_env_t {
/* Make a fourcc for border checking. */
#define BORDER_FOURCC FOURCC('B', 'O', 'R', 'D')
+#if 0
static void check_border_list(struct list_head *head)
{
border_t *x;
check_border_list(ent->value);
}
}
-
+#endif
/**
* Add an interval border to the list of a block's list
*/
static INLINE int has_reg_class(const be_chordal_env_t *env, const ir_node *irn)
{
- // return arch_irn_has_reg_class(env->main_env->arch_env, irn, -1, env->cls);
- return arch_irn_consider_in_reg_alloc(env->birg->main_env->arch_env, env->cls, irn);
+ return arch_irn_has_reg_class(env->birg->main_env->arch_env, irn, -1, env->cls);
+ // return arch_irn_consider_in_reg_alloc(env->birg->main_env->arch_env, env->cls, irn);
}
#define has_limited_constr(req, irn) \
return res;
}
-static be_insn_t *chordal_scan_insn(be_chordal_alloc_env_t *env, ir_node *irn)
+static be_insn_t *chordal_scan_insn(be_chordal_env_t *env, ir_node *irn)
{
be_insn_env_t ie;
- ie.ignore_colors = env->chordal_env->ignore_colors;
- ie.aenv = env->chordal_env->birg->main_env->arch_env;
- ie.obst = &env->chordal_env->obst;
- ie.cls = env->chordal_env->cls;
+ ie.ignore_colors = env->ignore_colors;
+ ie.aenv = env->birg->main_env->arch_env;
+ ie.obst = &env->obst;
+ ie.cls = env->cls;
return be_scan_insn(&ie, irn);
}
+static ir_node *prepare_constr_insn(be_chordal_env_t *env, ir_node *irn)
+{
+ const arch_env_t *aenv = env->birg->main_env->arch_env;
+ bitset_t *def_constr = bitset_alloca(env->cls->n_regs);
+ bitset_t *tmp = bitset_alloca(env->cls->n_regs);
+ ir_node *bl = get_nodes_block(irn);
+
+ be_insn_t *insn;
+ int i, j;
+
+ for (i = get_irn_arity(irn) - 1; i >= 0; --i) {
+ ir_node *op = get_irn_n(irn, i);
+
+ const arch_register_t *reg;
+ arch_register_req_t req;
+
+ if (arch_get_irn_reg_class(aenv, irn, i) == env->cls) {
+ reg = arch_get_irn_register(aenv, op);
+
+ if (reg && arch_register_type_is(reg, ignore)) {
+ arch_get_register_req(aenv, &req, irn, i);
+
+ if (arch_register_req_is(&req, limited)) {
+ bitset_clear_all(tmp);
+ req.limited(req.limited_env, tmp);
+
+ if (! bitset_is_set(tmp, reg->index)) {
+ ir_node *copy = be_new_Copy(env->cls, env->irg, bl, op);
+ be_stat_ev("constr_copy", 1);
+
+ sched_add_before(irn, copy);
+ set_irn_n(irn, i, copy);
+ DBG((env->dbg, LEVEL_3, "inserting ignore arg copy %+F for %+F pos %d\n", copy, irn, i));
+ }
+ }
+ }
+ }
+ }
+
+ insn = chordal_scan_insn(env, irn);
+
+ if(!insn->has_constraints)
+ goto end;
+
+ /* insert copies for nodes that occur constrained more than once. */
+ for(i = insn->use_start; i < insn->n_ops; ++i) {
+ be_operand_t *op = &insn->ops[i];
+
+ if(op->has_constraints) {
+ for(j = i + 1; j < insn->n_ops; ++j) {
+ be_operand_t *a_op = &insn->ops[j];
+
+ if(a_op->carrier == op->carrier && a_op->has_constraints) {
+ ir_node *copy = be_new_Copy(env->cls, env->irg, bl, op->carrier);
+ be_stat_ev("constr_copy", 1);
+
+ sched_add_before(insn->irn, copy);
+ set_irn_n(insn->irn, a_op->pos, copy);
+ DBG((env->dbg, LEVEL_3, "inserting multiple constr copy %+F for %+F pos %d\n", copy, insn->irn, a_op->pos));
+ }
+ }
+ }
+ }
+
+ /* collect all registers occuring in out constraints. */
+ for(i = 0; i < insn->use_start; ++i) {
+ be_operand_t *op = &insn->ops[i];
+ if(op->has_constraints)
+ bitset_or(def_constr, op->regs);
+ }
+
+ /*
+ insert copies for all constrained arguments living through the node
+ and being constrained to a register which also occurs in out constraints.
+ */
+ for(i = insn->use_start; i < insn->n_ops; ++i) {
+ be_operand_t *op = &insn->ops[i];
+
+ bitset_copy(tmp, op->regs);
+ bitset_and(tmp, def_constr);
+
+ /*
+ Check, if
+ 1) the operand is constrained.
+ 2) lives through the node.
+ 3) is constrained to a register occuring in out constraints.
+ */
+ if(op->has_constraints && values_interfere(env->lv, insn->irn, op->carrier) && bitset_popcnt(tmp) > 0) {
+ /*
+ only create the copy if the operand is no copy.
+ this is necessary since the assure constraints phase inserts
+ Copies and Keeps for operands which must be different from the results.
+ Additional copies here would destroy this.
+ */
+ if(!be_is_Copy(op->carrier)) {
+ ir_node *copy = be_new_Copy(env->cls, env->irg, bl, op->carrier);
+
+ sched_add_before(insn->irn, copy);
+ set_irn_n(insn->irn, op->pos, copy);
+ DBG((env->dbg, LEVEL_3, "inserting constr copy %+F for %+F pos %d\n", copy, insn->irn, op->pos));
+ be_liveness_update(env->lv, op->carrier);
+ }
+ }
+ }
+
+end:
+ obstack_free(&env->obst, insn);
+ return insn->next_insn;
+}
+
+static void pre_spill_prepare_constr_walker(ir_node *bl, void *data)
+{
+ be_chordal_env_t *env = data;
+ ir_node *irn;
+ for(irn = sched_first(bl); !sched_is_end(irn);) {
+ irn = prepare_constr_insn(env, irn);
+ }
+}
+
+void be_pre_spill_prepare_constr(be_chordal_env_t *cenv) {
+ irg_block_walk_graph(cenv->irg, pre_spill_prepare_constr_walker, NULL, (void *) cenv);
+}
+
static void pair_up_operands(const be_chordal_alloc_env_t *alloc_env, be_insn_t *insn)
{
const be_chordal_env_t *env = alloc_env->chordal_env;
- int n_uses = be_insn_n_uses(insn);
- int n_defs = be_insn_n_defs(insn);
- bitset_t *bs = bitset_alloca(env->cls->n_regs);
- bipartite_t *bp = bipartite_new(n_defs, n_uses);
- int *pairing = alloca(MAX(n_defs, n_uses) * sizeof(pairing[0]));
+ int n_uses = be_insn_n_uses(insn);
+ int n_defs = be_insn_n_defs(insn);
+ bitset_t *bs = bitset_alloca(env->cls->n_regs);
+ int *pairing = alloca(MAX(n_defs, n_uses) * sizeof(pairing[0]));
int i, j;
For each out operand, try to find an in operand which can be assigned the
same register as the out operand.
*/
- for(j = 0; j < insn->use_start; ++j) {
+ for (j = 0; j < insn->use_start; ++j) {
+ int smallest = -1;
+ int smallest_n_regs = 2 * env->cls->n_regs + 1;
be_operand_t *out_op = &insn->ops[j];
/* Try to find an in operand which has ... */
for(i = insn->use_start; i < insn->n_ops; ++i) {
+ int n_total;
const be_operand_t *op = &insn->ops[i];
- /*
- The in operand can only be paired with a def, if the node defining the
- operand's value does not interfere with the instruction itself. That
- would mean, that it is live at the instruction, so no result of the instruction
- can have the same register as the operand.
-
- Furthermore, tow operands can be paired, if the admissible registers
- of one are a subset of the other's. We record the operand whose constraints
- count in the decisive array.
- */
- if(!values_interfere(op->irn, op->carrier)) {
- if(get_decisive_partner_regs(bs, out_op, op))
- bipartite_add(bp, j, i - insn->use_start);
+ if (! values_interfere(env->lv, op->irn, op->carrier) && ! op->partner) {
+ bitset_clear_all(bs);
+ bitset_copy(bs, op->regs);
+ bitset_and(bs, out_op->regs);
+ n_total = bitset_popcnt(op->regs) + bitset_popcnt(out_op->regs);
+
+ if (bitset_popcnt(bs) > 0 && n_total < smallest_n_regs) {
+ smallest = i;
+ smallest_n_regs = n_total;
+ }
}
}
- }
- /* Compute the pairing. */
- bipartite_matching(bp, pairing);
- for(i = 0; i < insn->use_start; ++i) {
- int p = pairing[i] + insn->use_start;
-
- if(p >= insn->use_start) {
- insn->ops[i].partner = &insn->ops[p];
- insn->ops[p].partner = &insn->ops[i];
+ if (smallest >= 0) {
+ be_operand_t *partner = &insn->ops[smallest];
+ out_op->partner = partner;
+ partner->partner = out_op;
}
}
-
- bipartite_free(bp);
}
bitset_or(out_constr, op->regs);
}
- /*
- Now, figure out which input operand must be copied since it has input
- constraints which are also output constraints.
- */
- for(i = insn->use_start; i < insn->n_ops; ++i) {
- be_operand_t *op = &insn->ops[i];
- if(op->has_constraints && (values_interfere(op->carrier, insn->irn) || arch_irn_is(aenv, op->carrier, ignore))) {
- bitset_copy(bs, op->regs);
- bitset_and(bs, out_constr);
-
- /*
- The operand (interfering with the node) has input constraints
- which also occur as output constraints, so insert a copy.
- */
- if(bitset_popcnt(bs) > 0) {
- copy = be_new_Copy(op->req.cls, env->irg, bl, op->carrier);
- insn->ops[i].carrier = copy;
- sched_add_before(insn->irn, copy);
-
- DBG((dbg, LEVEL_2, "adding copy for interfering and constrained op %+F\n", op->carrier));
- }
- }
- }
+ (void) bl;
+ (void) copy;
+ (void) bs;
+ DEBUG_ONLY((void) dbg;)
/*
Make the Perm, recompute liveness and re-scan the insn since the
in operands are now the Projs of the Perm.
*/
- perm = insert_Perm_after(aenv, env->cls, env->dom_front, sched_prev(insn->irn));
+ perm = insert_Perm_after(aenv, env->lv, env->cls, env->dom_front, sched_prev(insn->irn));
/* Registers are propagated by insert_Perm_after(). Clean them here! */
if(perm) {
const ir_edge_t *edge;
+ be_stat_ev("constr_perm", get_irn_arity(perm));
foreach_out_edge(perm, edge) {
ir_node *proj = get_edge_src_irn(edge);
arch_set_irn_register(aenv, proj, NULL);
the Perm. Recomputing liveness is also a good idea if a Perm is inserted, since
the live sets may change.
*/
- be_liveness(env->irg);
+ // be_liveness_recompute(env->lv);
obstack_free(&env->obst, insn);
- *the_insn = insn = chordal_scan_insn(alloc_env, insn->irn);
+ *the_insn = insn = chordal_scan_insn(env, insn->irn);
/*
Copy the input constraints of the insn to the Perm as output
{
be_chordal_env_t *env = alloc_env->chordal_env;
void *base = obstack_base(&env->obst);
- be_insn_t *insn = chordal_scan_insn(alloc_env, irn);
+ be_insn_t *insn = chordal_scan_insn(env, irn);
ir_node *res = insn->next_insn;
int be_silent = *silent;
}
/*
- Put all nodes which live by the constrained instruction also to the
+ Put all nodes which live through the constrained instruction also to the
allocation bipartite graph. They are considered unconstrained.
*/
if(perm) {
assert(is_Proj(proj));
- if(values_interfere(proj, irn) && !pmap_contains(partners, proj)) {
+ if(values_interfere(env->lv, proj, irn) && !pmap_contains(partners, proj)) {
assert(n_alloc < n_regs);
alloc_nodes[n_alloc] = proj;
pmap_insert(partners, proj, NULL);
bitset_clear_all(bs);
arch_put_non_ignore_regs(aenv, env->cls, bs);
+ bitset_andnot(bs, env->ignore_colors);
bitset_foreach(bs, col)
bipartite_add(bp, n_alloc, col);
}
}
+ bipartite_free(bp);
pmap_destroy(partners);
}
unsigned step = 0;
unsigned pressure = 0;
struct list_head *head;
- pset *live_in = put_live_in(block, pset_new_ptr_default());
- pset *live_end = put_live_end(block, pset_new_ptr_default());
+ pset *live_in = be_lv_pset_put_in(env->lv, block, pset_new_ptr_default());
+ pset *live_end = be_lv_pset_put_end(env->lv, block, pset_new_ptr_default());
DBG((dbg, LEVEL_1, "Computing pressure in block %+F\n", block));
bitset_clear_all(live);
*/
foreach_pset(live_end, irn) {
if(has_reg_class(env, irn)) {
- DBG((dbg, LEVEL_3, "\tMaking live: %+F/%d\n", irn, get_irn_graph_nr(irn)));
- bitset_set(live, get_irn_graph_nr(irn));
+ DBG((dbg, LEVEL_3, "\tMaking live: %+F/%d\n", irn, get_irn_idx(irn)));
+ bitset_set(live, get_irn_idx(irn));
border_use(irn, step, 0);
}
}
*/
sched_foreach_reverse(block, irn) {
DBG((dbg, LEVEL_1, "\tinsn: %+F, pressure: %d\n", irn, pressure));
- DBG((dbg, LEVEL_2, "\tlive: %b\n", live));
+ DBG((dbg, LEVEL_2, "\tlive: %B\n", live));
/*
* If the node defines some value, which can put into a
* register of the current class, make a border for it.
*/
if(has_reg_class(env, irn)) {
- int nr = get_irn_graph_nr(irn);
+ int nr = get_irn_idx(irn);
bitset_clear(live, nr);
border_def(irn, step, 1);
ir_node *op = get_irn_n(irn, i);
if(has_reg_class(env, op)) {
- int nr = get_irn_graph_nr(op);
-
- DBG((dbg, LEVEL_4, "\t\tpos: %d, use: %+F\n", i, op));
+ int nr = get_irn_idx(op);
+ const char *msg = "-";
if(!bitset_is_set(live, nr)) {
border_use(op, step, 1);
bitset_set(live, nr);
+ msg = "X";
}
+
+ DBG((dbg, LEVEL_4, "\t\t%s pos: %d, use: %+F\n", msg, i, op));
}
}
}
if(has_reg_class(env, irn)) {
/* Mark the value live in. */
- bitset_set(live, get_irn_graph_nr(irn));
+ bitset_set(live, get_irn_idx(irn));
/* Add the def */
border_def(irn, step, 0);
bitset_t *colors = alloc_env->colors;
bitset_t *in_colors = alloc_env->in_colors;
const arch_env_t *arch_env = env->birg->main_env->arch_env;
- DEBUG_ONLY(firm_dbg_module_t *dbg = env->dbg;)
+ struct list_head *head = get_block_border_head(env, block);
+ pset *live_in = be_lv_pset_put_in(env->lv, block, pset_new_ptr_default());
const ir_node *irn;
border_t *b;
- struct list_head *head = get_block_border_head(env, block);
- pset *live_in = put_live_in(block, pset_new_ptr_default());
+ DEBUG_ONLY(firm_dbg_module_t *dbg = env->dbg;)
bitset_clear_all(colors);
bitset_clear_all(live);
DBG((dbg, LEVEL_4, "\tusedef chain for block\n"));
list_for_each_entry(border_t, b, head, list) {
DBG((dbg, LEVEL_4, "\t%s %+F/%d\n", b->is_def ? "def" : "use",
- b->irn, get_irn_graph_nr(b->irn)));
+ b->irn, get_irn_idx(b->irn)));
}
/*
assert(reg && "Node must have been assigned a register");
col = arch_register_get_index(reg);
+ DBG((dbg, LEVEL_4, "%+F has reg %s\n", irn, reg->name));
+
/* Mark the color of the live in value as used. */
bitset_set(colors, col);
bitset_set(in_colors, col);
/* Mark the value live in. */
- bitset_set(live, get_irn_graph_nr(irn));
+ bitset_set(live, get_irn_idx(irn));
}
}
*/
list_for_each_entry_reverse(border_t, b, head, list) {
ir_node *irn = b->irn;
- int nr = get_irn_graph_nr(irn);
+ int nr = get_irn_idx(irn);
+ int ignore = arch_irn_is(arch_env, irn, ignore);
/*
* Assign a color, if it is a local def. Global defs already have a
* color.
*/
- if(b->is_def && !is_live_in(block, irn)) {
+ if(b->is_def && !be_is_live_in(env->lv, block, irn)) {
const arch_register_t *reg;
int col = NO_COLOR;
- if(pset_find_ptr(alloc_env->pre_colored, irn)) {
+ if(pset_find_ptr(alloc_env->pre_colored, irn) || ignore) {
reg = arch_get_irn_register(arch_env, irn);
col = reg->index;
assert(!bitset_is_set(colors, col) && "pre-colored register must be free");
bitset_set(colors, col);
arch_set_irn_register(arch_env, irn, reg);
- DBG((dbg, LEVEL_1, "\tassigning register %s(%d) to %+F\n",
- arch_register_get_name(reg), col, irn));
+ DBG((dbg, LEVEL_1, "\tassigning register %s(%d) to %+F\n", arch_register_get_name(reg), col, irn));
assert(!bitset_is_set(live, nr) && "Value's definition must not have been encountered");
bitset_set(live, nr);
ir_graph *irg = chordal_env->irg;
- if(get_irg_dom_state(irg) != dom_consistent)
- compute_doms(irg);
+ assure_doms(irg);
env.chordal_env = chordal_env;
env.colors_n = colors_n;
be_dump(chordal_env->irg, buf, dump_ir_block_graph_sched);
}
- be_numbering(irg);
- env.live = bitset_malloc(get_graph_node_count(chordal_env->irg));
+ env.live = bitset_malloc(get_irg_last_idx(chordal_env->irg));
/* First, determine the pressure */
dom_tree_walk_irg(irg, pressure, NULL, &env);
plotter_free(plotter);
}
+ bitset_free(env.live);
del_pset(env.pre_colored);
}
projects / libfirm / blobdiff