- Split bearch.h correctly into bearch.h and bearch_t.h
[libfirm] / ir / be / bechordal.c
index a83c52a..3ee60f5 100644 (file)
@@ -1,32 +1,26 @@
 /**
  * Chordal register allocation.
  * @author Sebastian Hack
- * @date 8.12.2004
+ * @date   8.12.2004
+ * @cvs-id $Id$
  *
  * Copyright (C) Universitaet Karlsruhe
  * Released under the GPL
  */
-
 #ifdef HAVE_CONFIG_H
 #include "config.h"
 #endif
 
-#ifdef HAVE_MALLOC_H
-#include <malloc.h>
-#endif
-
-#ifdef HAVE_ALLOCA_H
-#include <alloca.h>
-#endif
-
 #include <ctype.h>
 
 #include "obst.h"
 #include "pset.h"
 #include "list.h"
 #include "bitset.h"
+#include "raw_bitset.h"
 #include "iterator.h"
 #include "bipartite.h"
+#include "hungarian.h"
 
 #include "irmode_t.h"
 #include "irgraph_t.h"
 #include "irgwalk.h"
 #include "irdump.h"
 #include "irdom.h"
+#include "irtools.h"
 #include "debug.h"
 #include "xmalloc.h"
 
 #include "beutil.h"
 #include "besched.h"
-#include "benumb_t.h"
 #include "besched_t.h"
 #include "belive_t.h"
 #include "benode_t.h"
-#include "bearch.h"
+#include "bearch_t.h"
 #include "beirgmod.h"
 #include "beifg.h"
+#include "beinsn_t.h"
+#include "bestatevent.h"
+#include "beirg_t.h"
 
 #include "bechordal_t.h"
 #include "bechordal_draw.h"
 
-#define DBG_LEVEL SET_LEVEL_0
-#define DBG_LEVEL_CHECK SET_LEVEL_0
+DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
 
 #define NO_COLOR (-1)
 
-#define MAX(x, y) ((x) > (y) ? (x) : (y))
-#define MIN(x, y) ((x) < (y) ? (x) : (y))
-
 #define DUMP_INTERVALS
 
 typedef struct _be_chordal_alloc_env_t {
        be_chordal_env_t *chordal_env;
 
-       firm_dbg_module_t *constr_dbg;  /**< Debug output for the constraint handler. */
        pset *pre_colored;              /**< Set of precolored nodes. */
        bitset_t *live;                             /**< A liveness bitset. */
        bitset_t *tmp_colors;           /**< An auxiliary bitset which is as long as the number of colors in the class. */
        bitset_t *colors;                           /**< The color mask. */
        bitset_t *in_colors;            /**< Colors used by live in values. */
-       bitset_t *ignore_regs;          /**< A bitset of all ignore registers in the current class. */
        int colors_n;                   /**< The number of colors. */
 } be_chordal_alloc_env_t;
 
@@ -78,6 +69,7 @@ typedef struct _be_chordal_alloc_env_t {
 /* Make a fourcc for border checking. */
 #define BORDER_FOURCC                          FOURCC('B', 'O', 'R', 'D')
 
+#if 0
 static void check_border_list(struct list_head *head)
 {
   border_t *x;
@@ -94,7 +86,7 @@ static void check_heads(be_chordal_env_t *env)
     check_border_list(ent->value);
   }
 }
-
+#endif
 
 /**
  * Add an interval border to the list of a block's list
@@ -132,8 +124,8 @@ static INLINE border_t *border_add(be_chordal_env_t *env, struct list_head *head
                 */
                set_irn_link(irn, def);
 
-               b->magic = BORDER_FOURCC;
-               def->magic = BORDER_FOURCC;
+               DEBUG_ONLY(b->magic = BORDER_FOURCC);
+               DEBUG_ONLY(def->magic = BORDER_FOURCC);
        }
 
        /*
@@ -153,7 +145,7 @@ static INLINE border_t *border_add(be_chordal_env_t *env, struct list_head *head
        b->irn = irn;
        b->step = step;
        list_add_tail(&b->list, head);
-       DBG((env->dbg, LEVEL_5, "\t\t%s adding %+F, step: %d\n", is_def ? "def" : "use", irn, step));
+       DBG((dbg, LEVEL_5, "\t\t%s adding %+F, step: %d\n", is_def ? "def" : "use", irn, step));
 
 
        return b;
@@ -167,8 +159,8 @@ static INLINE border_t *border_add(be_chordal_env_t *env, struct list_head *head
  */
 static INLINE int has_reg_class(const be_chordal_env_t *env, const ir_node *irn)
 {
-       // return arch_irn_has_reg_class(env->main_env->arch_env, irn, -1, env->cls);
-       return arch_irn_consider_in_reg_alloc(env->birg->main_env->arch_env, env->cls, irn);
+       return arch_irn_has_reg_class(env->birg->main_env->arch_env, irn, -1, env->cls);
+       // return arch_irn_consider_in_reg_alloc(env->birg->main_env->arch_env, env->cls, irn);
 }
 
 #define has_limited_constr(req, irn) \
@@ -178,158 +170,190 @@ static int get_next_free_reg(const be_chordal_alloc_env_t *alloc_env, bitset_t *
 {
        bitset_t *tmp = alloc_env->tmp_colors;
        bitset_copy(tmp, colors);
-       bitset_or(tmp, alloc_env->ignore_regs);
+       bitset_or(tmp, alloc_env->chordal_env->ignore_colors);
        return bitset_next_clear(tmp, 0);
 }
 
-typedef struct _operand_t operand_t;
+static bitset_t *get_decisive_partner_regs(bitset_t *bs, const be_operand_t *o1, const be_operand_t *o2)
+{
+       bitset_t *res = bs;
 
-struct _operand_t {
-       ir_node *irn;
-       ir_node *carrier;
-       operand_t *partner;
-       bitset_t *regs;
-       int pos;
-       arch_register_req_t req;
-       unsigned has_constraints : 1;
-};
-
-typedef struct {
-       operand_t *ops;
-       int n_ops;
-       int use_start;
-       ir_node *next_insn;
-       ir_node *irn;
-       unsigned in_constraints  : 1;
-       unsigned out_constraints : 1;
-       unsigned has_constraints : 1;
-       unsigned pre_colored     : 1;
-} insn_t;
+       if(!o1) {
+               bitset_copy(bs, o2->regs);
+               return bs;
+       }
 
-#define insn_n_defs(insn) ((insn)->use_start)
-#define insn_n_uses(insn) ((insn)->n_ops - (insn)->use_start)
+       if(!o2) {
+               bitset_copy(bs, o1->regs);
+               return bs;
+       }
+
+       assert(o1->req->cls == o2->req->cls || ! o1->req->cls || ! o2->req->cls);
 
-static insn_t *scan_insn(be_chordal_alloc_env_t *alloc_env, ir_node *irn, struct obstack *obst)
+       if(bitset_contains(o1->regs, o2->regs))
+               bitset_copy(bs, o1->regs);
+       else if(bitset_contains(o2->regs, o1->regs))
+               bitset_copy(bs, o2->regs);
+       else
+               res = NULL;
+
+       return res;
+}
+
+static be_insn_t *chordal_scan_insn(be_chordal_env_t *env, ir_node *irn)
 {
-       const be_chordal_env_t *env = alloc_env->chordal_env;
-       const arch_env_t *arch_env  = env->birg->main_env->arch_env;
-       operand_t o;
-       insn_t *insn;
-       int i, n;
-       int pre_colored = 0;
-
-       insn = obstack_alloc(obst, sizeof(insn[0]));
-       memset(insn, 0, sizeof(insn[0]));
-
-       insn->irn       = irn;
-       insn->next_insn = sched_next(irn);
-       if(get_irn_mode(irn) == mode_T) {
-               ir_node *p;
-
-               for(p = sched_next(irn); is_Proj(p); p = sched_next(p)) {
-                       if(arch_irn_consider_in_reg_alloc(arch_env, env->cls, p)) {
-                               arch_get_register_req(arch_env, &o.req, p, -1);
-                               o.carrier         = p;
-                               o.irn             = irn;
-                               o.pos             = -(get_Proj_proj(p) + 1);
-                               o.partner         = NULL;
-                               o.has_constraints = arch_register_req_is(&o.req, limited);
-                               obstack_grow(obst, &o, sizeof(o));
-                               insn->n_ops++;
-                               insn->out_constraints |= o.has_constraints;
-                               pre_colored += arch_get_irn_register(arch_env, p) != NULL;
-                       }
-               }
+       be_insn_env_t ie;
 
-               insn->next_insn = p;
-       }
+       ie.ignore_colors = env->ignore_colors;
+       ie.aenv          = env->birg->main_env->arch_env;
+       ie.obst          = &env->obst;
+       ie.cls           = env->cls;
+       return be_scan_insn(&ie, irn);
+}
 
-       else if(arch_irn_consider_in_reg_alloc(arch_env, env->cls, irn)) {
-               arch_get_register_req(arch_env, &o.req, irn, -1);
-               o.carrier = irn;
-               o.irn     = irn;
-               o.pos     = -1;
-               o.partner = NULL;
-               o.has_constraints = arch_register_req_is(&o.req, limited);
-               obstack_grow(obst, &o, sizeof(o));
-               insn->n_ops++;
-               insn->out_constraints |= o.has_constraints;
-               pre_colored += arch_get_irn_register(arch_env, irn) != NULL;
-       }
+static ir_node *prepare_constr_insn(be_chordal_env_t *env, ir_node *irn)
+{
+       const arch_env_t *aenv = env->birg->main_env->arch_env;
+       bitset_t *tmp          = bitset_alloca(env->cls->n_regs);
+       bitset_t *def_constr   = bitset_alloca(env->cls->n_regs);
+       ir_node *bl            = get_nodes_block(irn);
+       be_lv_t *lv            = env->birg->lv;
 
-       insn->pre_colored = pre_colored == insn->n_ops && insn->n_ops > 0;
-       insn->use_start   = insn->n_ops;
+       be_insn_t *insn;
+       int i, j;
 
-       for(i = 0, n = get_irn_arity(irn); i < n; ++i) {
+       for (i = get_irn_arity(irn) - 1; i >= 0; --i) {
                ir_node *op = get_irn_n(irn, i);
+               ir_node *copy;
+               const arch_register_t *reg;
+               const arch_register_req_t *req;
 
-               if(arch_irn_consider_in_reg_alloc(arch_env, env->cls, op)) {
-                       arch_get_register_req(arch_env, &o.req, irn, i);
-                       o.carrier = op;
-                       o.irn     = irn;
-                       o.pos     = i;
-                       o.partner = NULL;
-                       o.has_constraints = arch_register_req_is(&o.req, limited);
-                       obstack_grow(obst, &o, sizeof(o));
-                       insn->n_ops++;
-                       insn->in_constraints |= o.has_constraints;
-               }
-       }
+               if (arch_get_irn_reg_class(aenv, irn, i) != env->cls)
+                       continue;
+
+               reg = arch_get_irn_register(aenv, op);
+
+               if (reg == NULL || !arch_register_type_is(reg, ignore))
+                       continue;
+               if(arch_register_type_is(reg, joker))
+                       continue;
 
-       insn->has_constraints = insn->in_constraints | insn->out_constraints;
-       insn->ops = obstack_finish(obst);
+               req = arch_get_register_req(aenv, irn, i);
+               if (!arch_register_req_is(req, limited))
+                       continue;
 
-       /* Compute the admissible registers bitsets. */
-       for(i = 0; i < insn->n_ops; ++i) {
-               operand_t *op = &insn->ops[i];
+               if (rbitset_is_set(req->limited, reg->index))
+                       continue;
 
-               assert(op->req.cls == env->cls);
-               op->regs   = bitset_obstack_alloc(obst, env->cls->n_regs);
+               copy = be_new_Copy(env->cls, env->irg, bl, op);
+               be_stat_ev("constr_copy", 1);
 
-               if(arch_register_req_is(&op->req, limited))
-                       op->req.limited(op->req.limited_env, op->regs);
-               else
-                       arch_put_non_ignore_regs(env->birg->main_env->arch_env, env->cls, op->regs);
+               sched_add_before(irn, copy);
+               set_irn_n(irn, i, copy);
+               DBG((dbg, LEVEL_3, "inserting ignore arg copy %+F for %+F pos %d\n", copy, irn, i));
        }
 
-       return insn;
-}
+    insn = chordal_scan_insn(env, irn);
 
-static bitset_t *get_decisive_partner_regs(bitset_t *bs, const operand_t *o1, const operand_t *o2)
-{
-       bitset_t *res = bs;
+       if(!insn->has_constraints)
+               goto end;
 
-       if(!o1) {
-               bitset_copy(bs, o2->regs);
-               return bs;
+       /* insert copies for nodes that occur constrained more than once. */
+       for(i = insn->use_start; i < insn->n_ops; ++i) {
+               be_operand_t *op = &insn->ops[i];
+
+               if(!op->has_constraints)
+                       continue;
+
+               for(j = i + 1; j < insn->n_ops; ++j) {
+                       ir_node *copy;
+                       be_operand_t *a_op = &insn->ops[j];
+
+                       if(a_op->carrier != op->carrier || !a_op->has_constraints)
+                               continue;
+
+                       copy = be_new_Copy(env->cls, env->irg, bl, op->carrier);
+                       be_stat_ev("constr_copy", 1);
+
+                       sched_add_before(insn->irn, copy);
+                       set_irn_n(insn->irn, a_op->pos, copy);
+                       DBG((dbg, LEVEL_3, "inserting multiple constr copy %+F for %+F pos %d\n", copy, insn->irn, a_op->pos));
+               }
        }
 
-       if(!o2) {
-               bitset_copy(bs, o1->regs);
-               return bs;
+       /* collect all registers occuring in out constraints. */
+       for(i = 0; i < insn->use_start; ++i) {
+               be_operand_t *op = &insn->ops[i];
+               if(op->has_constraints)
+                       bitset_or(def_constr, op->regs);
        }
 
-       assert(o1->req.cls == o2->req.cls);
+       /*
+               insert copies for all constrained arguments living through the node
+               and being constrained to a register which also occurs in out constraints.
+       */
+       for(i = insn->use_start; i < insn->n_ops; ++i) {
+               ir_node *copy;
+               be_operand_t *op = &insn->ops[i];
+
+               bitset_copy(tmp, op->regs);
+               bitset_and(tmp, def_constr);
 
-       if(bitset_contains(o1->regs, o2->regs))
-               bitset_copy(bs, o1->regs);
-       else if(bitset_contains(o2->regs, o1->regs))
-               bitset_copy(bs, o2->regs);
-       else
-               res = NULL;
+               /*
+                       Check, if
+                       1) the operand is constrained.
+                       2) lives through the node.
+                       3) is constrained to a register occuring in out constraints.
+               */
+               if(!op->has_constraints ||
+                               !values_interfere(lv, insn->irn, op->carrier) ||
+                               bitset_popcnt(tmp) == 0)
+                       continue;
 
-       return res;
+               /*
+                  only create the copy if the operand is no copy.
+                  this is necessary since the assure constraints phase inserts
+                  Copies and Keeps for operands which must be different from the results.
+                  Additional copies here would destroy this.
+                */
+               if(be_is_Copy(op->carrier))
+                       continue;
+
+               copy = be_new_Copy(env->cls, env->irg, bl, op->carrier);
+
+               sched_add_before(insn->irn, copy);
+               set_irn_n(insn->irn, op->pos, copy);
+               DBG((dbg, LEVEL_3, "inserting constr copy %+F for %+F pos %d\n", copy, insn->irn, op->pos));
+               be_liveness_update(lv, op->carrier);
+       }
+
+end:
+       obstack_free(&env->obst, insn);
+       return insn->next_insn;
 }
 
-static void pair_up_operands(const be_chordal_alloc_env_t *alloc_env, insn_t *insn)
+static void pre_spill_prepare_constr_walker(ir_node *bl, void *data)
+{
+       be_chordal_env_t *env = data;
+       ir_node *irn;
+       for(irn = sched_first(bl); !sched_is_end(irn);) {
+               irn = prepare_constr_insn(env, irn);
+       }
+}
+
+void be_pre_spill_prepare_constr(be_chordal_env_t *cenv) {
+       irg_block_walk_graph(cenv->irg, pre_spill_prepare_constr_walker, NULL, (void *) cenv);
+}
+
+static void pair_up_operands(const be_chordal_alloc_env_t *alloc_env, be_insn_t *insn)
 {
        const be_chordal_env_t *env = alloc_env->chordal_env;
 
-       int n_uses         = insn_n_uses(insn);
-       int n_defs         = insn_n_defs(insn);
-       bitset_t *bs       = bitset_alloca(env->cls->n_regs);
-       bipartite_t *bp    = bipartite_new(n_defs, n_uses);
-       int *pairing       = alloca(MAX(n_defs, n_uses) * sizeof(pairing[0]));
+       int n_uses   = be_insn_n_uses(insn);
+       int n_defs   = be_insn_n_defs(insn);
+       bitset_t *bs = bitset_alloca(env->cls->n_regs);
+       int *pairing = alloca(MAX(n_defs, n_uses) * sizeof(pairing[0]));
+       be_lv_t *lv  = env->birg->lv;
 
        int i, j;
 
@@ -337,57 +361,50 @@ static void pair_up_operands(const be_chordal_alloc_env_t *alloc_env, insn_t *in
                For each out operand, try to find an in operand which can be assigned the
                same register as the out operand.
        */
-       for(j = 0; j < insn->use_start; ++j) {
-               operand_t *out_op = &insn->ops[j];
+       for (j = 0; j < insn->use_start; ++j) {
+               int smallest         = -1;
+               int smallest_n_regs  = 2 * env->cls->n_regs + 1;
+               be_operand_t *out_op = &insn->ops[j];
 
                /* Try to find an in operand which has ... */
                for(i = insn->use_start; i < insn->n_ops; ++i) {
-                       const operand_t *op = &insn->ops[i];
-
-                       /*
-                       The in operand can only be paired with a def, if the node defining the
-                       operand's value does not interfere with the instruction itself. That
-                       would mean, that it is live at the instruction, so no result of the instruction
-                       can have the same register as the operand.
-
-                       Furthermore, tow operands can be paired, if the admissible registers
-                       of one are a subset of the other's. We record the operand whose constraints
-                       count in the decisive array.
-                       */
-                       if(!values_interfere(op->irn, op->carrier)) {
-                               if(get_decisive_partner_regs(bs, out_op, op))
-                                       bipartite_add(bp, j, i - insn->use_start);
+                       int n_total;
+                       const be_operand_t *op = &insn->ops[i];
+
+                       if (op->partner != NULL)
+                               continue;
+                       if (values_interfere(lv, op->irn, op->carrier))
+                               continue;
+
+                       bitset_clear_all(bs);
+                       bitset_copy(bs, op->regs);
+                       bitset_and(bs, out_op->regs);
+                       n_total = bitset_popcnt(op->regs) + bitset_popcnt(out_op->regs);
+
+                       if (bitset_popcnt(bs) > 0 && n_total < smallest_n_regs) {
+                               smallest = i;
+                               smallest_n_regs = n_total;
                        }
                }
-       }
-
-       /* Compute the pairing. */
-       bipartite_matching(bp, pairing);
-       for(i = 0; i < insn->use_start; ++i) {
-               int p = pairing[i] + insn->use_start;
 
-               if(p >= insn->use_start) {
-                       insn->ops[i].partner = &insn->ops[p];
-                       insn->ops[p].partner = &insn->ops[i];
+               if (smallest >= 0) {
+                       be_operand_t *partner = &insn->ops[smallest];
+                       out_op->partner  = partner;
+                       partner->partner = out_op;
                }
        }
-
-       bipartite_free(bp);
 }
 
 
-static ir_node *pre_process_constraints(be_chordal_alloc_env_t *alloc_env, insn_t **the_insn)
+static ir_node *pre_process_constraints(be_chordal_alloc_env_t *alloc_env,
+                                        be_insn_t **the_insn)
 {
        be_chordal_env_t *env       = alloc_env->chordal_env;
        const arch_env_t *aenv      = env->birg->main_env->arch_env;
-       firm_dbg_module_t *dbg      = alloc_env->constr_dbg;
-       insn_t *insn                = *the_insn;
-       ir_node *bl                 = get_nodes_block(insn->irn);
-       ir_node *copy               = NULL;
+       be_insn_t *insn             = *the_insn;
        ir_node *perm               = NULL;
        bitset_t *out_constr        = bitset_alloca(env->cls->n_regs);
-       bitset_t *bs                = bitset_alloca(env->cls->n_regs);
-
+       const ir_edge_t *edge;
        int i;
 
        assert(insn->has_constraints && "only do this for constrained nodes");
@@ -399,73 +416,49 @@ static ir_node *pre_process_constraints(be_chordal_alloc_env_t *alloc_env, insn_
                be copied.
        */
        for(i = 0; i < insn->use_start; ++i) {
-               operand_t *op = &insn->ops[i];
+               be_operand_t *op = &insn->ops[i];
                if(op->has_constraints)
                        bitset_or(out_constr, op->regs);
        }
 
-       /*
-               Now, figure out which input operand must be copied since it has input
-               constraints which are also output constraints.
-       */
-       for(i = insn->use_start; i < insn->n_ops; ++i) {
-               operand_t *op = &insn->ops[i];
-               if(op->has_constraints && (values_interfere(op->carrier, insn->irn) || arch_irn_is(aenv, op->carrier, ignore))) {
-                       bitset_copy(bs, op->regs);
-                       bitset_and(bs, out_constr);
-
-                       /*
-                               The operand (interfering with the node) has input constraints
-                               which also occur as output constraints, so insert a copy.
-                       */
-                       if(bitset_popcnt(bs) > 0) {
-                               copy                 = be_new_Copy(op->req.cls, env->irg, bl, op->carrier);
-                               insn->ops[i].carrier = copy;
-                               sched_add_before(insn->irn, copy);
-
-                               DBG((dbg, LEVEL_2, "adding copy for interfering and constrained op %+F\n", op->carrier));
-                       }
-               }
-       }
-
        /*
                Make the Perm, recompute liveness and re-scan the insn since the
                in operands are now the Projs of the Perm.
        */
-       perm = insert_Perm_after(aenv, env->cls, env->dom_front, sched_prev(insn->irn));
+       perm = insert_Perm_after(env->birg, env->cls, sched_prev(insn->irn));
 
        /* Registers are propagated by insert_Perm_after(). Clean them here! */
-       if(perm) {
-               const ir_edge_t *edge;
+       if(perm == NULL)
+               return NULL;
 
-               foreach_out_edge(perm, edge) {
-                       ir_node *proj = get_edge_src_irn(edge);
-                       arch_set_irn_register(aenv, proj, NULL);
-               }
+       be_stat_ev("constr_perm", get_irn_arity(perm));
+       foreach_out_edge(perm, edge) {
+               ir_node *proj = get_edge_src_irn(edge);
+               arch_set_irn_register(aenv, proj, NULL);
+       }
 
-               /*
-                       We also have to re-build the insn since the input operands are now the Projs of
-                       the Perm. Recomputing liveness is also a good idea if a Perm is inserted, since
-                       the live sets may change.
-               */
-               be_liveness(env->irg);
-               obstack_free(&env->obst, insn);
-               *the_insn = insn = scan_insn(alloc_env, insn->irn, &env->obst);
+       /*
+               We also have to re-build the insn since the input operands are now the Projs of
+               the Perm. Recomputing liveness is also a good idea if a Perm is inserted, since
+               the live sets may change.
+       */
+       // be_liveness_recompute(lv);
+       obstack_free(&env->obst, insn);
+       *the_insn = insn = chordal_scan_insn(env, insn->irn);
 
+       /*
+               Copy the input constraints of the insn to the Perm as output
+               constraints. Succeeding phases (coalescing) will need that.
+       */
+       for(i = insn->use_start; i < insn->n_ops; ++i) {
+               be_operand_t *op = &insn->ops[i];
+               ir_node *proj = op->carrier;
                /*
-                       Copy the input constraints of the insn to the Perm as output
-                       constraints. Succeeding phases (coalescing will need that).
+                       Note that the predecessor must not be a Proj of the Perm,
+                       since ignore-nodes are not Perm'ed.
                */
-               for(i = insn->use_start; i < insn->n_ops; ++i) {
-                       operand_t *op = &insn->ops[i];
-                       ir_node *proj = op->carrier;
-                       /*
-                               Note that the predecessor must not be a Proj of the Perm,
-                               since ignore-nodes are not Perm'ed.
-                       */
-                       if(op->has_constraints &&  is_Proj(proj) && get_Proj_pred(proj) == perm) {
-                               be_set_constr_limited(perm, BE_OUT_POS(get_Proj_proj(proj)), &op->req);
-                       }
+               if(op->has_constraints &&  is_Proj(proj) && get_Proj_pred(proj) == perm) {
+                       be_set_constr_limited(perm, BE_OUT_POS(get_Proj_proj(proj)), op->req);
                }
        }
 
@@ -474,11 +467,24 @@ static ir_node *pre_process_constraints(be_chordal_alloc_env_t *alloc_env, insn_
 
 static ir_node *handle_constraints(be_chordal_alloc_env_t *alloc_env, ir_node *irn, int *silent)
 {
+       const arch_env_t *aenv;
+       int n_regs;
+       bitset_t *bs;
+       ir_node **alloc_nodes;
+       hungarian_problem_t *bp;
+       int *assignment;
+       pmap *partners;
+       int i, n_alloc;
+       long col;
+       const ir_edge_t *edge;
+       ir_node *perm = NULL;
+       int match_res, cost;
        be_chordal_env_t *env  = alloc_env->chordal_env;
        void *base             = obstack_base(&env->obst);
-       insn_t *insn           = scan_insn(alloc_env, irn, &env->obst);
+       be_insn_t *insn        = chordal_scan_insn(env, irn);
        ir_node *res           = insn->next_insn;
        int be_silent          = *silent;
+       be_lv_t *lv            = env->birg->lv;
 
        if(insn->pre_colored) {
                int i;
@@ -503,149 +509,154 @@ static ir_node *handle_constraints(be_chordal_alloc_env_t *alloc_env, ir_node *i
                Perms inserted before the constraint handling phase are considered to be
                correctly precolored. These Perms arise during the ABI handling phase.
        */
-       if(insn->has_constraints) {
-               firm_dbg_module_t *dbg = alloc_env->constr_dbg;
-               const arch_env_t *aenv = env->birg->main_env->arch_env;
-               int n_regs             = env->cls->n_regs;
-               bitset_t *bs           = bitset_alloca(n_regs);
-               ir_node **alloc_nodes  = alloca(n_regs * sizeof(alloc_nodes[0]));
-               bipartite_t *bp        = bipartite_new(n_regs, n_regs);
-               int *assignment        = alloca(n_regs * sizeof(assignment[0]));
-               pmap *partners         = pmap_create();
-
-               int i, n_alloc;
-               long col;
-               const ir_edge_t *edge;
-               ir_node *perm = NULL;
+       if(!insn->has_constraints)
+               goto end;
 
-               /*
-                       prepare the constraint handling of this node.
-                       Perms are constructed and Copies are created for constrained values
-                       interfering with the instruction.
-               */
-               perm = pre_process_constraints(alloc_env, &insn);
+       aenv        = env->birg->main_env->arch_env;
+       n_regs      = env->cls->n_regs;
+       bs          = bitset_alloca(n_regs);
+       alloc_nodes = alloca(n_regs * sizeof(alloc_nodes[0]));
+       bp          = hungarian_new(n_regs, n_regs, 2, HUNGARIAN_MATCH_PERFECT);
+       // bipartite_t *bp        = bipartite_new(n_regs, n_regs);
+       assignment  = alloca(n_regs * sizeof(assignment[0]));
+       partners    = pmap_create();
 
-               /* find suitable in operands to the out operands of the node. */
-               pair_up_operands(alloc_env, insn);
+       /*
+               prepare the constraint handling of this node.
+               Perms are constructed and Copies are created for constrained values
+               interfering with the instruction.
+       */
+       perm = pre_process_constraints(alloc_env, &insn);
 
-               /*
-                       look at the in/out operands and add each operand (and its possible partner)
-                       to a bipartite graph (left: nodes with partners, right: admissible colors).
-               */
-               for(i = 0, n_alloc = 0; i < insn->n_ops; ++i) {
-                       operand_t *op = &insn->ops[i];
+       /* find suitable in operands to the out operands of the node. */
+       pair_up_operands(alloc_env, insn);
 
-                       /*
-                               If the operand has no partner or the partner has not been marked
-                               for allocation, determine the admissible registers and mark it
-                               for allocation by associating the node and its partner with the
-                               set of admissible registers via a bipartite graph.
-                       */
-                       if(!op->partner || !pmap_contains(partners, op->partner->carrier)) {
+       /*
+               look at the in/out operands and add each operand (and its possible partner)
+               to a bipartite graph (left: nodes with partners, right: admissible colors).
+       */
+       for(i = 0, n_alloc = 0; i < insn->n_ops; ++i) {
+               be_operand_t *op = &insn->ops[i];
 
-                               pmap_insert(partners, op->carrier, op->partner ? op->partner->carrier : NULL);
-                               alloc_nodes[n_alloc] = op->carrier;
+               /*
+                       If the operand has no partner or the partner has not been marked
+                       for allocation, determine the admissible registers and mark it
+                       for allocation by associating the node and its partner with the
+                       set of admissible registers via a bipartite graph.
+               */
+               if(!op->partner || !pmap_contains(partners, op->partner->carrier)) {
 
-                               DBG((dbg, LEVEL_2, "\tassociating %+F and %+F\n", op->carrier, op->partner ? op->partner->carrier : NULL));
+                       pmap_insert(partners, op->carrier, op->partner ? op->partner->carrier : NULL);
+                       alloc_nodes[n_alloc] = op->carrier;
 
-                               bitset_clear_all(bs);
-                               get_decisive_partner_regs(bs, op, op->partner);
+                       DBG((dbg, LEVEL_2, "\tassociating %+F and %+F\n", op->carrier, op->partner ? op->partner->carrier : NULL));
 
-                               DBG((dbg, LEVEL_2, "\tallowed registers for %+F: %B\n", op->carrier, bs));
+                       bitset_clear_all(bs);
+                       get_decisive_partner_regs(bs, op, op->partner);
 
-                               bitset_foreach(bs, col)
-                                       bipartite_add(bp, n_alloc, col);
+                       DBG((dbg, LEVEL_2, "\tallowed registers for %+F: %B\n", op->carrier, bs));
 
-                               n_alloc++;
+                       bitset_foreach(bs, col) {
+                               hungarian_add(bp, n_alloc, col, 1);
+                               // bipartite_add(bp, n_alloc, col);
                        }
+
+                       n_alloc++;
                }
+       }
 
-               /*
-                       Put all nodes which live by the constrained instruction also to the
-                       allocation bipartite graph. They are considered unconstrained.
-               */
-               if(perm) {
-                       foreach_out_edge(perm, edge) {
-                               ir_node *proj = get_edge_src_irn(edge);
+       /*
+               Put all nodes which live through the constrained instruction also to the
+               allocation bipartite graph. They are considered unconstrained.
+       */
+       if(perm != NULL) {
+               foreach_out_edge(perm, edge) {
+                       ir_node *proj = get_edge_src_irn(edge);
 
-                               assert(is_Proj(proj));
+                       assert(is_Proj(proj));
 
-                               if(values_interfere(proj, irn) && !pmap_contains(partners, proj)) {
-                                       assert(n_alloc < n_regs);
-                                       alloc_nodes[n_alloc] = proj;
-                                       pmap_insert(partners, proj, NULL);
+                       if(!values_interfere(lv, proj, irn) || pmap_contains(partners, proj))
+                               continue;
 
-                                       bitset_clear_all(bs);
-                                       arch_put_non_ignore_regs(aenv, env->cls, bs);
-                                       bitset_foreach(bs, col)
-                                               bipartite_add(bp, n_alloc, col);
+                       assert(n_alloc < n_regs);
+                       alloc_nodes[n_alloc] = proj;
+                       pmap_insert(partners, proj, NULL);
 
-                                       n_alloc++;
-                               }
+                       bitset_clear_all(bs);
+                       arch_put_non_ignore_regs(aenv, env->cls, bs);
+                       bitset_andnot(bs, env->ignore_colors);
+                       bitset_foreach(bs, col) {
+                               hungarian_add(bp, n_alloc, col, 1);
+                               // bipartite_add(bp, n_alloc, col);
                        }
+
+                       n_alloc++;
                }
+       }
 
-               /* Compute a valid register allocation. */
-               bipartite_matching(bp, assignment);
+       /* Compute a valid register allocation. */
+       hungarian_prepare_cost_matrix(bp, HUNGARIAN_MODE_MAXIMIZE_UTIL);
+       match_res = hungarian_solve(bp, assignment, &cost, 1);
+       assert(match_res == 0 && "matching failed");
+       //bipartite_matching(bp, assignment);
 
-               /* Assign colors obtained from the matching. */
-               for(i = 0; i < n_alloc; ++i) {
-                       const arch_register_t *reg;
-                       ir_node *nodes[2];
-                       int j;
+       /* Assign colors obtained from the matching. */
+       for(i = 0; i < n_alloc; ++i) {
+               const arch_register_t *reg;
+               ir_node *nodes[2];
+               int j;
 
-                       assert(assignment[i] >= 0 && "there must have been a register assigned");
-                       reg = arch_register_for_index(env->cls, assignment[i]);
+               assert(assignment[i] >= 0 && "there must have been a register assigned");
+               reg = arch_register_for_index(env->cls, assignment[i]);
 
-                       nodes[0] = alloc_nodes[i];
-                       nodes[1] = pmap_get(partners, alloc_nodes[i]);
+               nodes[0] = alloc_nodes[i];
+               nodes[1] = pmap_get(partners, alloc_nodes[i]);
 
-                       for(j = 0; j < 2; ++j) {
-                               if(!nodes[j])
-                                       continue;
+               for(j = 0; j < 2; ++j) {
+                       if(!nodes[j])
+                               continue;
 
-                               arch_set_irn_register(aenv, nodes[j], reg);
-                               pset_hinsert_ptr(alloc_env->pre_colored, nodes[j]);
-                               DBG((dbg, LEVEL_2, "\tsetting %+F to register %s\n", nodes[j], reg->name));
-                       }
+                       arch_set_irn_register(aenv, nodes[j], reg);
+                       (void) pset_hinsert_ptr(alloc_env->pre_colored, nodes[j]);
+                       DBG((dbg, LEVEL_2, "\tsetting %+F to register %s\n", nodes[j], reg->name));
                }
+       }
 
+       /* Allocate the non-constrained Projs of the Perm. */
+       if(perm != NULL) {
+               bitset_clear_all(bs);
 
-               /* Allocate the non-constrained Projs of the Perm. */
-               if(perm) {
-
-                       bitset_clear_all(bs);
-
-                       /* Put the colors of all Projs in a bitset. */
-                       foreach_out_edge(perm, edge) {
-                               ir_node *proj              = get_edge_src_irn(edge);
-                               const arch_register_t *reg = arch_get_irn_register(aenv, proj);
+               /* Put the colors of all Projs in a bitset. */
+               foreach_out_edge(perm, edge) {
+                       ir_node *proj              = get_edge_src_irn(edge);
+                       const arch_register_t *reg = arch_get_irn_register(aenv, proj);
 
-                               if(reg != NULL)
-                                       bitset_set(bs, reg->index);
-                       }
+                       if(reg != NULL)
+                               bitset_set(bs, reg->index);
+               }
 
-                       /* Assign the not yet assigned Projs of the Perm a suitable color. */
-                       foreach_out_edge(perm, edge) {
-                               ir_node *proj              = get_edge_src_irn(edge);
-                               const arch_register_t *reg = arch_get_irn_register(aenv, proj);
+               /* Assign the not yet assigned Projs of the Perm a suitable color. */
+               foreach_out_edge(perm, edge) {
+                       ir_node *proj              = get_edge_src_irn(edge);
+                       const arch_register_t *reg = arch_get_irn_register(aenv, proj);
 
-                               DBG((dbg, LEVEL_2, "\tchecking reg of %+F: %s\n", proj, reg ? reg->name : "<none>"));
+                       DBG((dbg, LEVEL_2, "\tchecking reg of %+F: %s\n", proj, reg ? reg->name : "<none>"));
 
-                               if(reg == NULL) {
-                                       col = get_next_free_reg(alloc_env, bs);
-                                       reg = arch_register_for_index(env->cls, col);
-                                       bitset_set(bs, reg->index);
-                                       arch_set_irn_register(aenv, proj, reg);
-                                       pset_insert_ptr(alloc_env->pre_colored, proj);
-                                       DBG((dbg, LEVEL_2, "\tsetting %+F to register %s\n", proj, reg->name));
-                               }
+                       if(reg == NULL) {
+                               col = get_next_free_reg(alloc_env, bs);
+                               reg = arch_register_for_index(env->cls, col);
+                               bitset_set(bs, reg->index);
+                               arch_set_irn_register(aenv, proj, reg);
+                               pset_insert_ptr(alloc_env->pre_colored, proj);
+                               DBG((dbg, LEVEL_2, "\tsetting %+F to register %s\n", proj, reg->name));
                        }
                }
-
-               pmap_destroy(partners);
        }
 
+       //bipartite_free(bp);
+       hungarian_free(bp);
+       pmap_destroy(partners);
+
 end:
        obstack_free(&env->obst, base);
        return res;
@@ -699,15 +710,15 @@ static void pressure(ir_node *block, void *env_ptr)
        be_chordal_alloc_env_t *alloc_env = env_ptr;
        be_chordal_env_t *env             = alloc_env->chordal_env;
        bitset_t *live                    = alloc_env->live;
-       firm_dbg_module_t *dbg            = env->dbg;
        ir_node *irn;
+       be_lv_t *lv                       = env->birg->lv;
 
        int i, n;
        unsigned step = 0;
        unsigned pressure = 0;
        struct list_head *head;
-       pset *live_in = put_live_in(block, pset_new_ptr_default());
-       pset *live_end = put_live_end(block, pset_new_ptr_default());
+       pset *live_in  = be_lv_pset_put_in(lv, block, pset_new_ptr_default());
+       pset *live_end = be_lv_pset_put_end(lv, block, pset_new_ptr_default());
 
        DBG((dbg, LEVEL_1, "Computing pressure in block %+F\n", block));
        bitset_clear_all(live);
@@ -722,10 +733,10 @@ static void pressure(ir_node *block, void *env_ptr)
         * Make final uses of all values live out of the block.
         * They are necessary to build up real intervals.
         */
-       for(irn = pset_first(live_end); irn; irn = pset_next(live_end)) {
+       foreach_pset(live_end, irn) {
                if(has_reg_class(env, irn)) {
-                       DBG((dbg, LEVEL_3, "\tMaking live: %+F/%d\n", irn, get_irn_graph_nr(irn)));
-                       bitset_set(live, get_irn_graph_nr(irn));
+                       DBG((dbg, LEVEL_3, "\tMaking live: %+F/%d\n", irn, get_irn_idx(irn)));
+                       bitset_set(live, get_irn_idx(irn));
                        border_use(irn, step, 0);
                }
        }
@@ -737,14 +748,14 @@ static void pressure(ir_node *block, void *env_ptr)
         */
        sched_foreach_reverse(block, irn) {
                DBG((dbg, LEVEL_1, "\tinsn: %+F, pressure: %d\n", irn, pressure));
-               DBG((dbg, LEVEL_2, "\tlive: %b\n", live));
+               DBG((dbg, LEVEL_2, "\tlive: %B\n", live));
 
                /*
                 * If the node defines some value, which can put into a
                 * register of the current class, make a border for it.
                 */
                if(has_reg_class(env, irn)) {
-                       int nr = get_irn_graph_nr(irn);
+                       int nr = get_irn_idx(irn);
 
                        bitset_clear(live, nr);
                        border_def(irn, step, 1);
@@ -758,14 +769,16 @@ static void pressure(ir_node *block, void *env_ptr)
                                ir_node *op = get_irn_n(irn, i);
 
                                if(has_reg_class(env, op)) {
-                                       int nr = get_irn_graph_nr(op);
-
-                                       DBG((dbg, LEVEL_4, "\t\tpos: %d, use: %+F\n", i, op));
+                                       int nr = get_irn_idx(op);
+                                       const char *msg = "-";
 
                                        if(!bitset_is_set(live, nr)) {
                                                border_use(op, step, 1);
                                                bitset_set(live, nr);
+                                               msg = "X";
                                        }
+
+                                       DBG((dbg, LEVEL_4, "\t\t%s pos: %d, use: %+F\n", msg, i, op));
                                }
                        }
                }
@@ -775,36 +788,35 @@ static void pressure(ir_node *block, void *env_ptr)
        /*
         * Add initial defs for all values live in.
         */
-       for(irn = pset_first(live_in); irn; irn = pset_next(live_in)) {
+       foreach_pset(live_in, irn) {
                if(has_reg_class(env, irn)) {
 
                        /* Mark the value live in. */
-                       bitset_set(live, get_irn_graph_nr(irn));
+                       bitset_set(live, get_irn_idx(irn));
 
                        /* Add the def */
                        border_def(irn, step, 0);
                }
        }
 
-
-  del_pset(live_in);
-  del_pset(live_end);
+       del_pset(live_in);
+       del_pset(live_end);
 }
 
 static void assign(ir_node *block, void *env_ptr)
 {
        be_chordal_alloc_env_t *alloc_env = env_ptr;
        be_chordal_env_t *env       = alloc_env->chordal_env;
-       firm_dbg_module_t *dbg      = env->dbg;
        bitset_t *live              = alloc_env->live;
        bitset_t *colors            = alloc_env->colors;
        bitset_t *in_colors         = alloc_env->in_colors;
        const arch_env_t *arch_env  = env->birg->main_env->arch_env;
+       struct list_head *head      = get_block_border_head(env, block);
+       be_lv_t *lv                 = env->birg->lv;
+       pset *live_in               = be_lv_pset_put_in(lv, block, pset_new_ptr_default());
 
        const ir_node *irn;
        border_t *b;
-       struct list_head *head = get_block_border_head(env, block);
-       pset *live_in = put_live_in(block, pset_new_ptr_default());
 
        bitset_clear_all(colors);
        bitset_clear_all(live);
@@ -814,7 +826,7 @@ static void assign(ir_node *block, void *env_ptr)
        DBG((dbg, LEVEL_4, "\tusedef chain for block\n"));
        list_for_each_entry(border_t, b, head, list) {
                DBG((dbg, LEVEL_4, "\t%s %+F/%d\n", b->is_def ? "def" : "use",
-                                       b->irn, get_irn_graph_nr(b->irn)));
+                                       b->irn, get_irn_idx(b->irn)));
        }
 
        /*
@@ -822,7 +834,7 @@ static void assign(ir_node *block, void *env_ptr)
         * Since their colors have already been assigned (The dominators were
         * allocated before), we have to mark their colors as used also.
         */
-       for(irn = pset_first(live_in); irn; irn = pset_next(live_in)) {
+       foreach_pset(live_in, irn) {
                if(has_reg_class(env, irn)) {
                        const arch_register_t *reg = arch_get_irn_register(arch_env, irn);
                        int col;
@@ -830,40 +842,40 @@ static void assign(ir_node *block, void *env_ptr)
                        assert(reg && "Node must have been assigned a register");
                        col = arch_register_get_index(reg);
 
+                       DBG((dbg, LEVEL_4, "%+F has reg %s\n", irn, reg->name));
+
                        /* Mark the color of the live in value as used. */
                        bitset_set(colors, col);
                        bitset_set(in_colors, col);
 
                        /* Mark the value live in. */
-                       bitset_set(live, get_irn_graph_nr(irn));
+                       bitset_set(live, get_irn_idx(irn));
                }
        }
 
        /*
-        * Mind that the sequence
-        * of defs from back to front defines a perfect
+        * Mind that the sequence of defs from back to front defines a perfect
         * elimination order. So, coloring the definitions from first to last
         * will work.
         */
        list_for_each_entry_reverse(border_t, b, head, list) {
                ir_node *irn = b->irn;
-               int nr = get_irn_graph_nr(irn);
+               int nr       = get_irn_idx(irn);
+               int ignore   = arch_irn_is(arch_env, irn, ignore);
 
                /*
                 * Assign a color, if it is a local def. Global defs already have a
                 * color.
                 */
-               if(b->is_def && !is_live_in(block, irn)) {
+               if(b->is_def && !be_is_live_in(lv, block, irn)) {
                        const arch_register_t *reg;
                        int col = NO_COLOR;
 
-                       if(pset_find_ptr(alloc_env->pre_colored, irn)) {
+                       if(ignore || pset_find_ptr(alloc_env->pre_colored, irn)) {
                                reg = arch_get_irn_register(arch_env, irn);
                                col = reg->index;
                                assert(!bitset_is_set(colors, col) && "pre-colored register must be free");
-                       }
-
-                       else {
+                       } else {
                                col = get_next_free_reg(alloc_env, colors);
                                reg = arch_register_for_index(env->cls, col);
                                assert(arch_get_irn_register(arch_env, irn) == NULL && "This node must not have been assigned a register yet");
@@ -873,8 +885,7 @@ static void assign(ir_node *block, void *env_ptr)
                        bitset_set(colors, col);
                        arch_set_irn_register(arch_env, irn, reg);
 
-                       DBG((dbg, LEVEL_1, "\tassigning register %s(%d) to %+F\n",
-            arch_register_get_name(reg), col, irn));
+                       DBG((dbg, LEVEL_1, "\tassigning register %s(%d) to %+F\n", arch_register_get_name(reg), col, irn));
 
                        assert(!bitset_is_set(live, nr) && "Value's definition must not have been encountered");
                        bitset_set(live, nr);
@@ -888,7 +899,11 @@ static void assign(ir_node *block, void *env_ptr)
                        assert(reg && "Register must have been assigned");
 
                        col = arch_register_get_index(reg);
-                       assert(bitset_is_set(live, nr) && "Cannot have a non live use");
+#ifndef NDEBUG
+                       if(!arch_register_type_is(reg, ignore)) {
+                               assert(bitset_is_set(live, nr) && "Cannot have a non live use");
+                       }
+#endif
 
                        bitset_clear(colors, col);
                        bitset_clear(live, nr);
@@ -902,27 +917,27 @@ void be_ra_chordal_color(be_chordal_env_t *chordal_env)
 {
        be_chordal_alloc_env_t env;
        char buf[256];
-       int i;
+       be_irg_t *birg = chordal_env->birg;
+       const arch_register_class_t *cls = chordal_env->cls;
 
-       int colors_n          = arch_register_class_n_regs(chordal_env->cls);
+       int colors_n          = arch_register_class_n_regs(cls);
        ir_graph *irg         = chordal_env->irg;
+       int allocatable_regs  = colors_n - be_put_ignore_regs(birg, cls, NULL);
 
+       /* some special classes contain only ignore regs, no work to be done */
+       if(allocatable_regs == 0)
+               return;
 
-       if(get_irg_dom_state(irg) != dom_consistent)
-               compute_doms(irg);
+       be_assure_dom_front(birg);
+       be_assure_liveness(birg);
+       assure_doms(irg);
 
        env.chordal_env   = chordal_env;
        env.colors_n      = colors_n;
        env.colors        = bitset_alloca(colors_n);
        env.tmp_colors    = bitset_alloca(colors_n);
        env.in_colors     = bitset_alloca(colors_n);
-       env.ignore_regs   = bitset_alloca(colors_n);
        env.pre_colored   = pset_new_ptr_default();
-       FIRM_DBG_REGISTER(env.constr_dbg, "firm.be.chordal.constr");
-
-       for(i = 0; i < colors_n; ++i)
-               if(arch_register_type_is(&chordal_env->cls->regs[i], ignore))
-                       bitset_set(env.ignore_regs, i);
 
        /* Handle register targeting constraints */
        dom_tree_walk_irg(irg, constraints, NULL, &env);
@@ -932,8 +947,7 @@ void be_ra_chordal_color(be_chordal_env_t *chordal_env)
                be_dump(chordal_env->irg, buf, dump_ir_block_graph_sched);
        }
 
-       be_numbering(irg);
-       env.live = bitset_malloc(get_graph_node_count(chordal_env->irg));
+       env.live = bitset_malloc(get_irg_last_idx(chordal_env->irg));
 
        /* First, determine the pressure */
        dom_tree_walk_irg(irg, pressure, NULL, &env);
@@ -941,15 +955,21 @@ void be_ra_chordal_color(be_chordal_env_t *chordal_env)
        /* Assign the colors */
        dom_tree_walk_irg(irg, assign, NULL, &env);
 
-       be_numbering_done(irg);
-
        if(chordal_env->opts->dump_flags & BE_CH_DUMP_TREE_INTV) {
-       plotter_t *plotter;
+               plotter_t *plotter;
                ir_snprintf(buf, sizeof(buf), "ifg_%s_%F.eps", chordal_env->cls->name, irg);
-       plotter = new_plotter_ps(buf);
-       draw_interval_tree(&draw_chordal_def_opts, chordal_env, plotter);
-       plotter_free(plotter);
+               plotter = new_plotter_ps(buf);
+               draw_interval_tree(&draw_chordal_def_opts, chordal_env, plotter);
+               plotter_free(plotter);
        }
 
+       bitset_free(env.live);
        del_pset(env.pre_colored);
 }
+
+void be_init_chordal(void)
+{
+       FIRM_DBG_REGISTER(dbg, "firm.be.chordal.constr");
+}
+
+BE_REGISTER_MODULE_CONSTRUCTOR(be_init_chordal);