#include "config.h"
#endif
+#ifdef HAVE_MALLOC_H
+#include <malloc.h>
+#endif
+
+#ifdef HAVE_ALLOCA_H
+#include <alloca.h>
+#endif
+
#include <ctype.h>
#include "obst.h"
+#include "pset.h"
#include "list.h"
#include "bitset.h"
#include "iterator.h"
+#include "bipartite.h"
#include "irmode_t.h"
#include "irgraph_t.h"
#include "beutil.h"
#include "besched.h"
-#include "bera_t.h"
#include "benumb_t.h"
#include "besched_t.h"
#include "belive_t.h"
-#include "bechordal_t.h"
+#include "benode_t.h"
#include "bearch.h"
+#include "beirgmod.h"
+#include "beifg.h"
+#include "beinsn_t.h"
-#define BUILD_GRAPH
-#undef DUMP_INTERVALS
-#undef DUMP_PRESSURE
-#undef DUMP_IFG
+#include "bechordal_t.h"
+#include "bechordal_draw.h"
-#if defined(DUMP_IFG) && !defined(BUILD_GRAPH)
-#define BUILD_GRAPH
-#endif
+#define DBG_LEVEL SET_LEVEL_0
+#define DBG_LEVEL_CHECK SET_LEVEL_0
+
+#define NO_COLOR (-1)
+
+#define MAX(x, y) ((x) > (y) ? (x) : (y))
+#define MIN(x, y) ((x) < (y) ? (x) : (y))
+#define DUMP_INTERVALS
+
+typedef struct _be_chordal_alloc_env_t {
+ be_chordal_env_t *chordal_env;
+
+ pset *pre_colored; /**< Set of precolored nodes. */
+ bitset_t *live; /**< A liveness bitset. */
+ bitset_t *tmp_colors; /**< An auxiliary bitset which is as long as the number of colors in the class. */
+ bitset_t *colors; /**< The color mask. */
+ bitset_t *in_colors; /**< Colors used by live in values. */
+ int colors_n; /**< The number of colors. */
+ DEBUG_ONLY(firm_dbg_module_t *constr_dbg;) /**< Debug output for the constraint handler. */
+} be_chordal_alloc_env_t;
-#ifdef DEBUG_libfirm
#include "fourcc.h"
/* Make a fourcc for border checking. */
#define BORDER_FOURCC FOURCC('B', 'O', 'R', 'D')
-#endif /* DEBUG_libfirm */
+static void check_border_list(struct list_head *head)
+{
+ border_t *x;
+ list_for_each_entry(border_t, x, head, list) {
+ assert(x->magic == BORDER_FOURCC);
+ }
+}
-#define TEST_COLORS 2048
+static void check_heads(be_chordal_env_t *env)
+{
+ pmap_entry *ent;
+ for(ent = pmap_first(env->border_heads); ent; ent = pmap_next(env->border_heads)) {
+ /* ir_printf("checking border list of block %+F\n", ent->key); */
+ check_border_list(ent->value);
+ }
+}
-static firm_dbg_module_t *dbg;
/**
- * Environment for each of the chordal register allocator phases
+ * Add an interval border to the list of a block's list
+ * of interval border.
+ * @note You always have to create the use before the def.
+ * @param env The environment.
+ * @param head The list head to enqueue the borders.
+ * @param irn The node (value) the border belongs to.
+ * @param pressure The pressure at this point in time.
+ * @param step A time step for the border.
+ * @param is_def Is the border a use or a def.
+ * @return The created border.
*/
-typedef struct _env_t {
- struct obstack obst; /**< An obstack for temporary storage. */
- ir_graph *irg; /**< The graph the reg alloc is running on. */
-#ifdef BUILD_GRAPH
- set *nodes; /**< The interference graph nodes. */
- set *edges; /**< The interference graph edges. */
-#endif
-
- bitset_t *live; /**< A liveness bitset. */
- bitset_t *colors; /**< The color mask. */
- bitset_t *in_colors; /**< Colors used by live in values. */
- int colors_n; /**< The number of colors. */
- const arch_env_t *arch_env; /**< The arch interface environment. */
- const arch_register_class_t *cls; /**< The current register class. */
- void *data; /**< Some pointer, to which different
- phases can attach data to. */
-} env_t;
-
-
-typedef struct _be_chordal_dump_params_t {
- int x_dist;
- int y_dist;
- double font_scale;
-} be_chordal_dump_params_t;
-
-static const be_chordal_dump_params_t dump_params = {
- 10,
- 10,
- 4
-};
-
-#ifdef DUMP_INTERVALS
-
-static INLINE void intv_filename(char *s, size_t n,
- const env_t *env, ir_node *block)
+static INLINE border_t *border_add(be_chordal_env_t *env, struct list_head *head,
+ ir_node *irn, unsigned step, unsigned pressure,
+ unsigned is_def, unsigned is_real)
{
- ir_snprintf(s, n, "intv_%F_%s_bl%N.eps",
- env->irg, env->cls->name, block);
-}
+ border_t *b;
-static void draw_interval_graph(const env_t *env,
- ir_node *block, const be_chordal_dump_params_t *params)
-{
- int i;
- int x_dist = params->x_dist;
- int y_dist = params->y_dist;
- ir_graph *irg = env->irg;
- struct list_head *border_head = get_block_border_head(block);
-
- FILE *f;
- char buf[1024];
-
- intv_filename(buf, sizeof(buf), env, block);
-
- if((f = fopen(buf, "wt")) != NULL) {
- border_t *b;
- int *seen = xcalloc(get_graph_node_count(irg), sizeof(seen[0]));
- int last_pos = list_empty(border_head) ? 0 : list_entry(border_head->prev, border_t, list)->step;
- int max_col = 0;
-
- list_for_each_entry_reverse(border_t, b, border_head, list) {
- const ir_node *irn = b->irn;
- int col = get_irn_color(irn);
- max_col = max_col > col ? max_col : col;
- }
+ if(!is_def) {
+ border_t *def;
- fprintf(f, "%%!PS-Adobe-2.0\n");
- fprintf(f, "%%%%BoundingBox: -10 -10 %d %d\n",
- x_dist * last_pos + x_dist, y_dist * max_col + y_dist);
- fprintf(f, "/mainfont /Courier findfont %f scalefont def\n", params->font_scale);
- fprintf(f, "mainfont setfont\n");
- fprintf(f, "0.2 setlinewidth\n");
-
- for(i = 0; i <= last_pos; ++i) {
- fprintf(f, "0 0 0 setrgbcolor\n");
- fprintf(f, "%d %d moveto\n", i * x_dist, -2);
- fprintf(f, "%d %d lineto\n", i * x_dist, max_col * y_dist + 2);
- fprintf(f, "stroke\n");
- }
- fprintf(f, "0.5 setlinewidth\n");
+ b = obstack_alloc(&env->obst, sizeof(*b));
- list_for_each_entry_reverse(border_t, b, border_head, list) {
- const ir_node *irn = b->irn;
- int nr = get_irn_graph_nr(irn);
+ /* also allocate the def and tie it to the use. */
+ def = obstack_alloc(&env->obst, sizeof(*def));
+ memset(def, 0, sizeof(*def));
+ b->other_end = def;
+ def->other_end = b;
- if(b->is_def)
- seen[nr] = b->step;
- else {
- int col = get_irn_color(irn);
-
- int pos = last_pos - seen[nr];
- int end_pos = last_pos - b->step;
- int live_in = is_live_in(block, irn);
- int live_end = is_live_end(block, irn);
- int y_val = y_dist * col;
-
- int red = 0;
- int green = live_end;
- int blue = live_in;
-
- fprintf(f, "0 0 0 setrgbcolor\n");
- fprintf(f, "%d %d moveto\n", x_dist * pos + 2, y_val + 2);
- ir_fprintf(f, "(%n/%d%s) show\n", irn, nr, is_phi_operand(irn) ? "*" : "");
- fprintf(f, "%d %d %d setrgbcolor\n", red, green, blue);
- fprintf(f, "%d %d moveto\n", x_dist * pos, y_val);
- fprintf(f, "%d %d lineto\n", (x_dist * end_pos) - 5, y_val);
- fprintf(f, "stroke\n");
- }
- }
+ /*
+ * Set the link field of the irn to the def.
+ * This strongly relies on the fact, that the use is always
+ * made before the def.
+ */
+ set_irn_link(irn, def);
- free(seen);
- fclose(f);
+ b->magic = BORDER_FOURCC;
+ def->magic = BORDER_FOURCC;
}
-}
-static void dump_block(ir_node *bl, void *data)
-{
- const env_t *env = data;
- FILE *f = env->data;
- char buf[128];
+ /*
+ * If the def is encountered, the use was made and so was the
+ * the def node (see the code above). It was placed into the
+ * link field of the irn, so we can get it there.
+ */
+ else {
+ b = get_irn_link(irn);
+
+ assert(b && b->magic == BORDER_FOURCC && "Illegal border encountered");
+ }
- draw_interval_graph(env, bl, &dump_params);
+ b->pressure = pressure;
+ b->is_def = is_def;
+ b->is_real = is_real;
+ b->irn = irn;
+ b->step = step;
+ list_add_tail(&b->list, head);
+ DBG((env->dbg, LEVEL_5, "\t\t%s adding %+F, step: %d\n", is_def ? "def" : "use", irn, step));
- intv_filename(buf, sizeof(buf), env, bl);
- ir_fprintf(f, "\tb%N [shape=\"epsf\" shapefile=\"%s\"];\n", bl, buf);
+
+ return b;
}
-static void dump_edges(ir_node *bl, void *data)
+/**
+ * Check, if an irn is of the register class currently under processing.
+ * @param env The chordal environment.
+ * @param irn The node.
+ * @return 1, if the node is of that register class, 0 if not.
+ */
+static INLINE int has_reg_class(const be_chordal_env_t *env, const ir_node *irn)
{
- const env_t *env = data;
- FILE *f = env->data;
- int i, n;
- ir_node *dom;
-
-#if 0
- for(i = 0, n = get_irn_arity(bl); i < n; ++i) {
- ir_node *pred = get_irn_n(bl, i);
- ir_fprintf(f, "\tb%N -> b%N;\n", get_nodes_block(pred), bl);
- }
-#endif
+ // return arch_irn_has_reg_class(env->main_env->arch_env, irn, -1, env->cls);
+ return arch_irn_consider_in_reg_alloc(env->birg->main_env->arch_env, env->cls, irn);
+}
- for(dom = get_Block_dominated_first(bl); dom;
- dom = get_Block_dominated_next(dom)) {
+#define has_limited_constr(req, irn) \
+ (arch_get_register_req(arch_env, (req), irn, -1) && (req)->type == arch_register_req_type_limited)
- ir_fprintf(f, "\tb%N -> b%N;\n", dom, bl);
- }
+static int get_next_free_reg(const be_chordal_alloc_env_t *alloc_env, bitset_t *colors)
+{
+ bitset_t *tmp = alloc_env->tmp_colors;
+ bitset_copy(tmp, colors);
+ bitset_or(tmp, alloc_env->chordal_env->ignore_colors);
+ return bitset_next_clear(tmp, 0);
}
-static void dump_intv_cfg(env_t *env)
+static bitset_t *get_decisive_partner_regs(bitset_t *bs, const be_operand_t *o1, const be_operand_t *o2)
{
- FILE *f;
- char buf[128];
-
- ir_snprintf(buf, sizeof(buf), "intv_cfg_%s_%F.dot",
- env->cls->name, env->irg);
+ bitset_t *res = bs;
- if((f = fopen(buf, "wt")) != NULL) {
- void *old_data = env->data;
+ if(!o1) {
+ bitset_copy(bs, o2->regs);
+ return bs;
+ }
- env->data = f;
- ir_fprintf(f, "digraph G {\n");
- ir_fprintf(f, "\tgraph [rankdir=\"LR\", ordering=\"out\"];\n");
- dom_tree_walk_irg(env->irg, dump_block, dump_edges, env);
- // irg_block_walk_graph(env->irg, dump_block, dump_edges, env);
- ir_fprintf(f, "}\n");
- fclose(f);
+ if(!o2) {
+ bitset_copy(bs, o1->regs);
+ return bs;
+ }
- env->data = old_data;
- }
-}
+ assert(o1->req.cls == o2->req.cls);
-#endif
+ if(bitset_contains(o1->regs, o2->regs))
+ bitset_copy(bs, o1->regs);
+ else if(bitset_contains(o2->regs, o1->regs))
+ bitset_copy(bs, o2->regs);
+ else
+ res = NULL;
-#ifdef BUILD_GRAPH
-
-#define IF_EDGE_HASH(e) ((e)->src)
-#define IF_NODE_HASH(n) ((n)->nnr)
+ return res;
+}
-static int if_edge_cmp(const void *p1, const void *p2, size_t size)
+static be_insn_t *chordal_scan_insn(be_chordal_alloc_env_t *env, ir_node *irn)
{
- const if_edge_t *e1 = p1;
- const if_edge_t *e2 = p2;
+ be_insn_env_t ie;
- return !(e1->src == e2->src && e1->tgt == e2->tgt);
+ ie.ignore_colors = env->chordal_env->ignore_colors;
+ ie.aenv = env->chordal_env->birg->main_env->arch_env;
+ ie.obst = &env->chordal_env->obst;
+ ie.cls = env->chordal_env->cls;
+ return be_scan_insn(&ie, irn);
}
-static int if_node_cmp(const void *p1, const void *p2, size_t size)
+static void pair_up_operands(const be_chordal_alloc_env_t *alloc_env, be_insn_t *insn)
{
- const if_node_t *n1 = p1;
- const if_node_t *n2 = p2;
+ const be_chordal_env_t *env = alloc_env->chordal_env;
- return n1->nnr != n2->nnr;
-}
+ int n_uses = be_insn_n_uses(insn);
+ int n_defs = be_insn_n_defs(insn);
+ bitset_t *bs = bitset_alloca(env->cls->n_regs);
+ bipartite_t *bp = bipartite_new(n_defs, n_uses);
+ int *pairing = alloca(MAX(n_defs, n_uses) * sizeof(pairing[0]));
-static INLINE if_edge_t *edge_init(if_edge_t *edge, int src, int tgt)
-{
- /* Bring the smaller entry to src. */
- if(src > tgt) {
- edge->src = tgt;
- edge->tgt = src;
- } else {
- edge->src = src;
- edge->tgt = tgt;
+ int i, j;
+
+ /*
+ For each out operand, try to find an in operand which can be assigned the
+ same register as the out operand.
+ */
+ for(j = 0; j < insn->use_start; ++j) {
+ be_operand_t *out_op = &insn->ops[j];
+
+ /* Try to find an in operand which has ... */
+ for(i = insn->use_start; i < insn->n_ops; ++i) {
+ const be_operand_t *op = &insn->ops[i];
+
+ /*
+ The in operand can only be paired with a def, if the node defining the
+ operand's value does not interfere with the instruction itself. That
+ would mean, that it is live at the instruction, so no result of the instruction
+ can have the same register as the operand.
+
+ Furthermore, tow operands can be paired, if the admissible registers
+ of one are a subset of the other's. We record the operand whose constraints
+ count in the decisive array.
+ */
+ if(!values_interfere(op->irn, op->carrier)) {
+ if(get_decisive_partner_regs(bs, out_op, op))
+ bipartite_add(bp, j, i - insn->use_start);
+ }
+ }
}
- return edge;
-}
+ /* Compute the pairing. */
+ bipartite_matching(bp, pairing);
+ for(i = 0; i < insn->use_start; ++i) {
+ int p = pairing[i] + insn->use_start;
-static INLINE void add_if(const env_t *env, int src, int tgt)
-{
- if_edge_t edge;
- if_node_t node, *src_node, *tgt_node;
- /* insert edge */
- edge_init(&edge, src, tgt);
- set_insert(env->edges, &edge, sizeof(edge), IF_EDGE_HASH(&edge));
-
- /* insert nodes */
- node.nnr = src;
- node.neighb = pset_new_ptr(8);
- src_node = set_insert(env->nodes, &node, sizeof(node), IF_NODE_HASH(&node));
- node.nnr = tgt;
- node.neighb = pset_new_ptr(8);
- tgt_node = set_insert(env->nodes, &node, sizeof(node), IF_NODE_HASH(&node));
-
- /* insert neighbors into nodes */
- pset_insert_ptr(src_node->neighb, tgt_node);
- pset_insert_ptr(tgt_node->neighb, src_node);
-}
+ if(p >= insn->use_start) {
+ insn->ops[i].partner = &insn->ops[p];
+ insn->ops[p].partner = &insn->ops[i];
+ }
+ }
-static INLINE int are_connected(const env_t *env, int src, int tgt)
-{
- if_edge_t edge;
- edge_init(&edge, src, tgt);
- return set_find(env->edges, &edge, sizeof(edge), IF_EDGE_HASH(&edge)) != NULL;
+ bipartite_free(bp);
}
-int ifg_has_edge(const ir_graph *irg, if_node_t *n1, if_node_t* n2) {
- return are_connected(get_irg_ra_link(irg), n1->nnr, n2->nnr);
-}
-static void dump_ifg(ir_graph *irg, set *edges, const char *filename)
+static ir_node *pre_process_constraints(be_chordal_alloc_env_t *alloc_env, be_insn_t **the_insn)
{
- static const char *colors[] = {
- "coral",
- "azure",
- "bisque",
- "aliceblue",
- "blanchedalmond",
- "deeppink",
- "cornsilk",
- "blueviolet",
- "floralwhite",
- "hotpink",
- "gainsboro",
- "indianred",
- "cornflowerblue",
- "ghostwhite",
- "lightpink",
- "palegoldenrod",
- "darkslateblue",
- "honeydew",
- "ivory",
- "lavender",
- "mediumvioletred",
- "indigo",
- "lavenderblush",
- "lemonchiffon",
- "linen",
- "pink",
- "mintcream",
- "red",
- "mediumblue",
- "mistyrose",
- "mediumslateblue",
- "moccasin",
- "tomato",
- "forestgreen",
- "midnightblue",
- "navajowhite",
- "navy",
- "oldlace",
- "greenyellow",
- "navyblue",
- "papayawhip",
- "lawngreen",
- "powderblue",
- "peachpuff",
- "seashell",
- "snow",
- "thistle",
- "wheat",
- "darkkhaki",
- "mintcream",
- "khaki",
- "Magentas",
- "whitesmoke",
- "peru",
- "palegreen",
- "blueviolet",
- "rosybrown",
- "saddlebrown",
- "springgreen",
- "darkviolet",
- "darkslategray",
- "dimgray",
- "sienna",
- "gray",
- "tan",
- "gray",
- "mediumvioletred",
- "lightgray",
- "Oranges",
- "cyan",
- "lightslategray",
- "darkorange",
- "slategray",
- "orangered",
- "mediumturquoise",
- "violet",
- "paleturquoise"
- };
-
- static const int n_colors = sizeof(colors) / sizeof(colors[0]);
-
- FILE *f;
-
- if((f = fopen(filename, "wt")) != NULL) {
- bitset_pos_t pos;
- int n_edges = 0;
- if_edge_t *edge;
- bitset_t *bs = bitset_malloc(get_graph_node_count(irg));
-
- ir_fprintf(f, "graph \"%F\" {\n", irg);
- fprintf(f, "\tnode [shape=box,style=filled]\n");
-
- for(edge = set_first(edges); edge; edge = set_next(edges)) {
- bitset_set(bs, edge->src);
- bitset_set(bs, edge->tgt);
- n_edges++;
- }
+ be_chordal_env_t *env = alloc_env->chordal_env;
+ const arch_env_t *aenv = env->birg->main_env->arch_env;
+ be_insn_t *insn = *the_insn;
+ ir_node *bl = get_nodes_block(insn->irn);
+ ir_node *copy = NULL;
+ ir_node *perm = NULL;
+ bitset_t *out_constr = bitset_alloca(env->cls->n_regs);
+ bitset_t *bs = bitset_alloca(env->cls->n_regs);
+ DEBUG_ONLY(firm_dbg_module_t *dbg = alloc_env->constr_dbg;)
- fprintf(f, "\tx [label=\"nodes: %u, edges: %d\"]\n", bitset_popcnt(bs), n_edges);
+ int i;
- bitset_foreach(bs, pos) {
- int nr = (int) pos;
- ir_node *irn = get_irn_for_graph_nr(irg, nr);
- int color = get_irn_color(irn);
+ assert(insn->has_constraints && "only do this for constrained nodes");
- ir_fprintf(f, "\tn%d [label=\"%n\",color=\"%s\"]\n", nr, irn,
- color >= 0 && color < n_colors ? colors[color] : "black");
+ /*
+ Collect all registers that occur in output constraints.
+ This is necessary, since if the insn has one of these as an input constraint
+ and the corresponding operand interferes with the insn, the operand must
+ be copied.
+ */
+ for(i = 0; i < insn->use_start; ++i) {
+ be_operand_t *op = &insn->ops[i];
+ if(op->has_constraints)
+ bitset_or(out_constr, op->regs);
+ }
+
+ /*
+ Now, figure out which input operand must be copied since it has input
+ constraints which are also output constraints.
+ */
+ for(i = insn->use_start; i < insn->n_ops; ++i) {
+ be_operand_t *op = &insn->ops[i];
+ if(op->has_constraints && (values_interfere(op->carrier, insn->irn) || arch_irn_is(aenv, op->carrier, ignore))) {
+ bitset_copy(bs, op->regs);
+ bitset_and(bs, out_constr);
+
+ /*
+ The operand (interfering with the node) has input constraints
+ which also occur as output constraints, so insert a copy.
+ */
+ if(bitset_popcnt(bs) > 0) {
+ copy = be_new_Copy(op->req.cls, env->irg, bl, op->carrier);
+ op->carrier = copy;
+ sched_add_before(insn->irn, copy);
+ set_irn_n(insn->irn, op->pos, op->carrier);
+
+ DBG((dbg, LEVEL_2, "adding copy for interfering and constrained op %+F\n", op->carrier));
+ }
}
+ }
- for(edge = set_first(edges); edge; edge = set_next(edges)) {
- fprintf(f, "\tn%d -- n%d [len=5]\n", edge->src, edge->tgt);
+ /*
+ Make the Perm, recompute liveness and re-scan the insn since the
+ in operands are now the Projs of the Perm.
+ */
+ perm = insert_Perm_after(aenv, env->cls, env->dom_front, sched_prev(insn->irn));
+
+ /* Registers are propagated by insert_Perm_after(). Clean them here! */
+ if(perm) {
+ const ir_edge_t *edge;
+
+ foreach_out_edge(perm, edge) {
+ ir_node *proj = get_edge_src_irn(edge);
+ arch_set_irn_register(aenv, proj, NULL);
}
- fprintf(f, "}\n");
- fclose(f);
+ /*
+ We also have to re-build the insn since the input operands are now the Projs of
+ the Perm. Recomputing liveness is also a good idea if a Perm is inserted, since
+ the live sets may change.
+ */
+ be_liveness(env->irg);
+ obstack_free(&env->obst, insn);
+ *the_insn = insn = chordal_scan_insn(alloc_env, insn->irn);
- bitset_free(bs);
+ /*
+ Copy the input constraints of the insn to the Perm as output
+ constraints. Succeeding phases (coalescing will need that).
+ */
+ for(i = insn->use_start; i < insn->n_ops; ++i) {
+ be_operand_t *op = &insn->ops[i];
+ ir_node *proj = op->carrier;
+ /*
+ Note that the predecessor must not be a Proj of the Perm,
+ since ignore-nodes are not Perm'ed.
+ */
+ if(op->has_constraints && is_Proj(proj) && get_Proj_pred(proj) == perm) {
+ be_set_constr_limited(perm, BE_OUT_POS(get_Proj_proj(proj)), &op->req);
+ }
+ }
}
+ return perm;
}
-#endif /* BUILD_GRAPH */
+static ir_node *handle_constraints(be_chordal_alloc_env_t *alloc_env, ir_node *irn, int *silent)
+{
+ be_chordal_env_t *env = alloc_env->chordal_env;
+ void *base = obstack_base(&env->obst);
+ be_insn_t *insn = chordal_scan_insn(alloc_env, irn);
+ ir_node *res = insn->next_insn;
+ int be_silent = *silent;
+
+ if(insn->pre_colored) {
+ int i;
+ for(i = 0; i < insn->use_start; ++i)
+ pset_insert_ptr(alloc_env->pre_colored, insn->ops[i].carrier);
+ }
+ /*
+ If the current node is a barrier toggle the silent flag.
+ If we are in the start block, we are ought to be silent at the beginning,
+ so the toggling activates the constraint handling but skips the barrier.
+ If we are in the end block we handle the in requirements of the barrier
+ and set the rest to silent.
+ */
+ if(be_is_Barrier(irn))
+ *silent = !*silent;
+
+ if(be_silent)
+ goto end;
-/**
- * Add an interval border to the list of a block's list
- * of interval border.
- * @note You always have to create the use before the def.
- * @param env The environment.
- * @param head The list head to enqueue the borders.
- * @param irn The node (value) the border belongs to.
- * @param pressure The pressure at this point in time.
- * @param step A time step for the border.
- * @param is_def Is the border a use or a def.
- * @return The created border.
- */
-static INLINE border_t *border_add(env_t *env, struct list_head *head,
- ir_node *irn, unsigned step, unsigned pressure,
- unsigned is_def, unsigned is_real)
-{
- border_t *b;
+ /*
+ Perms inserted before the constraint handling phase are considered to be
+ correctly precolored. These Perms arise during the ABI handling phase.
+ */
+ if(insn->has_constraints) {
+ const arch_env_t *aenv = env->birg->main_env->arch_env;
+ int n_regs = env->cls->n_regs;
+ bitset_t *bs = bitset_alloca(n_regs);
+ ir_node **alloc_nodes = alloca(n_regs * sizeof(alloc_nodes[0]));
+ bipartite_t *bp = bipartite_new(n_regs, n_regs);
+ int *assignment = alloca(n_regs * sizeof(assignment[0]));
+ pmap *partners = pmap_create();
+ DEBUG_ONLY(firm_dbg_module_t *dbg = alloc_env->constr_dbg;)
+
+ int i, n_alloc;
+ long col;
+ const ir_edge_t *edge;
+ ir_node *perm = NULL;
- if(!is_def) {
- border_t *def;
+ /*
+ prepare the constraint handling of this node.
+ Perms are constructed and Copies are created for constrained values
+ interfering with the instruction.
+ */
+ perm = pre_process_constraints(alloc_env, &insn);
- b = obstack_alloc(&env->obst, sizeof(*b));
+ /* find suitable in operands to the out operands of the node. */
+ pair_up_operands(alloc_env, insn);
- /* also allocate the def and tie it to the use. */
- def = obstack_alloc(&env->obst, sizeof(*def));
- b->other_end = def;
- def->other_end = b;
+ /*
+ look at the in/out operands and add each operand (and its possible partner)
+ to a bipartite graph (left: nodes with partners, right: admissible colors).
+ */
+ for(i = 0, n_alloc = 0; i < insn->n_ops; ++i) {
+ be_operand_t *op = &insn->ops[i];
+
+ /*
+ If the operand has no partner or the partner has not been marked
+ for allocation, determine the admissible registers and mark it
+ for allocation by associating the node and its partner with the
+ set of admissible registers via a bipartite graph.
+ */
+ if(!op->partner || !pmap_contains(partners, op->partner->carrier)) {
+
+ pmap_insert(partners, op->carrier, op->partner ? op->partner->carrier : NULL);
+ alloc_nodes[n_alloc] = op->carrier;
+
+ DBG((dbg, LEVEL_2, "\tassociating %+F and %+F\n", op->carrier, op->partner ? op->partner->carrier : NULL));
+
+ bitset_clear_all(bs);
+ get_decisive_partner_regs(bs, op, op->partner);
+
+ DBG((dbg, LEVEL_2, "\tallowed registers for %+F: %B\n", op->carrier, bs));
+
+ bitset_foreach(bs, col)
+ bipartite_add(bp, n_alloc, col);
+
+ n_alloc++;
+ }
+ }
/*
- * Set the link field of the irn to the def.
- * This strongly relies on the fact, that the use is always
- * made before the def.
- */
- set_irn_link(irn, def);
+ Put all nodes which live by the constrained instruction also to the
+ allocation bipartite graph. They are considered unconstrained.
+ */
+ if(perm) {
+ foreach_out_edge(perm, edge) {
+ ir_node *proj = get_edge_src_irn(edge);
+
+ assert(is_Proj(proj));
+
+ if(values_interfere(proj, irn) && !pmap_contains(partners, proj)) {
+ assert(n_alloc < n_regs);
+ alloc_nodes[n_alloc] = proj;
+ pmap_insert(partners, proj, NULL);
+
+ bitset_clear_all(bs);
+ arch_put_non_ignore_regs(aenv, env->cls, bs);
+ bitset_foreach(bs, col)
+ bipartite_add(bp, n_alloc, col);
+
+ n_alloc++;
+ }
+ }
+ }
-#ifdef DEBUG_libfirm
- b->magic = BORDER_FOURCC;
- def->magic = BORDER_FOURCC;
-#endif
- }
+ /* Compute a valid register allocation. */
+ bipartite_matching(bp, assignment);
- /*
- * If the def is encountered, the use was made and so was the
- * the def node (see the code above). It was placed into the
- * link field of the irn, so we can get it there.
- */
- else {
- b = get_irn_link(irn);
+ /* Assign colors obtained from the matching. */
+ for(i = 0; i < n_alloc; ++i) {
+ const arch_register_t *reg;
+ ir_node *nodes[2];
+ int j;
-#ifdef DEBUG_libfirm
- assert(b && b->magic == BORDER_FOURCC && "Illegal border encountered");
-#endif
+ assert(assignment[i] >= 0 && "there must have been a register assigned");
+ reg = arch_register_for_index(env->cls, assignment[i]);
+
+ nodes[0] = alloc_nodes[i];
+ nodes[1] = pmap_get(partners, alloc_nodes[i]);
+
+ for(j = 0; j < 2; ++j) {
+ if(!nodes[j])
+ continue;
+
+ arch_set_irn_register(aenv, nodes[j], reg);
+ pset_hinsert_ptr(alloc_env->pre_colored, nodes[j]);
+ DBG((dbg, LEVEL_2, "\tsetting %+F to register %s\n", nodes[j], reg->name));
+ }
+ }
+
+
+ /* Allocate the non-constrained Projs of the Perm. */
+ if(perm) {
+
+ bitset_clear_all(bs);
+
+ /* Put the colors of all Projs in a bitset. */
+ foreach_out_edge(perm, edge) {
+ ir_node *proj = get_edge_src_irn(edge);
+ const arch_register_t *reg = arch_get_irn_register(aenv, proj);
+
+ if(reg != NULL)
+ bitset_set(bs, reg->index);
+ }
+
+ /* Assign the not yet assigned Projs of the Perm a suitable color. */
+ foreach_out_edge(perm, edge) {
+ ir_node *proj = get_edge_src_irn(edge);
+ const arch_register_t *reg = arch_get_irn_register(aenv, proj);
+
+ DBG((dbg, LEVEL_2, "\tchecking reg of %+F: %s\n", proj, reg ? reg->name : "<none>"));
+
+ if(reg == NULL) {
+ col = get_next_free_reg(alloc_env, bs);
+ reg = arch_register_for_index(env->cls, col);
+ bitset_set(bs, reg->index);
+ arch_set_irn_register(aenv, proj, reg);
+ pset_insert_ptr(alloc_env->pre_colored, proj);
+ DBG((dbg, LEVEL_2, "\tsetting %+F to register %s\n", proj, reg->name));
+ }
+ }
+ }
+
+ pmap_destroy(partners);
}
- b->pressure = pressure;
- b->is_def = is_def;
- b->is_real = is_real;
- b->irn = irn;
- b->step = step;
- list_add_tail(&b->list, head);
- DBG((dbg, LEVEL_5, "\t\t%s adding %n, step: %d\n",
- is_def ? "def" : "use", irn, step));
+end:
+ obstack_free(&env->obst, base);
+ return res;
+}
- return b;
+/**
+ * Handle constraint nodes in each basic block.
+ * handle_constraints() inserts Perm nodes which perm
+ * over all values live at the constrained node right in front
+ * of the constrained node. These Perms signal a constrained node.
+ * For further comments, refer to handle_constraints().
+ */
+static void constraints(ir_node *bl, void *data)
+{
+ be_chordal_alloc_env_t *env = data;
+
+ /*
+ Start silent in the start block.
+ The silence remains until the first barrier is seen.
+ Each other block is begun loud.
+ */
+ int silent = bl == get_irg_start_block(get_irn_irg(bl));
+ ir_node *irn;
+
+ /*
+ If the block is the start block search the barrier and
+ start handling constraints from there.
+ */
+
+ for(irn = sched_first(bl); !sched_is_end(irn);) {
+ irn = handle_constraints(env, irn, &silent);
+ }
}
/**
#define border_use(irn, step, real) \
border_add(env, head, irn, step, ++pressure, 0, real)
- env_t *env = env_ptr;
- bitset_t *live = env->live;
+ be_chordal_alloc_env_t *alloc_env = env_ptr;
+ be_chordal_env_t *env = alloc_env->chordal_env;
+ bitset_t *live = alloc_env->live;
ir_node *irn;
+ DEBUG_ONLY(firm_dbg_module_t *dbg = env->dbg;)
int i, n;
unsigned step = 0;
unsigned pressure = 0;
struct list_head *head;
- pset *live_in = get_live_in(block);
- pset *live_end = get_live_end(block);
- const arch_register_class_t *cls = env->cls;
+ pset *live_in = put_live_in(block, pset_new_ptr_default());
+ pset *live_end = put_live_end(block, pset_new_ptr_default());
- DBG((dbg, LEVEL_1, "Computing pressure in block %n\n", block));
+ DBG((dbg, LEVEL_1, "Computing pressure in block %+F\n", block));
bitset_clear_all(live);
/* Set up the border list in the block info */
- head = &get_ra_block_info(block)->border_head;
+ head = obstack_alloc(&env->obst, sizeof(*head));
INIT_LIST_HEAD(head);
+ assert(pmap_get(env->border_heads, block) == NULL);
+ pmap_insert(env->border_heads, block, head);
/*
* Make final uses of all values live out of the block.
- * They are neccessary to build up real intervals.
+ * They are necessary to build up real intervals.
*/
- for(irn = pset_first(live_end); irn; irn = pset_next(live_end)) {
- DBG((dbg, LEVEL_3, "\tMaking live: %n/%d\n", irn, get_irn_graph_nr(irn)));
- bitset_set(live, get_irn_graph_nr(irn));
- if(arch_irn_has_reg_class(env->arch_env, irn, 0, cls))
- border_use(irn, step, 0);
+ foreach_pset(live_end, irn) {
+ if(has_reg_class(env, irn)) {
+ DBG((dbg, LEVEL_3, "\tMaking live: %+F/%d\n", irn, get_irn_graph_nr(irn)));
+ bitset_set(live, get_irn_graph_nr(irn));
+ border_use(irn, step, 0);
+ }
}
-
++step;
/*
* relevant for the interval borders.
*/
sched_foreach_reverse(block, irn) {
- DBG((dbg, LEVEL_1, "\tinsn: %n, pressure: %d\n", irn, pressure));
+ DBG((dbg, LEVEL_1, "\tinsn: %+F, pressure: %d\n", irn, pressure));
DBG((dbg, LEVEL_2, "\tlive: %b\n", live));
- /* Erase the color of each node encountered. */
- set_irn_color(irn, NO_COLOR);
-
- /*
- * If the node defines some value, which can put into a
- * register of the current class, make a border for it.
- */
- if(arch_irn_has_reg_class(env->arch_env, irn, 0, cls)) {
- bitset_pos_t elm;
+ /*
+ * If the node defines some value, which can put into a
+ * register of the current class, make a border for it.
+ */
+ if(has_reg_class(env, irn)) {
int nr = get_irn_graph_nr(irn);
bitset_clear(live, nr);
border_def(irn, step, 1);
-
-#ifdef BUILD_GRAPH
- bitset_foreach(live, elm)
- add_if(env, nr, (int) elm);
-#endif
}
/*
for(i = 0, n = get_irn_arity(irn); i < n; ++i) {
ir_node *op = get_irn_n(irn, i);
- if(arch_irn_has_reg_class(env->arch_env, op, 0, cls)) {
+ if(has_reg_class(env, op)) {
int nr = get_irn_graph_nr(op);
- DBG((dbg, LEVEL_4, "\t\tpos: %d, use: %n\n", i, op));
+ DBG((dbg, LEVEL_4, "\t\tpos: %d, use: %+F\n", i, op));
if(!bitset_is_set(live, nr)) {
border_use(op, step, 1);
}
}
}
-
++step;
}
/*
* Add initial defs for all values live in.
*/
- for(irn = pset_first(live_in); irn; irn = pset_next(live_in)) {
- if(arch_irn_has_reg_class(env->arch_env, irn, 0, cls)) {
+ foreach_pset(live_in, irn) {
+ if(has_reg_class(env, irn)) {
/* Mark the value live in. */
bitset_set(live, get_irn_graph_nr(irn));
border_def(irn, step, 0);
}
}
+
+ del_pset(live_in);
+ del_pset(live_end);
}
static void assign(ir_node *block, void *env_ptr)
{
- env_t *env = env_ptr;
- struct obstack *obst = &env->obst;
- bitset_t *live = env->live;
- bitset_t *colors = env->colors;
- bitset_t *in_colors = env->in_colors;
- const arch_register_class_t *cls = env->cls;
-
- /* Mark the obstack level and allocate the temporary tmp_colors */
- void *obstack_level = obstack_base(obst);
- /*bitset_t *tmp_colors = bitset_obstack_alloc(obst, env->colors_n);*/
+ be_chordal_alloc_env_t *alloc_env = env_ptr;
+ be_chordal_env_t *env = alloc_env->chordal_env;
+ bitset_t *live = alloc_env->live;
+ bitset_t *colors = alloc_env->colors;
+ bitset_t *in_colors = alloc_env->in_colors;
+ const arch_env_t *arch_env = env->birg->main_env->arch_env;
+ DEBUG_ONLY(firm_dbg_module_t *dbg = env->dbg;)
const ir_node *irn;
border_t *b;
- struct list_head *head = &get_ra_block_info(block)->border_head;
- pset *live_in = get_live_in(block);
+ struct list_head *head = get_block_border_head(env, block);
+ pset *live_in = put_live_in(block, pset_new_ptr_default());
- bitset_clear_all(live);
bitset_clear_all(colors);
+ bitset_clear_all(live);
bitset_clear_all(in_colors);
- DBG((dbg, LEVEL_4, "Assigning colors for block %n\n", block));
+ DBG((dbg, LEVEL_4, "Assigning colors for block %+F\n", block));
DBG((dbg, LEVEL_4, "\tusedef chain for block\n"));
list_for_each_entry(border_t, b, head, list) {
- DBG((dbg, LEVEL_4, "\t%s %n/%d\n", b->is_def ? "def" : "use",
+ DBG((dbg, LEVEL_4, "\t%s %+F/%d\n", b->is_def ? "def" : "use",
b->irn, get_irn_graph_nr(b->irn)));
}
* Since their colors have already been assigned (The dominators were
* allocated before), we have to mark their colors as used also.
*/
- for(irn = pset_first(live_in); irn; irn = pset_next(live_in)) {
- if(arch_irn_has_reg_class(env->arch_env, irn, 0, cls)) {
- const arch_register_t *reg = arch_get_irn_register(env->arch_env, irn, 0);
- int col;
+ foreach_pset(live_in, irn) {
+ if(has_reg_class(env, irn)) {
+ const arch_register_t *reg = arch_get_irn_register(arch_env, irn);
+ int col;
- assert(reg && "Nodfe must have been assigned a register");
+ assert(reg && "Node must have been assigned a register");
col = arch_register_get_index(reg);
/* Mark the color of the live in value as used. */
}
/*
- * Mind that the sequence of defs from back to front defines a perfect
+ * Mind that the sequence
+ * of defs from back to front defines a perfect
* elimination order. So, coloring the definitions from first to last
* will work.
*/
* color.
*/
if(b->is_def && !is_live_in(block, irn)) {
- const arch_register_t *reg;
+ const arch_register_t *reg;
int col = NO_COLOR;
- DBG((dbg, LEVEL_4, "\tcolors in use: %b\n", colors));
-
- col = bitset_next_clear(colors, 0);
- reg = arch_register_for_index(env->cls, col);
+ if(pset_find_ptr(alloc_env->pre_colored, irn)) {
+ reg = arch_get_irn_register(arch_env, irn);
+ col = reg->index;
+ assert(!bitset_is_set(colors, col) && "pre-colored register must be free");
+ }
- assert(arch_get_irn_register(env->arch_env, irn, 0) == NULL
- && "This node must not have been assigned a register yet");
- assert(!bitset_is_set(live, nr) && "Value's definition must not have been encountered");
+ else {
+ col = get_next_free_reg(alloc_env, colors);
+ reg = arch_register_for_index(env->cls, col);
+ assert(arch_get_irn_register(arch_env, irn) == NULL && "This node must not have been assigned a register yet");
+ assert(!arch_register_type_is(reg, ignore) && "Must not assign ignore register");
+ }
bitset_set(colors, col);
- bitset_set(live, nr);
+ arch_set_irn_register(arch_env, irn, reg);
- arch_set_irn_register(env->arch_env, irn, 0, reg);
- DBG((dbg, LEVEL_1, "\tassigning register %s(%d) to %n\n",
- arch_register_get_name(reg), col, irn));
+ DBG((dbg, LEVEL_1, "\tassigning register %s(%d) to %+F\n",
+ arch_register_get_name(reg), col, irn));
+
+ assert(!bitset_is_set(live, nr) && "Value's definition must not have been encountered");
+ bitset_set(live, nr);
}
/* Clear the color upon a use. */
else if(!b->is_def) {
- const arch_register_t *reg = arch_get_irn_register(env->arch_env, irn, 0);
+ const arch_register_t *reg = arch_get_irn_register(arch_env, irn);
int col;
- assert(reg && "Register must have been assigned");
+ assert(reg && "Register must have been assigned");
- col = arch_register_get_index(reg);
+ col = arch_register_get_index(reg);
assert(bitset_is_set(live, nr) && "Cannot have a non live use");
bitset_clear(colors, col);
}
}
- /* Free the auxillary data on the obstack. */
- obstack_free(obst, obstack_level);
+ del_pset(live_in);
}
-void be_ra_chordal_init(void)
+void be_ra_chordal_color(be_chordal_env_t *chordal_env)
{
- dbg = firm_dbg_register(DBG_BERA);
- firm_dbg_set_mask(dbg, 0);
-}
+ be_chordal_alloc_env_t env;
+ char buf[256];
+
+ int colors_n = arch_register_class_n_regs(chordal_env->cls);
+ ir_graph *irg = chordal_env->irg;
-void be_ra_chordal(ir_graph *irg,
- const arch_env_t *arch_env,
- const arch_register_class_t *cls)
-{
- int node_count = get_graph_node_count(irg);
- int colors_n = arch_register_class_n_regs(cls);
- env_t *env = malloc(sizeof(*env));
if(get_irg_dom_state(irg) != dom_consistent)
compute_doms(irg);
- obstack_init(&env->obst);
+ env.chordal_env = chordal_env;
+ env.colors_n = colors_n;
+ env.colors = bitset_alloca(colors_n);
+ env.tmp_colors = bitset_alloca(colors_n);
+ env.in_colors = bitset_alloca(colors_n);
+ env.pre_colored = pset_new_ptr_default();
+ FIRM_DBG_REGISTER(env.constr_dbg, "firm.be.chordal.constr");
-#ifdef BUILD_GRAPH
- env->edges = new_set(if_edge_cmp, node_count);
- env->nodes = new_set(if_node_cmp, node_count);
-#endif
-
- env->live = bitset_obstack_alloc(&env->obst, node_count);
- env->colors = bitset_obstack_alloc(&env->obst, colors_n);
- env->in_colors = bitset_obstack_alloc(&env->obst, colors_n);
- env->colors_n = colors_n;
- env->cls = cls;
- env->arch_env = arch_env;
- env->irg = irg;
-
- /* First, determine the pressure */
- dom_tree_walk_irg(irg, pressure, NULL, env);
- /* Insert probable spills */
- be_ra_chordal_spill(irg);
+ /* Handle register targeting constraints */
+ dom_tree_walk_irg(irg, constraints, NULL, &env);
- /* Assign the colors */
- dom_tree_walk_irg(irg, assign, NULL, env);
-
-#ifdef DUMP_IFG
- {
- char buf[128];
-
- ir_snprintf(buf, sizeof(buf), "ifg_%F.dot", irg);
- dump_ifg(irg, env->edges, buf);
+ if(chordal_env->opts->dump_flags & BE_CH_DUMP_CONSTR) {
+ snprintf(buf, sizeof(buf), "-%s-constr", chordal_env->cls->name);
+ be_dump(chordal_env->irg, buf, dump_ir_block_graph_sched);
}
-#endif
-#ifdef DUMP_INTERVALS
- dump_intv_cfg(env);
-#endif
-
- set_irg_ra_link(irg, env);
-}
+ be_numbering(irg);
+ env.live = bitset_malloc(get_graph_node_count(chordal_env->irg));
-void be_ra_chordal_done(ir_graph *irg)
-{
- env_t *env = get_irg_ra_link(irg);
-
-#ifdef BUILD_GRAPH
- {
- if_node_t *ifn;
- for(ifn = set_first(env->nodes); ifn; ifn = set_next(env->nodes))
- free(ifn->neighb);
- free(env->nodes);
- free(env->edges);
- }
-#endif
-
- obstack_free(&env->obst, NULL);
- free(env);
-}
-
-int phi_ops_interfere(const ir_node *a, const ir_node *b)
-{
-#ifdef BUILD_GRAPH
- ir_graph *irg = get_irn_irg(a);
- env_t *env = get_irg_ra_link(irg);
-
- assert(irg == get_irn_irg(b) && "Both nodes must be in the same graph");
+ /* First, determine the pressure */
+ dom_tree_walk_irg(irg, pressure, NULL, &env);
- return are_connected(env, get_irn_graph_nr(a), get_irn_graph_nr(b));
-#else
- return values_interfere(a, b);
-#endif /* BUILD_GRAPH */
-}
+ /* Assign the colors */
+ dom_tree_walk_irg(irg, assign, NULL, &env);
-#ifdef BUILD_GRAPH
-/** TODO remove this
- * Deprecated. Use be_ra_get_ifg_edges instead.
- */
-set *be_ra_get_ifg(ir_graph *irg) {
- return ((env_t *)get_irg_ra_link(irg))->edges;
-}
+ be_numbering_done(irg);
-set *be_ra_get_ifg_edges(ir_graph *irg) {
- return ((env_t *)get_irg_ra_link(irg))->edges;
-}
+ if(chordal_env->opts->dump_flags & BE_CH_DUMP_TREE_INTV) {
+ plotter_t *plotter;
+ ir_snprintf(buf, sizeof(buf), "ifg_%s_%F.eps", chordal_env->cls->name, irg);
+ plotter = new_plotter_ps(buf);
+ draw_interval_tree(&draw_chordal_def_opts, chordal_env, plotter);
+ plotter_free(plotter);
+ }
-set *be_ra_get_ifg_nodes(ir_graph *irg) {
- return ((env_t *)get_irg_ra_link(irg))->nodes;
+ del_pset(env.pre_colored);
}
-
-#endif