#include "beirgmod.h"
#include "beifg.h"
#include "beinsn_t.h"
+#include "bestatevent.h"
#include "bechordal_t.h"
#include "bechordal_draw.h"
static ir_node *prepare_constr_insn(be_chordal_env_t *env, ir_node *irn)
{
- be_insn_t *insn = chordal_scan_insn(env, irn);
- bitset_t *def_constr = bitset_alloca(env->cls->n_regs);
- bitset_t *tmp = bitset_alloca(env->cls->n_regs);
- int i;
+ const arch_env_t *aenv = env->birg->main_env->arch_env;
+ bitset_t *def_constr = bitset_alloca(env->cls->n_regs);
+ bitset_t *tmp = bitset_alloca(env->cls->n_regs);
+ ir_node *bl = get_nodes_block(irn);
+
+ be_insn_t *insn;
+ int i, j;
+
+ for (i = get_irn_arity(irn) - 1; i >= 0; --i) {
+ ir_node *op = get_irn_n(irn, i);
+
+ const arch_register_t *reg;
+ arch_register_req_t req;
+
+ if (arch_get_irn_reg_class(aenv, irn, i) == env->cls) {
+ reg = arch_get_irn_register(aenv, op);
+
+ if (reg && arch_register_type_is(reg, ignore)) {
+ arch_get_register_req(aenv, &req, irn, i);
+
+ if (arch_register_req_is(&req, limited)) {
+ bitset_clear_all(tmp);
+ req.limited(req.limited_env, tmp);
+
+ if (! bitset_is_set(tmp, reg->index)) {
+ ir_node *copy = be_new_Copy(env->cls, env->irg, bl, op);
+ be_stat_ev("constr_copy", 1);
+
+ sched_add_before(irn, copy);
+ set_irn_n(irn, i, copy);
+ DBG((env->dbg, LEVEL_3, "inserting ignore arg copy %+F for %+F pos %d\n", copy, irn, i));
+ }
+ }
+ }
+ }
+ }
+
+ insn = chordal_scan_insn(env, irn);
if(!insn->has_constraints)
goto end;
+ /* insert copies for nodes that occur constrained more than once. */
+ for(i = insn->use_start; i < insn->n_ops; ++i) {
+ be_operand_t *op = &insn->ops[i];
+
+ if(op->has_constraints) {
+ for(j = i + 1; j < insn->n_ops; ++j) {
+ be_operand_t *a_op = &insn->ops[j];
+
+ if(a_op->carrier == op->carrier && a_op->has_constraints) {
+ ir_node *copy = be_new_Copy(env->cls, env->irg, bl, op->carrier);
+ be_stat_ev("constr_copy", 1);
+
+ sched_add_before(insn->irn, copy);
+ set_irn_n(insn->irn, a_op->pos, copy);
+ DBG((env->dbg, LEVEL_3, "inserting multiple constr copy %+F for %+F pos %d\n", copy, insn->irn, a_op->pos));
+ }
+ }
+ }
+ }
+
/* collect all registers occuring in out constraints. */
for(i = 0; i < insn->use_start; ++i) {
be_operand_t *op = &insn->ops[i];
3) is constrained to a register occuring in out constraints.
*/
if(op->has_constraints && values_interfere(env->lv, insn->irn, op->carrier) && bitset_popcnt(tmp) > 0) {
- ir_node *bl = get_nodes_block(insn->irn);
-
/*
only create the copy if the operand is no copy.
this is necessary since the assure constraints phase inserts
bitset_or(out_constr, op->regs);
}
- /*
- Now, figure out which input operand must be copied since it has input
- constraints which are also output constraints.
- */
(void) bl;
(void) copy;
(void) bs;
- (void) dbg;
-#if 0
- for(i = insn->use_start; i < insn->n_ops; ++i) {
- be_operand_t *op = &insn->ops[i];
- if(op->has_constraints && (values_interfere(env->lv, op->carrier, insn->irn) || arch_irn_is(aenv, op->carrier, ignore))) {
- bitset_copy(bs, op->regs);
- bitset_and(bs, out_constr);
-
- /*
- The operand (interfering with the node) has input constraints
- which also occur as output constraints, so insert a copy.
- */
- if(bitset_popcnt(bs) > 0) {
- copy = be_new_Copy(op->req.cls, env->irg, bl, op->carrier);
- op->carrier = copy;
- sched_add_before(insn->irn, copy);
- set_irn_n(insn->irn, op->pos, op->carrier);
-
- DBG((dbg, LEVEL_2, "adding copy for interfering and constrained op %+F\n", op->carrier));
- }
- }
- }
-#endif
+ DEBUG_ONLY((void) dbg;)
/*
Make the Perm, recompute liveness and re-scan the insn since the
if(perm) {
const ir_edge_t *edge;
+ be_stat_ev("constr_perm", get_irn_arity(perm));
foreach_out_edge(perm, edge) {
ir_node *proj = get_edge_src_irn(edge);
arch_set_irn_register(aenv, proj, NULL);
}
/*
- Put all nodes which live by the constrained instruction also to the
+ Put all nodes which live through the constrained instruction also to the
allocation bipartite graph. They are considered unconstrained.
*/
if(perm) {
bitset_clear_all(bs);
arch_put_non_ignore_regs(aenv, env->cls, bs);
+ bitset_andnot(bs, env->ignore_colors);
bitset_foreach(bs, col)
bipartite_add(bp, n_alloc, col);
continue;
arch_set_irn_register(aenv, nodes[j], reg);
- pset_hinsert_ptr(alloc_env->pre_colored, nodes[j]);
+ (void) pset_hinsert_ptr(alloc_env->pre_colored, nodes[j]);
DBG((dbg, LEVEL_2, "\tsetting %+F to register %s\n", nodes[j], reg->name));
}
}
be_dump(chordal_env->irg, buf, dump_ir_block_graph_sched);
}
- be_numbering(irg);
env.live = bitset_malloc(get_irg_last_idx(chordal_env->irg));
/* First, determine the pressure */