-#ifndef FIRM_BEARCH_T_H
-#define FIRM_BEARCH_T_H
+/*
+ * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
+ *
+ * This file is part of libFirm.
+ *
+ * This file may be distributed and/or modified under the terms of the
+ * GNU General Public License version 2 as published by the Free Software
+ * Foundation and appearing in the file LICENSE.GPL included in the
+ * packaging of this file.
+ *
+ * Licensees holding valid libFirm Professional Edition licenses may use
+ * this file in accordance with the libFirm Commercial License.
+ * Agreement provided with the Software.
+ *
+ * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
+ * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE.
+ */
+
+/**
+ * @file
+ * @brief Processor architecture specification - internal data structures.
+ * @author Sebastian Hack
+ * @version $Id$
+ */
+#ifndef FIRM_BE_BEARCH_T_H
+#define FIRM_BE_BEARCH_T_H
#include "bearch.h"
#include "bemachine.h"
#include "beirg.h"
#include "beabi.h"
+#include "raw_bitset.h"
/**
* A register.
struct arch_register_t {
const char *name; /**< The name of the register. */
const arch_register_class_t *reg_class; /**< The class the register belongs to. */
- int index; /**< The index of the register in the class. */
+ unsigned index; /**< The index of the register in the class. */
arch_register_type_t type; /**< The type of the register. */
void *data; /**< Custom data. */
};
return reg->reg_class;
}
-static INLINE int _arch_register_get_index(const arch_register_t *reg)
+static INLINE
+unsigned _arch_register_get_index(const arch_register_t *reg)
{
return reg->index;
}
-static INLINE const char *_arch_register_get_name(const arch_register_t *reg)
+static INLINE
+const char *_arch_register_get_name(const arch_register_t *reg)
{
return reg->name;
}
* Like general purpose or floating point.
*/
struct arch_register_class_t {
- const char *name; /**< The name of the register class. */
- int n_regs; /**< Number of registers in this class. */
- ir_mode *mode; /**< The mode of the register class. */
- const arch_register_t *regs; /**< The array of registers. */
+ unsigned index; /**< index of this register class */
+ const char *name; /**< The name of the register class.*/
+ unsigned n_regs; /**< Number of registers in this
+ class. */
+ ir_mode *mode; /**< The mode of the register class.*/
+ const arch_register_t *regs; /**< The array of registers. */
+ arch_register_class_flags_t flags; /**< register class flags. */
};
/** return the number of registers in this register class */
/** return the name of this register class */
#define arch_register_class_name(cls) ((cls)->name)
+/** return the index of this register class */
+#define arch_register_class_index(cls) ((cls)->index)
+
+/** return the register class flags */
+#define arch_register_class_flags(cls) ((cls)->flags)
+
static INLINE const arch_register_t *
-_arch_register_for_index(const arch_register_class_t *cls, int idx)
+_arch_register_for_index(const arch_register_class_t *cls, unsigned idx)
{
- assert(0 <= idx && idx < cls->n_regs);
+ assert(idx < cls->n_regs);
return &cls->regs[idx];
}
const unsigned *limited; /**< allowed register bitset */
- int other_same; /**< The in number which shall have
- the same res (should_be_same)*/
- int other_different; /**< The other node from which this
- one's register must be different
- (case must_be_different). */
+ unsigned other_same; /**< Bitmask of ins which should use the
+ same register (should_be_same). */
+ unsigned other_different; /**< Bitmask of ins which shall use a
+ different register
+ (must_be_different) */
};
-struct arch_flag_t {
- const char *name;
- unsigned index;
-};
+static INLINE int reg_reqs_equal(const arch_register_req_t *req1,
+ const arch_register_req_t *req2)
+{
+ if (req1 == req2)
+ return 1;
+
+ if (req1->type != req2->type
+ || req1->cls != req2->cls
+ || req1->other_same != req2->other_same
+ || req1->other_different != req2->other_different)
+ return 0;
+
+ if (req1->limited != NULL) {
+ size_t n_regs;
+
+ if (req2->limited == NULL)
+ return 0;
+
+ n_regs = arch_register_class_n_regs(req1->cls);
+ if (!rbitset_equal(req1->limited, req2->limited, n_regs))
+ return 0;
+ }
+
+ return 1;
+}
/**
* An inverse operation returned by the backend
ir_node **nodes;
};
-struct arch_irn_ops_if_t {
+struct arch_irn_ops_t {
/**
* Get the register requirements for a given operand.
* @return The register requirements for the selected operand.
* The pointer returned is never NULL.
*/
- const arch_register_req_t *(*get_irn_reg_req)(const void *self,
- const ir_node *irn, int pos);
+ const arch_register_req_t *(*get_irn_reg_req)(const ir_node *irn, int pos);
/**
* Set the register for an output operand.
* @note If the operand is not a register operand,
* the call is ignored.
*/
- void (*set_irn_reg)(const void *self, ir_node *irn, const arch_register_t *reg);
+ void (*set_irn_reg)(ir_node *irn, const arch_register_t *reg);
/**
* Get the register allocated for an output operand.
* @c arch_register_invalid, if no register has yet been
* allocated for this node.
*/
- const arch_register_t *(*get_irn_reg)(const void *self, const ir_node *irn);
+ const arch_register_t *(*get_irn_reg)(const ir_node *irn);
/**
* Classify the node.
* @param irn The node.
* @return A classification.
*/
- arch_irn_class_t (*classify)(const void *self, const ir_node *irn);
+ arch_irn_class_t (*classify)(const ir_node *irn);
/**
* Get the flags of a node.
* @param irn The node.
* @return A set of flags.
*/
- arch_irn_flags_t (*get_flags)(const void *self, const ir_node *irn);
+ arch_irn_flags_t (*get_flags)(const ir_node *irn);
/**
* Get the entity on the stack frame this node depends on.
* @return The entity on the stack frame or NULL, if the node does not have a
* stack frame entity.
*/
- ir_entity *(*get_frame_entity)(const void *self, const ir_node *irn);
+ ir_entity *(*get_frame_entity)(const ir_node *irn);
/**
* Set the entity on the stack frame this node depends on.
* @param irn The node in question.
* @param ent The entity to set
*/
- void (*set_frame_entity)(const void *self, ir_node *irn, ir_entity *ent);
+ void (*set_frame_entity)(ir_node *irn, ir_entity *ent);
/**
* Set the offset of a node carrying an entity on the stack frame.
* @param irn The node.
* @param offset The offset of the node's stack frame entity.
*/
- void (*set_frame_offset)(const void *self, ir_node *irn, int offset);
+ void (*set_frame_offset)(ir_node *irn, int offset);
/**
* Returns the delta of the stackpointer for nodes that increment or
* @return 0 if the stackpointer is not modified with a constant
* value, otherwise the increment/decrement value
*/
- int (*get_sp_bias)(const void *self, const ir_node *irn);
+ int (*get_sp_bias)(const ir_node *irn);
/**
* Returns an inverse operation which yields the i-th argument
* @param obstack The obstack to use for allocation of the returned nodes array
* @return The inverse operation or NULL if operation invertible
*/
- arch_inverse_t *(*get_inverse)(const void *self, const ir_node *irn, int i, arch_inverse_t *inverse, struct obstack *obstack);
+ arch_inverse_t *(*get_inverse)(const ir_node *irn, int i, arch_inverse_t *inverse, struct obstack *obstack);
/**
* Get the estimated cycle count for @p irn.
*
* @return The estimated cycle count for this operation
*/
- int (*get_op_estimated_cost)(const void *self, const ir_node *irn);
+ int (*get_op_estimated_cost)(const ir_node *irn);
/**
* Asks the backend whether operand @p i of @p irn can be loaded form memory internally
*
* @return nonzero if argument can be loaded or zero otherwise
*/
- int (*possible_memory_operand)(const void *self, const ir_node *irn, unsigned int i);
+ int (*possible_memory_operand)(const ir_node *irn, unsigned int i);
/**
* Ask the backend to assimilate @p reload of operand @p i into @p irn.
* @param spill The spill.
* @param i The position of the reload.
*/
- void (*perform_memory_operand)(const void *self, ir_node *irn, ir_node *spill, unsigned int i);
-};
-
-/**
- * irn_ops base class.
- */
-struct arch_irn_ops_t {
- const arch_irn_ops_if_t *impl;
-};
-
-/**
- * Somebody who can be asked about IR nodes.
- */
-struct arch_irn_handler_t {
-
- /**
- * Get the operations of an irn.
- * @param self The handler from which the method is invoked.
- * @param irn Some node.
- * @return Operations for that irn.
- */
- const void *(*get_irn_ops)(const arch_irn_handler_t *handler,
- const ir_node *irn);
+ void (*perform_memory_operand)(ir_node *irn, ir_node *spill, unsigned int i);
};
/**
*/
void *(*init)(be_irg_t *birg);
+ /**
+ * return node used as base in pic code addresses
+ */
+ ir_node* (*get_pic_base)(void *self);
+
/**
* Called before abi introduce.
*/
#define arch_code_generator_done(cg) _arch_cg_call(cg, done)
#define arch_code_generator_spill(cg, birg) _arch_cg_call_env(cg, birg, spill)
#define arch_code_generator_has_spiller(cg) ((cg)->impl->spill != NULL)
+#define arch_code_generator_get_pic_base(cg) \
+ ((cg)->impl->get_pic_base != NULL ? (cg)->impl->get_pic_base(cg) : NULL)
/**
* Code generator base class.
const arch_code_generator_if_t *impl;
};
-/**
- * ISA base class.
- */
-struct arch_isa_t {
- const arch_isa_if_t *impl;
- const arch_register_t *sp; /** The stack pointer register. */
- const arch_register_t *bp; /** The base pointer register. */
- const int stack_dir; /** -1 for decreasing, 1 for increasing. */
- const be_main_env_t *main_env; /** the be main environment */
-};
-
-#define arch_isa_stack_dir(isa) ((isa)->stack_dir)
-#define arch_isa_sp(isa) ((isa)->sp)
-#define arch_isa_bp(isa) ((isa)->bp)
-
/**
* Architecture interface.
*/
* @param main_env the be main environment
* @return a new isa instance
*/
- void *(*init)(FILE *file_handle);
+ arch_env_t *(*init)(FILE *file_handle);
/**
* Free the isa instance.
* Get the the number of register classes in the isa.
* @return The number of register classes.
*/
- int (*get_n_reg_class)(const void *self);
+ unsigned (*get_n_reg_class)(const void *self);
/**
* Get the i-th register class.
* @param i The number of the register class.
* @return The register class.
*/
- const arch_register_class_t *(*get_reg_class)(const void *self, int i);
+ const arch_register_class_t *(*get_reg_class)(const void *self, unsigned i);
/**
* Get the register class which shall be used to store a value of a given mode.
/**
* Get the ABI restrictions for procedure calls.
* @param self The this pointer.
- * @param method_type The type of the method (procedure) in question.
+ * @param call_type The call type of the method (procedure) in question.
* @param p The array of parameter locations to be filled.
*/
- void (*get_call_abi)(const void *self, ir_type *method_type, be_abi_call_t *abi);
-
- /**
- * The irn handler for this architecture.
- * The irn handler is registered by the Firm back end
- * when the architecture is initialized.
- * (May be NULL).
- */
- const arch_irn_handler_t *(*get_irn_handler)(const void *self);
+ void (*get_call_abi)(const void *self, ir_type *call_type, be_abi_call_t *abi);
/**
* Get the code generator interface.
/**
* Returns an 2-dim array of execution units, @p irn can be executed on.
- * The first dimension is the type, the second the allowed units of this type.
+ * The first dimension is the type, the second the allowed units of this
+ * type.
* Each dimension is a NULL terminated list.
* @param self The isa object.
* @param irn The node.
/**
* Return an ordered list of irgs where code should be generated for.
- * If NULL is returned, all irg will be taken into account and they will be
- * generated in an arbitrary order.
+ * If NULL is returned, all irg will be taken into account and they will be
+ * generated in an arbitrary order.
* @param self The isa object.
- * @param irgs A flexible array ARR_F of length 0 where the backend cann append the desired irgs.
+ * @param irgs A flexible array ARR_F of length 0 where the backend can append the desired irgs.
* @return A flexible array ARR_F containing all desired irgs in the desired order.
*/
ir_graph **(*get_backend_irg_list)(const void *self, ir_graph ***irgs);
-};
-#define arch_isa_get_n_reg_class(isa) ((isa)->impl->get_n_reg_class(isa))
-#define arch_isa_get_reg_class(isa,i) ((isa)->impl->get_reg_class(isa, i))
-#define arch_isa_get_irn_handler(isa) ((isa)->impl->get_irn_handler(isa))
-#define arch_isa_get_call_abi(isa,tp,abi) ((isa)->impl->get_call_abi((isa), (tp), (abi)))
-#define arch_isa_get_reg_class_for_mode(isa,mode) ((isa)->impl->get_reg_class_for_mode((isa), (mode)))
-#define arch_isa_make_code_generator(isa,irg) ((isa)->impl->make_code_generator((isa), (irg)))
-#define arch_isa_get_reg_class_alignment(isa, cls) ((isa)->impl->get_reg_class_alignment((isa), (cls)))
-#define arch_isa_get_allowed_execution_units(isa, irn) ((isa)->impl->get_allowed_execution_units((isa), (irn)))
-#define arch_isa_get_machine(isa) ((isa)->impl->get_machine((isa)))
-#define arch_isa_get_backend_irg_list(isa, irgs) ((isa)->impl->get_backend_irg_list((isa), (irgs)))
+ /**
+ * parse an assembler constraint part and set flags according to its nature
+ * advances the *c pointer to point to the last parsed character (so if you
+ * parse a single character don't advance c)
+ */
+ asm_constraint_flags_t (*parse_asm_constraint)(const void *self, const char **c);
+
+ /**
+ * returns true if the string is a valid clobbered (register) in this
+ * backend
+ */
+ int (*is_valid_clobber)(const void *self, const char *clobber);
+};
-#define ARCH_MAX_HANDLERS 8
+#define arch_env_done(env) ((env)->impl->done(env))
+#define arch_env_get_n_reg_class(env) ((env)->impl->get_n_reg_class(env))
+#define arch_env_get_reg_class(env,i) ((env)->impl->get_reg_class(env, i))
+#define arch_env_get_reg_class_for_mode(env,mode) ((env)->impl->get_reg_class_for_mode((env), (mode)))
+#define arch_env_get_call_abi(env,tp,abi) ((env)->impl->get_call_abi((env), (tp), (abi)))
+#define arch_env_get_code_generator_if(env) ((env)->impl->get_code_generator_if((env)))
+#define arch_env_get_list_sched_selector(env,selector) ((env)->impl->get_list_sched_selector((env), (selector)))
+#define arch_env_get_ilp_sched_selector(env) ((env)->impl->get_ilp_sched_selector(env))
+#define arch_env_get_reg_class_alignment(env,cls) ((env)->impl->get_reg_class_alignment((env), (cls)))
+#define arch_env_get_params(env) ((env)->impl->get_params())
+#define arch_env_get_allowed_execution_units(env,irn) ((env)->impl->get_allowed_execution_units((env), (irn)))
+#define arch_env_get_machine(env) ((env)->impl->get_machine(env))
+#define arch_env_get_backend_irg_list(env,irgs) ((env)->impl->get_backend_irg_list((env), (irgs)))
+#define arch_env_parse_asm_constraint(env,c) ((env)->impl->parse_asm_constraint((env), (c))
+#define arch_env_is_valid_clobber(env,clobber) ((env)->impl->is_valid_clobber((env), (clobber))
/**
- * Environment for the architecture infrastructure.
- * Keep this everywhere you're going.
+ * ISA base class.
*/
struct arch_env_t {
- arch_isa_t *isa; /**< The isa about which everything is. */
-
- arch_irn_handler_t const *handlers[ARCH_MAX_HANDLERS]; /**< The handlers are organized as
- a stack. */
-
- int handlers_tos; /**< The stack pointer of the handler
- stack. */
+ const arch_isa_if_t *impl;
+ const arch_register_t *sp; /** The stack pointer register. */
+ const arch_register_t *bp; /** The base pointer register. */
+ int stack_dir; /** -1 for decreasing, 1 for increasing. */
+ int stack_alignment; /** power of 2 stack alignment */
+ const be_main_env_t *main_env; /** the be main environment */
+ int spill_cost; /** cost for a be_Spill node */
+ int reload_cost; /** cost for a be_Reload node */
};
-/**
- * Get the isa of an arch environment.
- * @param env The environment.
- * @return The isa with which the env was initialized with.
- */
-#define arch_env_get_isa(env) ((env)->isa)
+#define arch_env_stack_dir(env) ((env)->stack_dir)
+#define arch_env_sp(env) ((env)->sp)
+#define arch_env_bp(env) ((env)->bp)
-#endif
+#endif /* FIRM_BE_BEARCH_T_H */
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