arch_irn_class_remat = 1 << 2,
arch_irn_class_copy = 1 << 3,
arch_irn_class_perm = 1 << 4,
- arch_irn_class_branch = 1 << 5,
- arch_irn_class_call = 1 << 6,
- arch_irn_class_load = 1 << 7,
- arch_irn_class_store = 1 << 8,
- arch_irn_class_stackparam = 1 << 9,
+ arch_irn_class_branch = 1 << 5
} arch_irn_class_t;
/**
*/
const arch_register_req_t *arch_get_register_req(const ir_node *irn, int pos);
-/**
- * Get the number of allocatable registers concerning
- * a register class for an operand of a node.
- * @param irn The node.
- * @param pos The position of the node's operand.
- * @param bs The bitset all allocatable registers shall be put into.
- * Note, that you can also pass NULL here. If you don't,
- * make sure, the bitset is as large as the register class
- * has registers.
- * @return The amount of registers allocatable for that operand.
- */
-int arch_get_allocatable_regs(const ir_node *irn, int pos, bitset_t *bs);
+#define arch_get_register_req_out(irn) arch_get_register_req(irn, -1)
/**
* Put all registers which shall not be ignored by the register
*/
int arch_reg_is_allocatable(const ir_node *irn, int pos, const arch_register_t *reg);
+#define arch_reg_out_is_allocatable(irn, reg) arch_reg_is_allocatable(irn, -1, reg)
+
/**
* Get the register class of an operand of a node.
* @param irn The node.
*/
const arch_register_class_t *arch_get_irn_reg_class(const ir_node *irn, int pos);
+#define arch_get_irn_reg_class_out(irn) arch_get_irn_reg_class(irn, -1)
+
/**
* Get the register allocated at a certain output operand of a node.
* @param irn The node.
#define arch_irn_is(irn, flag) ((arch_irn_get_flags(irn) & arch_irn_flags_ ## flag) != 0)
-#define arch_irn_has_reg_class(irn, pos, cls) \
- ((cls) == arch_get_irn_reg_class(irn, pos))
-
#define arch_irn_consider_in_reg_alloc(cls, irn) \
- (arch_irn_has_reg_class(irn, -1, cls) && !arch_irn_is(irn, ignore))
+ (arch_get_irn_reg_class_out(irn) == (cls) && !arch_irn_is(irn, ignore))
/**
* Get the operations of an irn.