Fix typos in comments: s/wether/whether/ and related corrections.

[libfirm] / ir / be / bearch.h

diff --git a/ir/be/bearch.h b/ir/be/bearch.h
index e9fb9a3..9c56e52 100644 (file)
--- a/ir/be/bearch.h
+++ b/ir/be/bearch.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 1995-2008 University of Karlsruhe.  All right reserved.
+ * Copyright (C) 1995-2011 University of Karlsruhe.  All right reserved.
  *
  * This file is part of libFirm.
  *
@@ -40,6 +40,13 @@
 #include "beirg.h"
 #include "error.h"
 
+/**
+ * this constant is returned by the get_sp_bias functions if the stack
+ * is reset (usually because the frame pointer is copied to the stack
+ * pointer
+ */
+#define SP_BIAS_RESET      INT_MIN
+
 typedef enum arch_register_class_flags_t {
        arch_register_class_flag_none      = 0,
        /** don't do automatic register allocation for this class */
@@ -47,6 +54,7 @@ typedef enum arch_register_class_flags_t {
        /** the register models an abstract state (example: fpu rounding mode) */
        arch_register_class_flag_state     = 1U << 1
 } arch_register_class_flags_t;
+ENUM_BITSET(arch_register_class_flags_t)
 
 typedef enum arch_register_type_t {
        arch_register_type_none         = 0,
@@ -69,6 +77,7 @@ typedef enum arch_register_type_t {
         * code */
        arch_register_type_state        = 1U << 5,
 } arch_register_type_t;
+ENUM_BITSET(arch_register_type_t)
 
 /**
  * Different types of register allocation requirements.
@@ -93,6 +102,7 @@ typedef enum arch_register_req_type_t {
         * rewiring logic) */
        arch_register_req_type_produces_sp       = 1U << 6,
 } arch_register_req_type_t;
+ENUM_BITSET(arch_register_req_type_t)
 
 extern const arch_register_req_t *arch_no_register_req;
 
@@ -111,12 +121,14 @@ void arch_dump_reqs_and_registers(FILE *F, const ir_node *node);
  * Node classification. Used for statistics and for detecting reload nodes.
  */
 typedef enum arch_irn_class_t {
+       arch_irn_class_none   = 0,
        arch_irn_class_spill  = 1 << 0,
        arch_irn_class_reload = 1 << 1,
        arch_irn_class_remat  = 1 << 2,
        arch_irn_class_copy   = 1 << 3,
        arch_irn_class_perm   = 1 << 4
 } arch_irn_class_t;
+ENUM_BITSET(arch_irn_class_t)
 
 void arch_set_frame_offset(ir_node *irn, int bias);
 
@@ -145,15 +157,6 @@ void            arch_perform_memory_operand(ir_node *irn, ir_node *spill,
  */
 const arch_register_req_t *arch_get_register_req(const ir_node *irn, int pos);
 
-/**
- * Put all registers which shall not be ignored by the register
- * allocator in a bit set.
- * @param cls The register class to consider.
- * @param bs  The bit set to put the registers to.
- */
-extern void arch_put_non_ignore_regs(const arch_register_class_t *cls,
-                                     bitset_t *bs);
-
 /**
  * Check, if a register is assignable to an operand of a node.
  * @param irn The node.
@@ -239,12 +242,13 @@ void be_register_isa_if(const char *name, const arch_isa_if_t *isa);
  * A register.
  */
 struct arch_register_t {
-       const char                  *name;       /**< The name of the register. */
-       const arch_register_class_t *reg_class;  /**< The class of the register */
-       unsigned short               index;      /**< The index of the register in
-                                                     the class. */
-       unsigned short               global_index;
-       arch_register_type_t         type;       /**< The type of the register. */
+       const char                  *name;         /**< The name of the register. */
+       const arch_register_class_t *reg_class;    /**< The class of the register */
+       unsigned short               index;        /**< The index of the register in
+                                                       the class. */
+       unsigned short               global_index; /** The global index this register
+                                                                                              in the architecture. */
+       arch_register_type_t         type;         /**< The type of the register. */
        /** register constraint allowing just this register */
        const arch_register_req_t   *single_req;
 };
@@ -265,15 +269,6 @@ static inline const char *arch_register_get_name(const arch_register_t *reg)
        return reg->name;
 }
 
-/**
- * Convenience macro to check for register type.
- * @param req   A pointer to register.
- * @param kind  The kind of type to check for (see arch_register_type_t).
- * @return      1, If register is of given kind, 0 if not.
- */
-#define arch_register_type_is(reg, kind) \
-  (((reg)->type & arch_register_type_ ## kind) != 0)
-
 /**
  * A class of registers.
  * Like general purpose or floating point.
@@ -470,6 +465,12 @@ struct arch_isa_if_t {
         */
        arch_env_t *(*init)(FILE *file_handle);
 
+       /**
+        * lowers current program for target. See the documentation for
+        * be_lower_for_target() for details.
+        */
+       void (*lower_for_target)(void);
+
        /**
         * Free the isa instance.
         */
@@ -634,7 +635,7 @@ static inline unsigned arch_irn_get_n_outs(const ir_node *node)
        if (info->out_infos == NULL)
                return 0;
 
-       return ARR_LEN(info->out_infos);
+       return (unsigned)ARR_LEN(info->out_infos);
 }
 
 static inline const arch_irn_ops_t *get_irn_ops_simple(const ir_node *node)