put timers in a global var for now, until this is solved cleaner

[libfirm] / ir / be / bearch.h

diff --git a/ir/be/bearch.h b/ir/be/bearch.h
index 08b6600..810d600 100644 (file)
--- a/ir/be/bearch.h
+++ b/ir/be/bearch.h
@@ -17,6 +17,7 @@
 #include "bearch_t.h"
 #include "be_t.h"
 #include "bemachine.h"
+#include "beirg.h"
 
 struct _be_node_factory_t;
 
@@ -544,7 +545,7 @@ struct _arch_code_generator_if_t {
         * Backend may provide an own spiller.
         * This spiller needs to spill all register classes.
         */
-       void (*spill)(void *self, void *env);
+       void (*spill)(void *self, be_irg_t *birg);
 
        /**
         * Called before scheduling.
@@ -598,7 +599,7 @@ do { \
 #define arch_code_generator_after_ra(cg)        _arch_cg_call(cg, after_ra)
 #define arch_code_generator_finish(cg)          _arch_cg_call(cg, finish)
 #define arch_code_generator_done(cg)            _arch_cg_call(cg, done)
-#define arch_code_generator_spill(cg, env)      _arch_cg_call_env(cg, env, spill)
+#define arch_code_generator_spill(cg, birg)     _arch_cg_call_env(cg, birg, spill)
 #define arch_code_generator_has_spiller(cg)     ((cg)->impl->spill != NULL)
 
 /**
@@ -737,13 +738,15 @@ struct _arch_isa_if_t {
         */
        const be_machine_t *(*get_machine)(const void *self);
 
-#ifdef WITH_LIBCORE
        /**
-        * Register command line options for this backend.
-        * @param grp  The root group.
+        * Return an ordered list of irgs where code should be generated for.
+         * If NULL is returned, all irg will be taken into account and they will be
+         * generated in an arbitrary order.
+        * @param self   The isa object.
+        * @param irgs   A flexible array ARR_F of length 0 where the backend cann append the desired irgs.
+        * @return A flexible array ARR_F containing all desired irgs in the desired order.
         */
-       void (*register_options)(lc_opt_entry_t *grp);
-#endif
+       ir_graph **(*get_backend_irg_list)(const void *self, ir_graph ***irgs);
 };
 
 #define arch_isa_get_n_reg_class(isa)                  ((isa)->impl->get_n_reg_class(isa))
@@ -755,6 +758,7 @@ struct _arch_isa_if_t {
 #define arch_isa_get_reg_class_alignment(isa, cls)     ((isa)->impl->get_reg_class_alignment((isa), (cls)))
 #define arch_isa_get_allowed_execution_units(isa, irn) ((isa)->impl->get_allowed_execution_units((isa), (irn)))
 #define arch_isa_get_machine(isa)                      ((isa)->impl->get_machine((isa)))
+#define arch_isa_get_backend_irg_list(isa, irgs)       ((isa)->impl->get_backend_irg_list((isa), (irgs)))
 
 #define ARCH_MAX_HANDLERS         8
 
@@ -803,4 +807,9 @@ extern arch_env_t *arch_env_push_irn_handler(arch_env_t *env, const arch_irn_han
  */
 extern const arch_irn_handler_t *arch_env_pop_irn_handler(arch_env_t *env);
 
+/**
+ * Register an instruction set architecture
+ */
+void be_register_isa_if(const char *name, const arch_isa_if_t *isa);
+
 #endif /* _FIRM_BEARCH_H */