/** The register must be unequal from some other at the node. */
arch_register_req_type_must_be_different = 1U << 3,
/** The registernumber should be aligned (in case of multiregister values)*/
- arch_register_req_type_must_be_aligned = 1U << 4,
+ arch_register_req_type_aligned = 1U << 4,
/** ignore while allocating registers */
arch_register_req_type_ignore = 1U << 5,
/** the output produces a new value for the stack pointer
info->out_infos[pos].req = req;
}
+/**
+ * Iterate over all values defined by an instruction.
+ * Only looks at values in a certain register class where the requirements
+ * are not marked as ignore.
+ * Executes @p code for each definition.
+ */
+#define be_foreach_definition(node, cls, value, code) \
+ do { \
+ if (get_irn_mode(node) == mode_T) { \
+ const ir_edge_t *edge_; \
+ foreach_out_edge(node, edge_) { \
+ const arch_register_req_t *req_; \
+ value = get_edge_src_irn(edge_); \
+ req_ = arch_get_register_req_out(value); \
+ if (req_->cls != cls) \
+ continue; \
+ if (req_->type & arch_register_req_type_ignore) \
+ continue; \
+ code \
+ } \
+ } else { \
+ const arch_register_req_t *req_ = arch_get_register_req_out(node); \
+ value = node; \
+ if (req_->cls == cls \
+ && !(req_->type & arch_register_req_type_ignore)) { \
+ code \
+ } \
+ } \
+ } while (0)
+
#endif