extern arch_register_req_t const arch_no_requirement;
#define arch_no_register_req (&arch_no_requirement)
-/**
- * Print information about a register requirement in human readable form
- * @param F output stream/file
- * @param req The requirements structure to format.
- */
-void arch_dump_register_req(FILE *F, const arch_register_req_t *req,
- const ir_node *node);
-
void arch_dump_register_reqs(FILE *F, const ir_node *node);
void arch_dump_reqs_and_registers(FILE *F, const ir_node *node);
*/
static inline arch_irn_flags_t arch_get_irn_flags(const ir_node *node)
{
- backend_info_t *info;
- if (is_Proj(node))
- return arch_irn_flags_not_scheduled;
-
- info = be_get_info(node);
+ backend_info_t const *const info = be_get_info(node);
return info->flags;
}
static inline unsigned arch_get_irn_n_outs(const ir_node *node)
{
- backend_info_t *info = be_get_info(node);
- if (info->out_infos == NULL)
- return 0;
-
+ backend_info_t *const info = be_get_info(node);
return (unsigned)ARR_LEN(info->out_infos);
}
-/**
- * Start codegeneration
- */
-arch_env_t *arch_env_begin_codegeneration(const arch_isa_if_t *isa,
- be_main_env_t *main_env);
+#define be_foreach_out(node, i) \
+ for (unsigned i = 0, i##__n = arch_get_irn_n_outs(node); i != i##__n; ++i)
/**
* Register an instruction set architecture
* Start codegeneration
* @return a new isa instance
*/
- arch_env_t *(*begin_codegeneration)(const be_main_env_t *env);
+ arch_env_t *(*begin_codegeneration)(void);
/**
* Free the isa instance.
#define arch_env_handle_intrinsics(env) \
do { if((env)->impl->handle_intrinsics != NULL) (env)->impl->handle_intrinsics(); } while(0)
#define arch_env_get_call_abi(env,tp,abi) ((env)->impl->get_call_abi((tp), (abi)))
-#define arch_env_get_params(env) ((env)->impl->get_params())
-#define arch_env_parse_asm_constraint(env,c) ((env)->impl->parse_asm_constraint((c))
-#define arch_env_is_valid_clobber(env,clobber) ((env)->impl->is_valid_clobber((clobber))
#define arch_env_mark_remat(env,node) \
do { if ((env)->impl->mark_remat != NULL) (env)->impl->mark_remat((node)); } while(0)
const arch_register_t *sp; /**< The stack pointer register. */
const arch_register_t *bp; /**< The base pointer register. */
int stack_alignment; /**< power of 2 stack alignment */
- const be_main_env_t *main_env; /**< the be main environment */
int spill_cost; /**< cost for a be_Spill node */
int reload_cost; /**< cost for a be_Reload node */
bool custom_abi : 1; /**< backend does all abi handling
static inline bool arch_irn_is_ignore(const ir_node *irn)
{
const arch_register_req_t *req = arch_get_irn_register_req(irn);
- return req->type & arch_register_req_type_ignore;
+ return arch_register_req_is(req, ignore);
}
static inline bool arch_irn_consider_in_reg_alloc(
const arch_register_class_t *cls, const ir_node *node)
{
const arch_register_req_t *req = arch_get_irn_register_req(node);
- return
- req->cls == cls &&
- !(req->type & arch_register_req_type_ignore);
+ return req->cls == cls && !arch_register_req_is(req, ignore);
}
+#define be_foreach_value(node, value, code) \
+ do { \
+ if (get_irn_mode(node) == mode_T) { \
+ foreach_out_edge(node, node##__edge) { \
+ ir_node *const value = get_edge_src_irn(node##__edge); \
+ if (!is_Proj(value)) \
+ continue; \
+ code \
+ } \
+ } else { \
+ ir_node *const value = node; \
+ code \
+ } \
+ } while (0)
+
/**
* Iterate over all values defined by an instruction.
* Only looks at values in a certain register class where the requirements
* are not marked as ignore.
* Executes @p code for each definition.
*/
-#define be_foreach_definition_(node, ccls, value, code) \
- do { \
- if (get_irn_mode(node) == mode_T) { \
- foreach_out_edge(node, edge_) { \
- ir_node *const value = get_edge_src_irn(edge_); \
- arch_register_req_t const *const req_ = arch_get_irn_register_req(value); \
- if (req_->cls != ccls) \
- continue; \
- code \
- } \
- } else { \
- arch_register_req_t const *const req_ = arch_get_irn_register_req(node); \
- ir_node *const value = node; \
- if (req_->cls == ccls) { \
- code \
- } \
- } \
- } while (0)
+#define be_foreach_definition_(node, ccls, value, req, code) \
+ be_foreach_value(node, value, \
+ arch_register_req_t const *const req = arch_get_irn_register_req(value); \
+ if (req->cls != ccls) \
+ continue; \
+ code \
+ )
-#define be_foreach_definition(node, ccls, value, code) \
- be_foreach_definition_(node, ccls, value, \
- if (req_->type & arch_register_req_type_ignore) \
- continue; \
- code \
+#define be_foreach_definition(node, ccls, value, req, code) \
+ be_foreach_definition_(node, ccls, value, req, \
+ if (arch_register_req_is(req, ignore)) \
+ continue; \
+ code \
)
+#define be_foreach_use(node, ccls, in_req, value, value_req, code) \
+ do { \
+ for (int i_ = 0, n_ = get_irn_arity(node); i_ < n_; ++i_) { \
+ const arch_register_req_t *in_req = arch_get_irn_register_req_in(node, i_); \
+ if (in_req->cls != ccls) \
+ continue; \
+ ir_node *value = get_irn_n(node, i_); \
+ const arch_register_req_t *value_req = arch_get_irn_register_req(value); \
+ if (value_req->type & arch_register_req_type_ignore) \
+ continue; \
+ code \
+ } \
+ } while (0)
+
static inline const arch_register_class_t *arch_get_irn_reg_class(
const ir_node *node)
{
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