const arch_register_req_t *arch_get_register_req(const ir_node *irn, int pos)
{
if (is_Proj(irn)) {
+ ir_node *pred = get_Proj_pred(irn);
+ long pn = get_Proj_proj(irn);
assert(pos == -1);
- pos = -1-get_Proj_proj(irn);
- irn = get_Proj_pred(irn);
+ return arch_get_out_register_req(pred, pn);
}
if (pos < 0) {
return arch_get_out_register_req(irn, -pos-1);
} else {
- const arch_irn_ops_t *ops = get_irn_ops_simple(irn);
- return ops->get_irn_reg_req_in(irn, pos);
+ return arch_get_in_register_req(irn, pos);
}
}
}
}
-void arch_put_non_ignore_regs(const arch_register_class_t *cls, bitset_t *bs)
-{
- unsigned i;
-
- for (i = 0; i < cls->n_regs; ++i) {
- if (!arch_register_type_is(&cls->regs[i], ignore))
- bitset_set(bs, i);
- }
-}
-
int arch_reg_is_allocatable(const ir_node *irn, int pos,
const arch_register_t *reg)
{
static inline reg_out_info_t *get_out_info(const ir_node *node)
{
- int pos = 0;
+ size_t pos = 0;
const backend_info_t *info;
assert(get_irn_mode(node) != mode_T);
}
info = be_get_info(node);
- assert(pos >= 0 && pos < ARR_LEN(info->out_infos));
+ assert(pos < ARR_LEN(info->out_infos));
return &info->out_infos[pos];
}
{
const backend_info_t *info = be_get_info(node);
assert(!is_Proj(node));
- assert(pos >= 0 && pos < ARR_LEN(info->out_infos));
+ assert(pos >= 0 && pos < (int)ARR_LEN(info->out_infos));
return &info->out_infos[pos];
}
}
}
+ if (req->width != 1) {
+ fprintf(F, " width:%u", req->width);
+ }
+ if (arch_register_req_is(req, aligned)) {
+ fprintf(F, " aligned");
+ }
if (arch_register_req_is(req, ignore)) {
fprintf(F, " ignore");
}
if (flags & arch_irn_flags_modify_flags) {
fprintf(F, " modify_flags");
}
+ if (flags & arch_irn_flags_simple_jump) {
+ fprintf(F, " simple_jump");
+ }
+ if (flags & arch_irn_flags_not_scheduled) {
+ fprintf(F, " not_scheduled");
+ }
}
fprintf(F, " (%d)\n", flags);
}