const arch_register_req_t *arch_get_register_req(const ir_node *irn, int pos)
{
- const arch_irn_ops_t *ops;
-
if (is_Proj(irn)) {
+ ir_node *pred = get_Proj_pred(irn);
+ long pn = get_Proj_proj(irn);
assert(pos == -1);
- pos = -1-get_Proj_proj(irn);
- irn = get_Proj_pred(irn);
+ return arch_get_out_register_req(pred, pn);
}
- ops = get_irn_ops_simple(irn);
+
if (pos < 0) {
- return ops->get_irn_reg_req_out(irn, -pos-1);
+ return arch_get_out_register_req(irn, -pos-1);
} else {
- return ops->get_irn_reg_req_in(irn, pos);
+ return arch_get_in_register_req(irn, pos);
}
}
return ops->get_frame_entity(irn);
}
-void arch_set_frame_entity(ir_node *irn, ir_entity *ent)
-{
- const arch_irn_ops_t *ops = get_irn_ops(irn);
- ops->set_frame_entity(irn, ent);
-}
-
int arch_get_sp_bias(ir_node *irn)
{
const arch_irn_ops_t *ops = get_irn_ops(irn);
{
const arch_irn_ops_t *ops = get_irn_ops(irn);
- if(ops->get_inverse) {
+ if (ops->get_inverse) {
return ops->get_inverse(irn, i, inverse, obstack);
} else {
return NULL;
{
const arch_irn_ops_t *ops = get_irn_ops(irn);
- if(ops->possible_memory_operand) {
+ if (ops->possible_memory_operand) {
return ops->possible_memory_operand(irn, i);
} else {
return 0;
{
const arch_irn_ops_t *ops = get_irn_ops(irn);
- if(ops->perform_memory_operand) {
+ if (ops->perform_memory_operand) {
ops->perform_memory_operand(irn, spill, i);
} else {
return;
{
const arch_irn_ops_t *ops = get_irn_ops(irn);
- if(ops->get_op_estimated_cost) {
+ if (ops->get_op_estimated_cost) {
return ops->get_op_estimated_cost(irn);
} else {
return 1;
}
}
-void arch_put_non_ignore_regs(const arch_register_class_t *cls, bitset_t *bs)
-{
- unsigned i;
-
- for(i = 0; i < cls->n_regs; ++i) {
- if(!arch_register_type_is(&cls->regs[i], ignore))
- bitset_set(bs, i);
- }
-}
-
int arch_reg_is_allocatable(const ir_node *irn, int pos,
const arch_register_t *reg)
{
const arch_register_req_t *req = arch_get_register_req(irn, pos);
- if(req->type == arch_register_req_type_none)
+ if (req->type == arch_register_req_type_none)
return 0;
- if(arch_register_req_is(req, limited)) {
+ if (arch_register_req_is(req, limited)) {
if (arch_register_get_class(reg) != req->cls)
return 0;
return rbitset_is_set(req->limited, arch_register_get_index(reg));
static inline reg_out_info_t *get_out_info(const ir_node *node)
{
- int pos = 0;
+ size_t pos = 0;
const backend_info_t *info;
assert(get_irn_mode(node) != mode_T);
}
info = be_get_info(node);
- assert(pos >= 0 && pos < ARR_LEN(info->out_infos));
+ assert(pos < ARR_LEN(info->out_infos));
return &info->out_infos[pos];
}
{
const backend_info_t *info = be_get_info(node);
assert(!is_Proj(node));
- assert(pos >= 0 && pos < ARR_LEN(info->out_infos));
+ assert(pos >= 0 && pos < (int)ARR_LEN(info->out_infos));
return &info->out_infos[pos];
}
fprintf(F, "%s", req->cls->name);
- if(arch_register_req_is(req, limited)) {
+ if (arch_register_req_is(req, limited)) {
unsigned n_regs = req->cls->n_regs;
unsigned i;
fprintf(F, " limited to");
- for(i = 0; i < n_regs; ++i) {
- if(rbitset_is_set(req->limited, i)) {
+ for (i = 0; i < n_regs; ++i) {
+ if (rbitset_is_set(req->limited, i)) {
const arch_register_t *reg = &req->cls->regs[i];
fprintf(F, " %s", reg->name);
}
}
}
- if(arch_register_req_is(req, should_be_same)) {
+ if (arch_register_req_is(req, should_be_same)) {
const unsigned other = req->other_same;
int i;
}
}
+ if (req->width != 1) {
+ fprintf(F, " width:%u", req->width);
+ }
+ if (arch_register_req_is(req, aligned)) {
+ fprintf(F, " aligned");
+ }
if (arch_register_req_is(req, ignore)) {
fprintf(F, " ignore");
}
if (flags & arch_irn_flags_modify_flags) {
fprintf(F, " modify_flags");
}
+ if (flags & arch_irn_flags_simple_jump) {
+ fprintf(F, " simple_jump");
+ }
+ if (flags & arch_irn_flags_not_scheduled) {
+ fprintf(F, " not_scheduled");
+ }
}
fprintf(F, " (%d)\n", flags);
}
NULL,
NULL,
0,
+ 0,
0
};
const arch_register_req_t *arch_no_register_req = &no_requirement;