* @file
* @brief Processor architecture specification.
* @author Sebastian Hack
- * @version $Id$
*/
#include "config.h"
#include "irprintf.h"
+static const arch_register_req_t no_requirement = {
+ arch_register_req_type_none,
+ NULL,
+ NULL,
+ 0,
+ 0,
+ 0
+};
+const arch_register_req_t *arch_no_register_req = &no_requirement;
+
+static reg_out_info_t dummy_info = {
+ NULL,
+ &no_requirement
+};
+
/* Initialize the architecture environment struct. */
-arch_env_t *arch_env_init(const arch_isa_if_t *isa_if, FILE *file_handle, be_main_env_t *main_env)
+arch_env_t *arch_env_begin_codegeneration(const arch_isa_if_t *isa_if,
+ be_main_env_t *main_env)
{
- arch_env_t *arch_env = isa_if->init(file_handle);
+ arch_env_t *arch_env = isa_if->begin_codegeneration(main_env);
arch_env->main_env = main_env;
return arch_env;
}
* @param irn The node to get the responsible isa for.
* @return The irn operations given by the responsible isa.
*/
-static inline const arch_irn_ops_t *get_irn_ops(const ir_node *irn)
+static const arch_irn_ops_t *get_irn_ops(const ir_node *irn)
{
const ir_op *ops;
const arch_irn_ops_t *be_ops;
return be_ops;
}
-const arch_register_req_t *arch_get_register_req(const ir_node *irn, int pos)
-{
- if (is_Proj(irn)) {
- assert(pos == -1);
- pos = -1-get_Proj_proj(irn);
- irn = get_Proj_pred(irn);
- }
-
- if (pos < 0) {
- return arch_get_out_register_req(irn, -pos-1);
- } else {
- const arch_irn_ops_t *ops = get_irn_ops_simple(irn);
- return ops->get_irn_reg_req_in(irn, pos);
- }
-}
-
void arch_set_frame_offset(ir_node *irn, int offset)
{
const arch_irn_ops_t *ops = get_irn_ops(irn);
return ops->get_frame_entity(irn);
}
-void arch_set_frame_entity(ir_node *irn, ir_entity *ent)
-{
- const arch_irn_ops_t *ops = get_irn_ops(irn);
- ops->set_frame_entity(irn, ent);
-}
-
int arch_get_sp_bias(ir_node *irn)
{
const arch_irn_ops_t *ops = get_irn_ops(irn);
{
const arch_irn_ops_t *ops = get_irn_ops(irn);
- if(ops->get_inverse) {
+ if (ops->get_inverse) {
return ops->get_inverse(irn, i, inverse, obstack);
} else {
return NULL;
{
const arch_irn_ops_t *ops = get_irn_ops(irn);
- if(ops->possible_memory_operand) {
+ if (ops->possible_memory_operand) {
return ops->possible_memory_operand(irn, i);
} else {
return 0;
{
const arch_irn_ops_t *ops = get_irn_ops(irn);
- if(ops->perform_memory_operand) {
+ if (ops->perform_memory_operand) {
ops->perform_memory_operand(irn, spill, i);
} else {
return;
{
const arch_irn_ops_t *ops = get_irn_ops(irn);
- if(ops->get_op_estimated_cost) {
+ if (ops->get_op_estimated_cost) {
return ops->get_op_estimated_cost(irn);
} else {
return 1;
}
}
-void arch_put_non_ignore_regs(const arch_register_class_t *cls, bitset_t *bs)
-{
- unsigned i;
-
- for(i = 0; i < cls->n_regs; ++i) {
- if(!arch_register_type_is(&cls->regs[i], ignore))
- bitset_set(bs, i);
- }
-}
-
-int arch_reg_is_allocatable(const ir_node *irn, int pos,
- const arch_register_t *reg)
-{
- const arch_register_req_t *req = arch_get_register_req(irn, pos);
-
- if(req->type == arch_register_req_type_none)
- return 0;
-
- if(arch_register_req_is(req, limited)) {
- if (arch_register_get_class(reg) != req->cls)
- return 0;
- return rbitset_is_set(req->limited, arch_register_get_index(reg));
- }
-
- return req->cls == reg->reg_class;
-}
-
-const arch_register_class_t *arch_get_irn_reg_class(const ir_node *irn, int pos)
-{
- const arch_register_req_t *req = arch_get_register_req(irn, pos);
-
- assert(req->type != arch_register_req_type_none || req->cls == NULL);
-
- return req->cls;
-}
-
-static inline reg_out_info_t *get_out_info(const ir_node *node)
+static reg_out_info_t *get_out_info(const ir_node *node)
{
- int pos = 0;
+ size_t pos = 0;
const backend_info_t *info;
-
assert(get_irn_mode(node) != mode_T);
if (is_Proj(node)) {
pos = get_Proj_proj(node);
}
info = be_get_info(node);
- assert(pos >= 0 && pos < ARR_LEN(info->out_infos));
+ /* We have a problem with the switch-node where there can be arbitrary
+ * Proj-numbers, so we can't easily allocate an array big-enough to hold
+ * all of them. So until we rewrite Switch-nodes we need this special case
+ */
+ if (info->out_infos == NULL)
+ return &dummy_info;
+ assert(pos < ARR_LEN(info->out_infos));
return &info->out_infos[pos];
}
-
-static inline reg_out_info_t *get_out_info_n(const ir_node *node, int pos)
+static reg_out_info_t *get_out_info_n(const ir_node *node, int pos)
{
const backend_info_t *info = be_get_info(node);
assert(!is_Proj(node));
- assert(pos >= 0 && pos < ARR_LEN(info->out_infos));
+ assert(pos >= 0 && pos < (int)ARR_LEN(info->out_infos));
return &info->out_infos[pos];
}
return out->reg;
}
-const arch_register_t *arch_irn_get_register(const ir_node *node, int pos)
+const arch_register_t *arch_get_irn_register_out(const ir_node *node, int pos)
{
const reg_out_info_t *out = get_out_info_n(node, pos);
return out->reg;
}
-void arch_irn_set_register(ir_node *node, int pos, const arch_register_t *reg)
+const arch_register_t *arch_get_irn_register_in(const ir_node *node, int pos)
+{
+ ir_node *op = get_irn_n(node, pos);
+ return arch_get_irn_register(op);
+}
+
+void arch_set_irn_register_out(ir_node *node, int pos,
+ const arch_register_t *reg)
{
reg_out_info_t *out = get_out_info_n(node, pos);
out->reg = reg;
out->reg = reg;
}
-arch_irn_class_t arch_irn_classify(const ir_node *node)
+const arch_register_req_t *arch_get_irn_register_req(const ir_node *node)
{
- const arch_irn_ops_t *ops = get_irn_ops(node);
- return ops->classify(node);
+ reg_out_info_t *out = get_out_info(node);
+ return out->req;
}
-arch_irn_flags_t arch_irn_get_flags(const ir_node *node)
+arch_irn_flags_t arch_get_irn_flags(const ir_node *node)
{
- backend_info_t *info = be_get_info(node);
+ backend_info_t *info;
+ if (is_Proj(node))
+ return arch_irn_flags_not_scheduled;
+
+ info = be_get_info(node);
return info->flags;
}
-void arch_irn_set_flags(ir_node *node, arch_irn_flags_t flags)
+void arch_set_irn_flags(ir_node *node, arch_irn_flags_t flags)
{
- backend_info_t *info = be_get_info(node);
+ backend_info_t *info;
+
+ /* setting flags is only supported for instructions currently.
+ * (mainly because we found no use for it yet and saved the space for
+ * be_infos for them */
+ assert(!is_Proj(node));
+ info = be_get_info(node);
info->flags = flags;
}
-void arch_irn_add_flags(ir_node *node, arch_irn_flags_t flags)
+void arch_add_irn_flags(ir_node *node, arch_irn_flags_t flags)
{
- backend_info_t *info = be_get_info(node);
+ backend_info_t *info;
+ assert(!is_Proj(node));
+ info = be_get_info(node);
info->flags |= flags;
}
+bool arch_reg_is_allocatable(const arch_register_req_t *req,
+ const arch_register_t *reg)
+{
+ if (reg->type & arch_register_type_joker)
+ return true;
+ if (req->type == arch_register_req_type_none)
+ return false;
+ if (req->type & arch_register_req_type_limited) {
+ if (arch_register_get_class(reg) != req->cls)
+ return false;
+ return rbitset_is_set(req->limited, arch_register_get_index(reg));
+ }
+ return req->cls == arch_register_get_class(reg);
+}
+
void arch_dump_register_req(FILE *F, const arch_register_req_t *req,
const ir_node *node)
{
fprintf(F, "%s", req->cls->name);
- if(arch_register_req_is(req, limited)) {
+ if (arch_register_req_is(req, limited)) {
unsigned n_regs = req->cls->n_regs;
unsigned i;
fprintf(F, " limited to");
- for(i = 0; i < n_regs; ++i) {
- if(rbitset_is_set(req->limited, i)) {
+ for (i = 0; i < n_regs; ++i) {
+ if (rbitset_is_set(req->limited, i)) {
const arch_register_t *reg = &req->cls->regs[i];
fprintf(F, " %s", reg->name);
}
}
}
- if(arch_register_req_is(req, should_be_same)) {
+ if (arch_register_req_is(req, should_be_same)) {
const unsigned other = req->other_same;
int i;
}
}
+ if (req->width != 1) {
+ fprintf(F, " width:%d", req->width);
+ }
+ if (arch_register_req_is(req, aligned)) {
+ fprintf(F, " aligned");
+ }
if (arch_register_req_is(req, ignore)) {
fprintf(F, " ignore");
}
void arch_dump_reqs_and_registers(FILE *F, const ir_node *node)
{
int n_ins = get_irn_arity(node);
- int n_outs = arch_irn_get_n_outs(node);
- arch_irn_flags_t flags = arch_irn_get_flags(node);
+ int n_outs = arch_get_irn_n_outs(node);
+ arch_irn_flags_t flags = arch_get_irn_flags(node);
int i;
for (i = 0; i < n_ins; ++i) {
- const arch_register_req_t *req = arch_get_in_register_req(node, i);
+ const arch_register_req_t *req = arch_get_irn_register_req_in(node, i);
fprintf(F, "inreq #%d = ", i);
arch_dump_register_req(F, req, node);
fputs("\n", F);
}
for (i = 0; i < n_outs; ++i) {
- const arch_register_req_t *req = arch_get_out_register_req(node, i);
+ const arch_register_req_t *req = arch_get_irn_register_req_out(node, i);
fprintf(F, "outreq #%d = ", i);
arch_dump_register_req(F, req, node);
fputs("\n", F);
}
for (i = 0; i < n_outs; ++i) {
- const arch_register_t *reg = arch_irn_get_register(node, i);
- const arch_register_req_t *req = arch_get_out_register_req(node, i);
+ const arch_register_t *reg = arch_get_irn_register_out(node, i);
+ const arch_register_req_t *req = arch_get_irn_register_req_out(node, i);
if (req->cls == NULL)
continue;
fprintf(F, "reg #%d = %s\n", i, reg != NULL ? reg->name : "n/a");
if (flags & arch_irn_flags_modify_flags) {
fprintf(F, " modify_flags");
}
+ if (flags & arch_irn_flags_simple_jump) {
+ fprintf(F, " simple_jump");
+ }
+ if (flags & arch_irn_flags_not_scheduled) {
+ fprintf(F, " not_scheduled");
+ }
}
- fprintf(F, " (%d)\n", flags);
+ fprintf(F, " (%d)\n", (int)flags);
}
-
-static const arch_register_req_t no_requirement = {
- arch_register_req_type_none,
- NULL,
- NULL,
- 0,
- 0
-};
-const arch_register_req_t *arch_no_register_req = &no_requirement;