* @author Sebastian Hack
* @version $Id$
*/
-#ifdef HAVE_CONFIG_H
#include "config.h"
-#endif
#include <string.h>
-#include "bearch_t.h"
-#include "benode_t.h"
+#include "bearch.h"
+#include "benode.h"
+#include "beinfo.h"
#include "ircons_t.h"
#include "irnode_t.h"
+#include "irop_t.h"
#include "bitset.h"
#include "pset.h"
#include "irprintf.h"
+static const arch_register_req_t no_requirement = {
+ arch_register_req_type_none,
+ NULL,
+ NULL,
+ 0,
+ 0,
+ 0
+};
+const arch_register_req_t *arch_no_register_req = &no_requirement;
+
+static reg_out_info_t dummy_info = {
+ NULL,
+ &no_requirement
+};
+
/* Initialize the architecture environment struct. */
arch_env_t *arch_env_init(const arch_isa_if_t *isa_if, FILE *file_handle, be_main_env_t *main_env)
{
return arch_env;
}
-/**
- * Put all registers in a class into a bitset.
- * @param cls The class.
- * @param bs The bitset.
- * @return The number of registers in the class.
- */
-static int arch_register_class_put(const arch_register_class_t *cls, bitset_t *bs)
-{
- int i, n = cls->n_regs;
- for (i = n - 1; i >= 0; --i)
- bitset_set(bs, i);
- return n;
-}
-
/**
* Get the isa responsible for a node.
* @param irn The node to get the responsible isa for.
* @return The irn operations given by the responsible isa.
*/
-static INLINE const arch_irn_ops_t *get_irn_ops(const ir_node *irn)
+static const arch_irn_ops_t *get_irn_ops(const ir_node *irn)
{
const ir_op *ops;
const arch_irn_ops_t *be_ops;
ops = get_irn_op(irn);
be_ops = get_op_ops(ops)->be_ops;
- assert(be_ops);
return be_ops;
}
-const arch_register_req_t *arch_get_register_req(const ir_node *irn, int pos)
-{
- const arch_irn_ops_t *ops = get_irn_ops(irn);
- return ops->get_irn_reg_req(irn, pos);
-}
-
void arch_set_frame_offset(ir_node *irn, int offset)
{
const arch_irn_ops_t *ops = get_irn_ops(irn);
return ops->get_frame_entity(irn);
}
-void arch_set_frame_entity(ir_node *irn, ir_entity *ent)
-{
- const arch_irn_ops_t *ops = get_irn_ops(irn);
- ops->set_frame_entity(irn, ent);
-}
-
int arch_get_sp_bias(ir_node *irn)
{
const arch_irn_ops_t *ops = get_irn_ops(irn);
{
const arch_irn_ops_t *ops = get_irn_ops(irn);
- if(ops->get_inverse) {
+ if (ops->get_inverse) {
return ops->get_inverse(irn, i, inverse, obstack);
} else {
return NULL;
{
const arch_irn_ops_t *ops = get_irn_ops(irn);
- if(ops->possible_memory_operand) {
+ if (ops->possible_memory_operand) {
return ops->possible_memory_operand(irn, i);
} else {
return 0;
{
const arch_irn_ops_t *ops = get_irn_ops(irn);
- if(ops->perform_memory_operand) {
+ if (ops->perform_memory_operand) {
ops->perform_memory_operand(irn, spill, i);
} else {
return;
{
const arch_irn_ops_t *ops = get_irn_ops(irn);
- if(ops->get_op_estimated_cost) {
+ if (ops->get_op_estimated_cost) {
return ops->get_op_estimated_cost(irn);
} else {
return 1;
}
}
-int arch_get_allocatable_regs(const ir_node *irn, int pos, bitset_t *bs)
+static reg_out_info_t *get_out_info(const ir_node *node)
{
- const arch_irn_ops_t *ops = get_irn_ops(irn);
- const arch_register_req_t *req = ops->get_irn_reg_req(irn, pos);
-
- if(req->type == arch_register_req_type_none) {
- bitset_clear_all(bs);
- return 0;
- }
-
- if(arch_register_req_is(req, limited)) {
- rbitset_copy_to_bitset(req->limited, bs);
- return bitset_popcnt(bs);
+ size_t pos = 0;
+ const backend_info_t *info;
+ assert(get_irn_mode(node) != mode_T);
+ if (is_Proj(node)) {
+ pos = get_Proj_proj(node);
+ node = get_Proj_pred(node);
}
- arch_register_class_put(req->cls, bs);
- return req->cls->n_regs;
+ info = be_get_info(node);
+ /* We have a problem with the switch-node where there can be arbitrary
+ * Proj-numbers, so we can't easily allocate an array big-enough to hold
+ * all of them. So until we rewrite Switch-nodes we need this special case
+ */
+ if (info->out_infos == NULL)
+ return &dummy_info;
+ assert(pos < ARR_LEN(info->out_infos));
+ return &info->out_infos[pos];
}
-void arch_put_non_ignore_regs(const arch_register_class_t *cls, bitset_t *bs)
+static reg_out_info_t *get_out_info_n(const ir_node *node, int pos)
{
- unsigned i;
-
- for(i = 0; i < cls->n_regs; ++i) {
- if(!arch_register_type_is(&cls->regs[i], ignore))
- bitset_set(bs, i);
- }
+ const backend_info_t *info = be_get_info(node);
+ assert(!is_Proj(node));
+ assert(pos >= 0 && pos < (int)ARR_LEN(info->out_infos));
+ return &info->out_infos[pos];
}
-int arch_is_register_operand(const ir_node *irn, int pos)
-{
- const arch_irn_ops_t *ops = get_irn_ops(irn);
- const arch_register_req_t *req = ops->get_irn_reg_req(irn, pos);
- return req != NULL;
+const arch_register_t *arch_get_irn_register(const ir_node *node)
+{
+ const reg_out_info_t *out = get_out_info(node);
+ return out->reg;
}
-int arch_reg_is_allocatable(const ir_node *irn, int pos, const arch_register_t *reg)
+const arch_register_t *arch_get_irn_register_out(const ir_node *node, int pos)
{
- const arch_register_req_t *req = arch_get_register_req(irn, pos);
-
- if(req->type == arch_register_req_type_none)
- return 0;
-
- if(arch_register_req_is(req, limited)) {
- assert(arch_register_get_class(reg) == req->cls);
- return rbitset_is_set(req->limited, arch_register_get_index(reg));
- }
+ const reg_out_info_t *out = get_out_info_n(node, pos);
+ return out->reg;
+}
- return req->cls == reg->reg_class;
+const arch_register_t *arch_get_irn_register_in(const ir_node *node, int pos)
+{
+ ir_node *op = get_irn_n(node, pos);
+ return arch_get_irn_register(op);
}
-const arch_register_class_t *arch_get_irn_reg_class(const ir_node *irn, int pos)
+void arch_set_irn_register_out(ir_node *node, int pos,
+ const arch_register_t *reg)
{
- const arch_irn_ops_t *ops = get_irn_ops(irn);
- const arch_register_req_t *req = ops->get_irn_reg_req(irn, pos);
+ reg_out_info_t *out = get_out_info_n(node, pos);
+ out->reg = reg;
+}
- assert(req->type != arch_register_req_type_none || req->cls == NULL);
+void arch_set_irn_register(ir_node *node, const arch_register_t *reg)
+{
+ reg_out_info_t *out = get_out_info(node);
+ out->reg = reg;
+}
- return req->cls;
+const arch_register_req_t *arch_get_irn_register_req(const ir_node *node)
+{
+ reg_out_info_t *out = get_out_info(node);
+ return out->req;
}
-const arch_register_t *arch_get_irn_register(const ir_node *irn)
+arch_irn_class_t arch_irn_classify(const ir_node *node)
{
- const arch_irn_ops_t *ops = get_irn_ops(irn);
- return ops->get_irn_reg(irn);
+ const arch_irn_ops_t *ops = get_irn_ops(node);
+ return ops->classify(node);
}
-void arch_set_irn_register(ir_node *irn, const arch_register_t *reg)
+arch_irn_flags_t arch_get_irn_flags(const ir_node *node)
{
- const arch_irn_ops_t *ops = get_irn_ops(irn);
- ops->set_irn_reg(irn, reg);
+ backend_info_t *info;
+ if (is_Proj(node))
+ return arch_irn_flags_not_scheduled;
+
+ info = be_get_info(node);
+ return info->flags;
}
-arch_irn_class_t arch_irn_classify(const ir_node *irn)
+void arch_set_irn_flags(ir_node *node, arch_irn_flags_t flags)
{
- const arch_irn_ops_t *ops = get_irn_ops(irn);
- return ops->classify(irn);
+ backend_info_t *info;
+
+ /* setting flags is only supported for instructions currently.
+ * (mainly because we found no use for it yet and saved the space for
+ * be_infos for them */
+ assert(!is_Proj(node));
+ info = be_get_info(node);
+ info->flags = flags;
}
-extern arch_irn_flags_t arch_irn_get_flags(const arch_env_t *env, const ir_node *irn)
+void arch_add_irn_flags(ir_node *node, arch_irn_flags_t flags)
{
- const arch_irn_ops_t *ops = get_irn_ops(irn);
- (void)env; // TODO remove parameter
- return ops->get_flags(irn);
+ backend_info_t *info;
+ assert(!is_Proj(node));
+ info = be_get_info(node);
+ info->flags |= flags;
}
-extern const char *arch_irn_flag_str(arch_irn_flags_t fl)
+bool arch_reg_is_allocatable(const arch_register_req_t *req,
+ const arch_register_t *reg)
{
- switch(fl) {
-#define XXX(x) case arch_irn_flags_ ## x: return #x;
- XXX(dont_spill);
- XXX(ignore);
- XXX(rematerializable);
- XXX(modify_sp);
- XXX(modify_flags);
- XXX(none);
-#undef XXX
+ if (reg->type & arch_register_type_joker)
+ return true;
+ if (req->type == arch_register_req_type_none)
+ return false;
+ if (req->type & arch_register_req_type_limited) {
+ if (arch_register_get_class(reg) != req->cls)
+ return false;
+ return rbitset_is_set(req->limited, arch_register_get_index(reg));
}
- return "n/a";
+ return req->cls == arch_register_get_class(reg);
}
-extern char *arch_register_req_format(char *buf, size_t len,
- const arch_register_req_t *req,
- const ir_node *node)
+void arch_dump_register_req(FILE *F, const arch_register_req_t *req,
+ const ir_node *node)
{
- char tmp[128];
- snprintf(buf, len, "class: %s", req->cls->name);
+ if (req == NULL || req->type == arch_register_req_type_none) {
+ fprintf(F, "n/a");
+ return;
+ }
+
+ fprintf(F, "%s", req->cls->name);
- if(arch_register_req_is(req, limited)) {
+ if (arch_register_req_is(req, limited)) {
unsigned n_regs = req->cls->n_regs;
unsigned i;
- strncat(buf, " limited:", len);
- for(i = 0; i < n_regs; ++i) {
- if(rbitset_is_set(req->limited, i)) {
+ fprintf(F, " limited to");
+ for (i = 0; i < n_regs; ++i) {
+ if (rbitset_is_set(req->limited, i)) {
const arch_register_t *reg = &req->cls->regs[i];
- strncat(buf, " ", len);
- strncat(buf, reg->name, len);
+ fprintf(F, " %s", reg->name);
}
}
}
- if(arch_register_req_is(req, should_be_same)) {
+ if (arch_register_req_is(req, should_be_same)) {
const unsigned other = req->other_same;
int i;
- ir_snprintf(tmp, sizeof(tmp), " same to:");
+ fprintf(F, " same as");
for (i = 0; 1U << i <= other; ++i) {
if (other & (1U << i)) {
- ir_snprintf(tmp, sizeof(tmp), " %+F", get_irn_n(skip_Proj_const(node), i));
- strncat(buf, tmp, len);
+ ir_fprintf(F, " %+F", get_irn_n(skip_Proj_const(node), i));
}
}
}
const unsigned other = req->other_different;
int i;
- ir_snprintf(tmp, sizeof(tmp), " different from:");
+ fprintf(F, " different from");
for (i = 0; 1U << i <= other; ++i) {
if (other & (1U << i)) {
- ir_snprintf(tmp, sizeof(tmp), " %+F", get_irn_n(skip_Proj_const(node), i));
- strncat(buf, tmp, len);
+ ir_fprintf(F, " %+F", get_irn_n(skip_Proj_const(node), i));
}
}
}
- return buf;
+ if (req->width != 1) {
+ fprintf(F, " width:%d", req->width);
+ }
+ if (arch_register_req_is(req, aligned)) {
+ fprintf(F, " aligned");
+ }
+ if (arch_register_req_is(req, ignore)) {
+ fprintf(F, " ignore");
+ }
+ if (arch_register_req_is(req, produces_sp)) {
+ fprintf(F, " produces_sp");
+ }
}
-static const arch_register_req_t no_requirement = {
- arch_register_req_type_none,
- NULL,
- NULL,
- 0,
- 0
-};
-const arch_register_req_t *arch_no_register_req = &no_requirement;
+void arch_dump_reqs_and_registers(FILE *F, const ir_node *node)
+{
+ int n_ins = get_irn_arity(node);
+ int n_outs = arch_get_irn_n_outs(node);
+ arch_irn_flags_t flags = arch_get_irn_flags(node);
+ int i;
+
+ for (i = 0; i < n_ins; ++i) {
+ const arch_register_req_t *req = arch_get_irn_register_req_in(node, i);
+ fprintf(F, "inreq #%d = ", i);
+ arch_dump_register_req(F, req, node);
+ fputs("\n", F);
+ }
+ for (i = 0; i < n_outs; ++i) {
+ const arch_register_req_t *req = arch_get_irn_register_req_out(node, i);
+ fprintf(F, "outreq #%d = ", i);
+ arch_dump_register_req(F, req, node);
+ fputs("\n", F);
+ }
+ for (i = 0; i < n_outs; ++i) {
+ const arch_register_t *reg = arch_get_irn_register_out(node, i);
+ const arch_register_req_t *req = arch_get_irn_register_req_out(node, i);
+ if (req->cls == NULL)
+ continue;
+ fprintf(F, "reg #%d = %s\n", i, reg != NULL ? reg->name : "n/a");
+ }
+
+ fprintf(F, "flags =");
+ if (flags == arch_irn_flags_none) {
+ fprintf(F, " none");
+ } else {
+ if (flags & arch_irn_flags_dont_spill) {
+ fprintf(F, " unspillable");
+ }
+ if (flags & arch_irn_flags_rematerializable) {
+ fprintf(F, " remat");
+ }
+ if (flags & arch_irn_flags_modify_flags) {
+ fprintf(F, " modify_flags");
+ }
+ if (flags & arch_irn_flags_simple_jump) {
+ fprintf(F, " simple_jump");
+ }
+ if (flags & arch_irn_flags_not_scheduled) {
+ fprintf(F, " not_scheduled");
+ }
+ }
+ fprintf(F, " (%d)\n", (int)flags);
+}
projects / libfirm / blobdiff