-/**
- * Processor architecture specification.
- * @author Sebastian Hack
- * @date 11.2.2005
- *
- * $Id$
+/*
+ * This file is part of libFirm.
+ * Copyright (C) 2012 University of Karlsruhe.
*/
-#ifdef HAVE_CONFIG_H
+/**
+ * @file
+ * @brief Processor architecture specification.
+ * @author Sebastian Hack
+ */
#include "config.h"
-#endif
-
-#ifdef HAVE_ALLOCA_H
-#include <alloca.h>
-#endif
-
-#ifdef HAVE_MALLOC_H
-#include <malloc.h>
-#endif
#include <string.h>
#include "bearch.h"
+#include "benode.h"
+#include "beinfo.h"
#include "ircons_t.h"
+#include "irnode_t.h"
+#include "irop_t.h"
#include "bitset.h"
#include "pset.h"
-#include "entity.h"
+#include "raw_bitset.h"
-arch_env_t *arch_env_init(arch_env_t *env, const arch_isa_if_t *isa_if)
-{
- memset(env, 0, sizeof(*env));
- env->isa = isa_if->init();
- return env;
-}
+#include "irprintf.h"
-arch_env_t *arch_env_add_irn_handler(arch_env_t *env,
- const arch_irn_handler_t *handler)
-{
- assert(env->handlers_tos <= ARCH_MAX_HANDLERS);
- env->handlers[env->handlers_tos++] = handler;
- return env;
-}
-
-static const arch_irn_ops_t *fallback_irn_ops = NULL;
-
-int arch_register_class_put(const arch_register_class_t *cls, bitset_t *bs)
-{
- if(bs) {
- int i, n;
- for(i = 0, n = cls->n_regs; i < n; ++i)
- bitset_set(bs, i);
- }
-
- return cls->n_regs;
-}
+arch_register_req_t const arch_no_requirement = {
+ arch_register_req_type_none,
+ NULL,
+ NULL,
+ 0,
+ 0,
+ 0
+};
/**
* Get the isa responsible for a node.
- * @param env The arch environment with the isa stack.
* @param irn The node to get the responsible isa for.
* @return The irn operations given by the responsible isa.
*/
-static INLINE const arch_irn_ops_t *
-get_irn_ops(const arch_env_t *env, const ir_node *irn)
+static const arch_irn_ops_t *get_irn_ops(const ir_node *irn)
{
- int i;
+ if (is_Proj(irn)) {
+ irn = get_Proj_pred(irn);
+ assert(!is_Proj(irn));
+ }
- for(i = env->handlers_tos - 1; i >= 0; --i) {
- const arch_irn_handler_t *handler = env->handlers[i];
- const arch_irn_ops_t *ops = handler->get_irn_ops(handler, irn);
+ ir_op *ops = get_irn_op(irn);
+ const arch_irn_ops_t *be_ops = get_op_ops(ops)->be_ops;
- if(ops)
- return ops;
- }
+ return be_ops;
+}
- return fallback_irn_ops;
+void arch_set_frame_offset(ir_node *irn, int offset)
+{
+ const arch_irn_ops_t *ops = get_irn_ops(irn);
+ ops->set_frame_offset(irn, offset);
}
-const arch_register_req_t *arch_get_register_req(const arch_env_t *env,
- arch_register_req_t *req, const ir_node *irn, int pos)
+ir_entity *arch_get_frame_entity(const ir_node *irn)
{
- const arch_irn_ops_t *ops = get_irn_ops(env, irn);
- req->type = arch_register_req_type_none;
- return ops->impl->get_irn_reg_req(ops, req, irn, pos);
+ const arch_irn_ops_t *ops = get_irn_ops(irn);
+ return ops->get_frame_entity(irn);
}
-int arch_get_allocatable_regs(const arch_env_t *env, const ir_node *irn,
- int pos, const arch_register_class_t *cls, bitset_t *bs)
+int arch_get_sp_bias(ir_node *irn)
{
- arch_register_req_t local_req;
- const arch_irn_ops_t *ops = get_irn_ops(env, irn);
- const arch_register_req_t *req = ops->impl->get_irn_reg_req(ops, &local_req, irn, pos);
+ const arch_irn_ops_t *ops = get_irn_ops(irn);
+ return ops->get_sp_bias(irn);
+}
+
+int arch_possible_memory_operand(const ir_node *irn, unsigned int i)
+{
+ const arch_irn_ops_t *ops = get_irn_ops(irn);
- if(req->type == arch_register_req_type_none) {
- bitset_clear_all(bs);
- return 0;
- }
+ if (ops->possible_memory_operand) {
+ return ops->possible_memory_operand(irn, i);
+ } else {
+ return 0;
+ }
+}
- if(arch_register_req_is(req, limited)) {
- req->limited(irn, pos, bs);
- return bitset_popcnt(bs);
- }
+void arch_perform_memory_operand(ir_node *irn, ir_node *spill, unsigned int i)
+{
+ const arch_irn_ops_t *ops = get_irn_ops(irn);
- arch_register_class_put(req->cls, bs);
- return req->cls->n_regs;
+ if (ops->perform_memory_operand) {
+ ops->perform_memory_operand(irn, spill, i);
+ } else {
+ return;
+ }
}
-int arch_is_register_operand(const arch_env_t *env,
- const ir_node *irn, int pos)
+int arch_get_op_estimated_cost(const ir_node *irn)
{
- arch_register_req_t local_req;
- const arch_irn_ops_t *ops = get_irn_ops(env, irn);
- const arch_register_req_t *req = ops->impl->get_irn_reg_req(ops, &local_req, irn, pos);
- return req != NULL;
+ const arch_irn_ops_t *ops = get_irn_ops(irn);
+
+ if (ops->get_op_estimated_cost) {
+ return ops->get_op_estimated_cost(irn);
+ } else {
+ return 1;
+ }
}
-int arch_reg_is_allocatable(const arch_env_t *env, const ir_node *irn,
- int pos, const arch_register_t *reg)
+static reg_out_info_t *get_out_info_n(const ir_node *node, unsigned pos)
{
- arch_register_req_t req;
+ const backend_info_t *info = be_get_info(node);
+ assert(pos < (unsigned)ARR_LEN(info->out_infos));
+ return &info->out_infos[pos];
+}
- arch_get_register_req(env, &req, irn, pos);
- if(req.type == arch_register_req_type_none)
- return 0;
+const arch_register_t *arch_get_irn_register(const ir_node *node)
+{
+ const reg_out_info_t *out = get_out_info(node);
+ return out->reg;
+}
- if(arch_register_req_is(&req, limited)) {
- bitset_t *bs = bitset_alloca(req.cls->n_regs);
- req.limited(irn, pos, bs);
- return bitset_is_set(bs, arch_register_get_index(reg));
- }
+const arch_register_t *arch_get_irn_register_out(const ir_node *node,
+ unsigned pos)
+{
+ const reg_out_info_t *out = get_out_info_n(node, pos);
+ return out->reg;
+}
+
+const arch_register_t *arch_get_irn_register_in(const ir_node *node, int pos)
+{
+ ir_node *op = get_irn_n(node, pos);
+ return arch_get_irn_register(op);
+}
- return req.cls == reg->reg_class;
+void arch_set_irn_register_out(ir_node *node, unsigned pos,
+ const arch_register_t *reg)
+{
+ reg_out_info_t *out = get_out_info_n(node, pos);
+ out->reg = reg;
+}
+
+void arch_set_irn_register(ir_node *node, const arch_register_t *reg)
+{
+ reg_out_info_t *out = get_out_info(node);
+ out->reg = reg;
}
-const arch_register_class_t *
-arch_get_irn_reg_class(const arch_env_t *env, const ir_node *irn, int pos)
+void arch_set_irn_flags(ir_node *node, arch_irn_flags_t flags)
{
- arch_register_req_t local_req;
- const arch_irn_ops_t *ops = get_irn_ops(env, irn);
- const arch_register_req_t *req = ops->impl->get_irn_reg_req(ops, &local_req, irn, pos);
- return req ? req->cls : NULL;
+ backend_info_t *const info = be_get_info(node);
+ info->flags = flags;
}
-extern const arch_register_t *
-arch_get_irn_register(const arch_env_t *env, const ir_node *irn)
+void arch_add_irn_flags(ir_node *node, arch_irn_flags_t flags)
{
- const arch_irn_ops_t *ops = get_irn_ops(env, irn);
- return ops->impl->get_irn_reg(ops, irn);
+ backend_info_t *const info = be_get_info(node);
+ info->flags |= flags;
}
-extern void arch_set_irn_register(const arch_env_t *env,
- ir_node *irn, const arch_register_t *reg)
+bool arch_reg_is_allocatable(const arch_register_req_t *req,
+ const arch_register_t *reg)
{
- const arch_irn_ops_t *ops = get_irn_ops(env, irn);
- ops->impl->set_irn_reg(ops, irn, reg);
+ assert(req->type != arch_register_req_type_none);
+ if (req->cls != reg->reg_class)
+ return false;
+ if (reg->type & arch_register_type_virtual)
+ return true;
+ if (arch_register_req_is(req, limited))
+ return rbitset_is_set(req->limited, reg->index);
+ return true;
}
-extern arch_irn_class_t arch_irn_classify(const arch_env_t *env, const ir_node *irn)
+/**
+ * Print information about a register requirement in human readable form
+ * @param F output stream/file
+ * @param req The requirements structure to format.
+ */
+static void arch_dump_register_req(FILE *F, const arch_register_req_t *req,
+ const ir_node *node)
{
- const arch_irn_ops_t *ops = get_irn_ops(env, irn);
- return ops->impl->classify(ops, irn);
+ if (req == NULL || req->type == arch_register_req_type_none) {
+ fprintf(F, "n/a");
+ return;
+ }
+
+ fprintf(F, "%s", req->cls->name);
+
+ if (arch_register_req_is(req, limited)) {
+ unsigned n_regs = req->cls->n_regs;
+ unsigned i;
+
+ fprintf(F, " limited to");
+ for (i = 0; i < n_regs; ++i) {
+ if (rbitset_is_set(req->limited, i)) {
+ const arch_register_t *reg = &req->cls->regs[i];
+ fprintf(F, " %s", reg->name);
+ }
+ }
+ }
+
+ if (arch_register_req_is(req, should_be_same)) {
+ const unsigned other = req->other_same;
+ int i;
+
+ fprintf(F, " same as");
+ for (i = 0; 1U << i <= other; ++i) {
+ if (other & (1U << i)) {
+ ir_fprintf(F, " #%d (%+F)", i, get_irn_n(skip_Proj_const(node), i));
+ }
+ }
+ }
+
+ if (arch_register_req_is(req, must_be_different)) {
+ const unsigned other = req->other_different;
+ int i;
+
+ fprintf(F, " different from");
+ for (i = 0; 1U << i <= other; ++i) {
+ if (other & (1U << i)) {
+ ir_fprintf(F, " #%d (%+F)", i, get_irn_n(skip_Proj_const(node), i));
+ }
+ }
+ }
+
+ if (req->width != 1) {
+ fprintf(F, " width:%d", req->width);
+ }
+ if (arch_register_req_is(req, aligned)) {
+ fprintf(F, " aligned");
+ }
+ if (arch_register_req_is(req, ignore)) {
+ fprintf(F, " ignore");
+ }
+ if (arch_register_req_is(req, produces_sp)) {
+ fprintf(F, " produces_sp");
+ }
}
-extern arch_irn_flags_t arch_irn_get_flags(const arch_env_t *env, const ir_node *irn)
+void arch_dump_reqs_and_registers(FILE *F, const ir_node *node)
{
- const arch_irn_ops_t *ops = get_irn_ops(env, irn);
- return ops->impl->get_flags(ops, irn);
+ backend_info_t *const info = be_get_info(node);
+ int const n_ins = get_irn_arity(node);
+ /* don't fail on invalid graphs */
+ if (!info || (!info->in_reqs && n_ins != 0) || !info->out_infos) {
+ fprintf(F, "invalid register requirements!!!\n");
+ return;
+ }
+
+ for (int i = 0; i < n_ins; ++i) {
+ const arch_register_req_t *req = arch_get_irn_register_req_in(node, i);
+ fprintf(F, "inreq #%d = ", i);
+ arch_dump_register_req(F, req, node);
+ fputs("\n", F);
+ }
+ be_foreach_out(node, o) {
+ const arch_register_req_t *req = arch_get_irn_register_req_out(node, o);
+ fprintf(F, "outreq #%u = ", o);
+ arch_dump_register_req(F, req, node);
+ const arch_register_t *reg = arch_get_irn_register_out(node, o);
+ fprintf(F, " [%s]\n", reg != NULL ? reg->name : "n/a");
+ }
+
+ fprintf(F, "flags =");
+ arch_irn_flags_t flags = arch_get_irn_flags(node);
+ if (flags == arch_irn_flags_none) {
+ fprintf(F, " none");
+ } else {
+ if (flags & arch_irn_flags_dont_spill) {
+ fprintf(F, " unspillable");
+ }
+ if (flags & arch_irn_flags_rematerializable) {
+ fprintf(F, " remat");
+ }
+ if (flags & arch_irn_flags_modify_flags) {
+ fprintf(F, " modify_flags");
+ }
+ if (flags & arch_irn_flags_simple_jump) {
+ fprintf(F, " simple_jump");
+ }
+ if (flags & arch_irn_flags_not_scheduled) {
+ fprintf(F, " not_scheduled");
+ }
+ }
+ fprintf(F, " (0x%x)\n", (unsigned)flags);
}
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