/*
- * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
+ * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
*
* This file is part of libFirm.
*
#include "obst.h"
#include "debug.h"
#include "bitset.h"
+#include "timing.h"
+#include "pmap.h"
#include "be.h"
-#include "bearch.h"
-#include "be_dbgout.h"
+#include "bearch_t.h"
#include "beirg.h"
#define DUMP_NONE 0
int timing; /**< time the backend phases */
int opt_profile; /**< instrument code for profiling */
int omit_fp; /**< try to omit the frame pointer */
- int stabs_debug_support; /**< enable stabs debugging support */
+ int omit_leaf_fp; /**< try to omit the frame pointer in leaf routines */
+ int pic; /**< create position independent code */
+ int gprof; /**< create gprof compatible profiling code */
int vrfy_option; /**< backend verify option */
int scheduler; /**< the scheduler */
+ char target_os[128]; /**< target operating system name */
char ilp_server[128]; /**< the ilp server name */
char ilp_solver[128]; /**< the ilp solver name */
int statev; /**< enable stat event dumping */
- char printev[128];
+ char filtev[128]; /**< filter mask for stat events (regex is supported) */
};
struct be_main_env_t {
- struct obstack obst;
arch_env_t *arch_env;
- be_options_t *options;
+ be_options_t *options; /**< backend options */
arch_code_generator_t *cg;
- arch_irn_handler_t *phi_handler;
- dbg_handle *db_handle;
+ const char *cup_name; /**< name of the compilation unit */
+ pmap *ent_trampoline_map; /**< A map containing PIC trampolines for methods. */
+ ir_type *pic_trampolines_type; /**< Class type containing all trampolines */
+ pmap *ent_pic_symbol_map;
+ ir_type *pic_symbols_type;
};
/**
-* Put the registers to be ignored in this IRG into a bitset.
-* @param birg The backend IRG data structure.
-* @param cls The register class.
-* @param bs The bitset (may be NULL).
-* @return The number of registers to be ignored.
-*/
-unsigned be_put_ignore_regs(const be_irg_t *birg, const arch_register_class_t *cls,
- bitset_t *bs);
+ * Put the registers to be ignored in this IRG into a bitset.
+ * @param birg The backend IRG data structure.
+ * @param cls The register class.
+ * @param bs The bitset (may be NULL).
+ * @return The number of registers to be ignored.
+ */
+unsigned be_put_ignore_regs(const be_irg_t *birg,
+ const arch_register_class_t *cls, bitset_t *bs);
+
+
+/**
+ * Initialize the backend. Must be run first in init_firm();
+ */
+void firm_be_init(void);
+
+extern int be_timing;
+
+#define BE_TIMER_PUSH(timer) \
+ if (be_timing) { \
+ int res = ir_timer_push(timer); \
+ (void) res; \
+ assert(res && "Timer already on stack, cannot be pushed twice."); \
+ }
+
+#define BE_TIMER_POP(timer) \
+ if (be_timing) { \
+ ir_timer_t *tmp = ir_timer_pop(); \
+ (void) tmp; \
+ assert(tmp == timer && "Attempt to pop wrong timer."); \
+ }
+
+extern ir_timer_t *t_abi;
+extern ir_timer_t *t_codegen;
+extern ir_timer_t *t_sched;
+extern ir_timer_t *t_constr;
+extern ir_timer_t *t_finish;
+extern ir_timer_t *t_emit;
+extern ir_timer_t *t_other;
+extern ir_timer_t *t_execfreq;
+extern ir_timer_t *t_verify;
+extern ir_timer_t *t_heights;
+extern ir_timer_t *t_live; /**< timer for liveness calculation */
+extern ir_timer_t *t_ssa_constr; /**< timer for ssa reconstruction */
+extern ir_timer_t *t_ra_prolog; /**< timer for prolog */
+extern ir_timer_t *t_ra_epilog; /**< timer for epilog */
+extern ir_timer_t *t_ra_constr; /**< timer for spill constraints */
+extern ir_timer_t *t_ra_spill; /**< timer for spilling */
+extern ir_timer_t *t_ra_spill_apply;
+extern ir_timer_t *t_ra_color; /**< timer for graph coloring */
+extern ir_timer_t *t_ra_ifg; /**< timer for building interference graph */
+extern ir_timer_t *t_ra_copymin; /**< timer for copy minimization */
+extern ir_timer_t *t_ra_ssa; /**< timer for ssa destruction */
+extern ir_timer_t *t_ra_other; /**< timer for remaining stuff */
#endif /* FIRM_BE_BE_T_H */