* @author Oliver Richter, Tobias Gneist
* @version $Id$
*/
-#ifdef HAVE_CONFIG_H
#include "config.h"
-#endif
#include "lc_opts.h"
#include "lc_opts_enum.h"
#include "bitset.h"
#include "debug.h"
+#include "array_t.h"
#include "irtools.h"
#include "../bearch_t.h" /* the general register allocator interface */
return arch_no_register_req;
}
-static void arm_set_irn_reg(ir_node *irn, const arch_register_t *reg)
-{
- int pos = 0;
-
- if (get_irn_mode(irn) == mode_X) {
- return;
- }
-
- if (is_Proj(irn)) {
- pos = get_Proj_proj(irn);
- irn = skip_Proj(irn);
- }
-
- if (is_arm_irn(irn)) {
- const arch_register_t **slots;
-
- slots = get_arm_slots(irn);
- slots[pos] = reg;
- }
- else {
- /* here we set the registers for the Phi nodes */
- arm_set_firm_reg(irn, reg, cur_reg_set);
- }
-}
-
-static const arch_register_t *arm_get_irn_reg(const ir_node *irn)
-{
- int pos = 0;
- const arch_register_t *reg = NULL;
-
- if (is_Proj(irn)) {
-
- if (get_irn_mode(irn) == mode_X) {
- return NULL;
- }
-
- pos = get_Proj_proj(irn);
- irn = skip_Proj_const(irn);
- }
-
- if (is_arm_irn(irn)) {
- const arch_register_t **slots;
- slots = get_arm_slots(irn);
- reg = slots[pos];
- }
- else {
- reg = arm_get_firm_reg(irn, cur_reg_set);
- }
-
- return reg;
-}
-
static arch_irn_class_t arm_classify(const ir_node *irn)
{
irn = skip_Proj_const(irn);
if (is_cfop(irn)) {
return arch_irn_class_branch;
}
- else if (is_arm_irn(irn)) {
- return arch_irn_class_normal;
- }
return 0;
}
-static arch_irn_flags_t arm_get_flags(const ir_node *irn)
-{
- arch_irn_flags_t flags = arch_irn_flags_none;
-
- if(is_Unknown(irn)) {
- return arch_irn_flags_ignore;
- }
-
- if (is_Proj(irn) && mode_is_datab(get_irn_mode(irn))) {
- ir_node *pred = get_Proj_pred(irn);
- if (is_arm_irn(pred)) {
- flags = get_arm_out_flags(pred, get_Proj_proj(irn));
- }
- irn = pred;
- }
-
- if (is_arm_irn(irn)) {
- flags |= get_arm_flags(irn);
- }
-
- return flags;
-}
-
static ir_entity *arm_get_frame_entity(const ir_node *irn) {
/* we do NOT transform be_Spill or be_Reload nodes, so we never
have frame access using ARM nodes. */
static const arch_irn_ops_t arm_irn_ops = {
arm_get_irn_reg_req,
- arm_set_irn_reg,
- arm_get_irn_reg,
arm_classify,
- arm_get_flags,
arm_get_frame_entity,
arm_set_frame_entity,
arm_set_stack_bias,
}
-/**
- * These are some hooks which must be filled but are probably not needed.
- */
-static void arm_before_sched(void *self)
-{
- (void) self;
- /* Some stuff you need to do after scheduling but before register allocation */
-}
-
static void arm_before_ra(void *self)
{
(void) self;
*resL = new_Const_long(mode_Is, v);
} else if (is_Load(skip_Proj(arg))) {
/* FIXME: handling of low/high depends on LE/BE here */
- assert(0);
+ panic("Unimplemented convert_dbl_to_int() case");
}
else {
ir_graph *irg = current_ir_graph;
load = skip_Proj(arg);
}
- assert(0);
- return NULL;
+ panic("Unimplemented convert_sng_to_int() case");
}
/**
arm_before_abi, /* before abi introduce */
arm_prepare_graph,
NULL, /* spill */
- arm_before_sched, /* before scheduling hook */
arm_before_ra, /* before register allocation hook */
arm_after_ra,
arm_finish_irg,
int_tp = new_type_primitive(new_id_from_chars("int", 3), mode_Is);
}
- cg = xmalloc(sizeof(*cg));
+ cg = XMALLOC(arm_code_gen_t);
cg->impl = &arm_code_gen_if;
cg->irg = birg->irg;
cg->reg_set = new_set(arm_cmp_irn_reg_assoc, 1024);
- cg->arch_env = birg->main_env->arch_env;
cg->isa = isa;
cg->birg = birg;
cg->int_tp = int_tp;
if (inited)
return NULL;
- isa = xmalloc(sizeof(*isa));
+ isa = XMALLOC(arm_isa_t);
memcpy(isa, &arm_isa_template, sizeof(*isa));
arm_register_init();
static void *arm_abi_init(const be_abi_call_t *call, const arch_env_t *arch_env, ir_graph *irg)
{
- arm_abi_env_t *env = xmalloc(sizeof(env[0]));
- be_abi_call_flags_t fl = be_abi_call_get_flags(call);
+ arm_abi_env_t *env = XMALLOC(arm_abi_env_t);
+ be_abi_call_flags_t fl = be_abi_call_get_flags(call);
env->flags = fl.bits;
env->irg = irg;
env->arch_env = arch_env;
return env;
}
-/**
- * Put all registers which are saved by the prologue/epilogue in a set.
- *
- * @param self The callback object.
- * @param s The result set.
- */
-static void arm_abi_dont_save_regs(void *self, pset *s)
-{
- arm_abi_env_t *env = self;
- if (env->flags.try_omit_fp)
- pset_insert_ptr(s, env->arch_env->bp);
-}
-
/**
* Generate the routine prologue.
*
block = get_irg_start_block(irg);
ip = be_new_Copy(gp, irg, block, sp);
- arch_set_irn_register(env->arch_env, ip, &arm_gp_regs[REG_R12]);
- be_set_constr_single_reg(ip, BE_OUT_POS(0), &arm_gp_regs[REG_R12] );
+ be_set_constr_single_reg_out(ip, 0, &arm_gp_regs[REG_R12], arch_register_req_type_produces_sp);
store = new_rd_arm_StoreStackM4Inc(NULL, irg, block, sp, fp, ip, lr, pc, *mem);
sp = new_r_Proj(irg, block, store, env->arch_env->sp->reg_class->mode, pn_arm_StoreStackM4Inc_ptr);
- arch_set_irn_register(env->arch_env, sp, env->arch_env->sp);
+ arch_set_irn_register(sp, env->arch_env->sp);
*mem = new_r_Proj(irg, block, store, mode_M, pn_arm_StoreStackM4Inc_M);
keep = be_new_CopyKeep_single(gp, irg, block, ip, sp, get_irn_mode(ip));
- be_node_set_reg_class(keep, 1, gp);
- arch_set_irn_register(env->arch_env, keep, &arm_gp_regs[REG_R12]);
- be_set_constr_single_reg(keep, BE_OUT_POS(0), &arm_gp_regs[REG_R12] );
+ be_node_set_reg_class_in(keep, 1, gp);
+ be_set_constr_single_reg_out(keep, 0, &arm_gp_regs[REG_R12], arch_register_req_type_produces_sp);
fp = new_rd_arm_Sub_i(NULL, irg, block, keep, get_irn_mode(fp), 4);
- arch_set_irn_register(env->arch_env, fp, env->arch_env->bp);
- fp = be_new_Copy(gp, irg, block, fp); // XXX Gammelfix: only be_ nodes can have the ignore flag set
- arch_set_irn_register(env->arch_env, fp, env->arch_env->bp);
- be_node_set_flags(fp, BE_OUT_POS(0), arch_irn_flags_ignore);
+ arch_set_irn_register(fp, env->arch_env->bp);
+ fp = be_new_Copy(gp, irg, block, fp); // XXX Gammelfix: only be_ have custom register requirements
+ be_set_constr_single_reg_out(fp, 0, env->arch_env->bp, 0);
be_abi_reg_map_set(reg_map, env->arch_env->bp, fp);
be_abi_reg_map_set(reg_map, &arm_gp_regs[REG_R12], keep);
// TODO: Activate Omit fp in epilogue
if (env->flags.try_omit_fp) {
curr_sp = be_new_IncSP(env->arch_env->sp, env->irg, bl, curr_sp, BE_STACK_FRAME_SIZE_SHRINK, 0);
- add_irn_dep(curr_sp, *mem);
curr_lr = be_new_CopyKeep_single(&arm_reg_classes[CLASS_arm_gp], env->irg, bl, curr_lr, curr_sp, get_irn_mode(curr_lr));
- be_node_set_reg_class(curr_lr, 1, &arm_reg_classes[CLASS_arm_gp]);
- arch_set_irn_register(env->arch_env, curr_lr, &arm_gp_regs[REG_LR]);
- be_set_constr_single_reg(curr_lr, BE_OUT_POS(0), &arm_gp_regs[REG_LR] );
+ be_set_constr_single_reg_out(curr_lr, 0, &arm_gp_regs[REG_LR], 0);
curr_pc = be_new_Copy(&arm_reg_classes[CLASS_arm_gp], env->irg, bl, curr_lr );
- arch_set_irn_register(env->arch_env, curr_pc, &arm_gp_regs[REG_PC]);
- be_set_constr_single_reg(curr_pc, BE_OUT_POS(0), &arm_gp_regs[REG_PC] );
- be_node_set_flags(curr_pc, BE_OUT_POS(0), arch_irn_flags_ignore);
+ be_set_constr_single_reg_out(curr_pc, BE_OUT_POS(0), &arm_gp_regs[REG_PC], 0);
} else {
ir_node *sub12_node;
ir_node *load_node;
sub12_node = new_rd_arm_Sub_i(NULL, env->irg, bl, curr_bp, mode_Iu, 12);
// FIXME
//set_arm_req_out_all(sub12_node, sub12_req);
- arch_set_irn_register(env->arch_env, sub12_node, env->arch_env->sp);
+ arch_set_irn_register(sub12_node, env->arch_env->sp);
load_node = new_rd_arm_LoadStackM3( NULL, env->irg, bl, sub12_node, *mem );
// FIXME
//set_arm_req_out(load_node, &arm_default_req_arm_gp_r11, 0);
curr_sp = new_r_Proj(env->irg, bl, load_node, env->arch_env->sp->reg_class->mode, pn_arm_LoadStackM3_res1);
curr_pc = new_r_Proj(env->irg, bl, load_node, mode_Iu, pn_arm_LoadStackM3_res2);
*mem = new_r_Proj(env->irg, bl, load_node, mode_M, pn_arm_LoadStackM3_M);
- arch_set_irn_register(env->arch_env, curr_bp, env->arch_env->bp);
- arch_set_irn_register(env->arch_env, curr_sp, env->arch_env->sp);
- arch_set_irn_register(env->arch_env, curr_pc, &arm_gp_regs[REG_PC]);
+ arch_set_irn_register(curr_bp, env->arch_env->bp);
+ arch_set_irn_register(curr_sp, env->arch_env->sp);
+ arch_set_irn_register(curr_pc, &arm_gp_regs[REG_PC]);
}
be_abi_reg_map_set(reg_map, env->arch_env->sp, curr_sp);
be_abi_reg_map_set(reg_map, env->arch_env->bp, curr_bp);
arm_abi_init,
free,
arm_get_between_type,
- arm_abi_dont_save_regs,
arm_abi_prologue,
arm_abi_epilogue,
};
(void) self;
(void) irn;
/* TODO */
- assert(0);
- return NULL;
+ panic("Unimplemented arm_get_allowed_execution_units()");
}
static const be_machine_t *arm_get_machine(const void *self) {
(void) self;
/* TODO */
- assert(0);
- return NULL;
+ panic("Unimplemented arm_get_machine()");
}
/**
const arch_isa_if_t arm_isa_if = {
arm_init,
arm_done,
+ NULL, /* handle_intrinsics */
arm_get_n_reg_class,
arm_get_reg_class,
arm_get_reg_class_for_mode,
arm_get_allowed_execution_units,
arm_get_machine,
arm_get_irg_list,
+ NULL, /* mark remat */
arm_parse_asm_constraint,
arm_is_valid_clobber
};
projects / libfirm / blobdiff