#include "irprintf.h"
#include "ircons.h"
#include "irgmod.h"
-#include "lower_intrinsics.h"
+#include "lowering.h"
#include "bitset.h"
#include "debug.h"
arm_code_gen_t *cg = self;
arm_register_transformers();
- irg_walk_blkwise_graph(cg->irg, arm_move_consts, arm_transform_node, cg);
+ irg_walk_blkwise_graph(cg->irg, NULL, arm_move_consts, cg);
+ irg_walk_blkwise_graph(cg->irg, NULL, arm_transform_node, cg);
}
arm_code_gen_t *cg = self;
ir_graph *irg = cg->irg;
- dump_ir_block_graph_sched(irg, "-arm-finished");
arm_gen_routine(cg, irg);
cur_reg_set = NULL;
static int arm_get_n_reg_class(const void *self) {
const arm_isa_t *isa = self;
+ /* ARGH! is called BEFORE transform */
+ return 2;
return isa->cg->have_fp ? 2 : 1;
}
* Returns the necessary byte alignment for storing a register of given class.
*/
static int arm_get_reg_class_alignment(const void *self, const arch_register_class_t *cls) {
- ir_mode *mode = arch_register_class_mode(cls);
- return get_mode_size_bytes(mode);
+ /* ARM is a 32 bit CPU, no need for other alignment */
+ return 4;
}
static const be_execution_unit_t ***arm_get_allowed_execution_units(const void *self, const ir_node *irn) {
return NULL;
}
-/**
- * Called by the frontend to encode a register name into a backend specific way
- */
-static unsigned arm_register_from_name(const char *regname) {
- /* NYI */
- return 0;
-}
-
/**
* Returns the libFirm configuration parameter for this backend.
*/
};
static backend_params p = {
1, /* need dword lowering */
- 0, /* don't support inlien assembler yet */
+ 0, /* don't support inline assembler yet */
+ 0, /* no different calling conventions */
NULL, /* no additional opcodes */
NULL, /* will be set later */
NULL, /* but yet no creator function */
NULL, /* context for create_intrinsic_fkt */
NULL, /* no if conversion settings */
- arm_register_from_name, /* register names */
};
p.dep_param = &ad;