* Transforms the standard Firm graph into
* a ARM firm graph.
*/
-static void arm_prepare_graph(void *self) {
+static void arm_prepare_graph(void *self)
+{
arm_code_gen_t *cg = self;
/* transform nodes into assembler instructions */
sched_add_after(sched_point, load);
sched_remove(node);
- proj = new_rd_Proj(dbgi, block, load, mode, pn_arm_Ldr_res);
+ proj = new_rd_Proj(dbgi, load, mode, pn_arm_Ldr_res);
reg = arch_get_irn_register(node);
arch_set_irn_register(proj, reg);
* Emits the code, closes the output file and frees
* the code generator interface.
*/
-static void arm_emit_and_done(void *self) {
+static void arm_emit_and_done(void *self)
+{
arm_code_gen_t *cg = self;
ir_graph *irg = cg->irg;
conv = new_bd_arm_fpaDbl2GP(NULL, bl, arg, mem);
/* move high/low */
- *resL = new_r_Proj(bl, conv, mode_Is, pn_arm_fpaDbl2GP_low);
- *resH = new_r_Proj(bl, conv, mode_Is, pn_arm_fpaDbl2GP_high);
- mem = new_r_Proj(bl, conv, mode_M, pn_arm_fpaDbl2GP_M);
+ *resL = new_r_Proj(conv, mode_Is, pn_arm_fpaDbl2GP_low);
+ *resH = new_r_Proj(conv, mode_Is, pn_arm_fpaDbl2GP_high);
+ mem = new_r_Proj(conv, mode_M, pn_arm_fpaDbl2GP_M);
}
return mem;
}
v = (v << 8) | get_tarval_sub_bits(tv, 1);
v = (v << 8) | get_tarval_sub_bits(tv, 0);
return new_Const_long(mode_Is, v);
- } else if (is_Load(skip_Proj(arg))) {
- ir_node *load;
-
- load = skip_Proj(arg);
}
panic("Unimplemented convert_sng_to_int() case");
}
/**
* Handle graph transformations before the abi converter does its work.
*/
-static void arm_before_abi(void *self) {
+static void arm_before_abi(void *self)
+{
arm_code_gen_t *cg = self;
irg_walk_graph(cg->irg, NULL, handle_calls, cg);
/**
* Initializes the code generator.
*/
-static void *arm_cg_init(be_irg_t *birg) {
+static void *arm_cg_init(be_irg_t *birg)
+{
static ir_type *int_tp = NULL;
arm_isa_t *isa = (arm_isa_t *)birg->main_env->arch_env;
arm_code_gen_t *cg;
cg->birg = birg;
cg->int_tp = int_tp;
cg->have_fp_insn = 0;
- cg->unknown_gp = NULL;
- cg->unknown_fpa = NULL;
cg->dump = (birg->main_env->options->dump_flags & DUMP_BE) ? 1 : 0;
FIRM_DBG_REGISTER(cg->mod, "firm.be.arm.cg");
* and map all instructions the backend did not support
* to runtime calls.
*/
-static void arm_handle_intrinsics(void) {
+static void arm_handle_intrinsics(void)
+{
ir_type *tp, *int_tp, *uint_tp;
i_record records[8];
int n_records = 0;
rt_iDiv.exc_mem_proj_nr = pn_Div_M;
rt_iDiv.res_proj_nr = pn_Div_res;
- set_entity_visibility(rt_iDiv.ent, visibility_external_allocated);
+ add_entity_linkage(rt_iDiv.ent, IR_LINKAGE_CONSTANT);
+ set_entity_visibility(rt_iDiv.ent, ir_visibility_external);
map_Div->kind = INTRINSIC_INSTR;
map_Div->op = op_Div;
rt_uDiv.exc_mem_proj_nr = pn_Div_M;
rt_uDiv.res_proj_nr = pn_Div_res;
- set_entity_visibility(rt_uDiv.ent, visibility_external_allocated);
+ set_entity_visibility(rt_uDiv.ent, ir_visibility_external);
map_Div->kind = INTRINSIC_INSTR;
map_Div->op = op_Div;
rt_iMod.exc_mem_proj_nr = pn_Mod_M;
rt_iMod.res_proj_nr = pn_Mod_res;
- set_entity_visibility(rt_iMod.ent, visibility_external_allocated);
+ set_entity_visibility(rt_iMod.ent, ir_visibility_external);
map_Mod->kind = INTRINSIC_INSTR;
map_Mod->op = op_Mod;
rt_uMod.exc_mem_proj_nr = pn_Mod_M;
rt_uMod.res_proj_nr = pn_Mod_res;
- set_entity_visibility(rt_uMod.ent, visibility_external_allocated);
+ set_entity_visibility(rt_uMod.ent, ir_visibility_external);
map_Mod->kind = INTRINSIC_INSTR;
map_Mod->op = op_Mod;
/**
* Initializes the backend ISA and opens the output file.
*/
-static arch_env_t *arm_init(FILE *file_handle) {
+static arch_env_t *arm_init(FILE *file_handle)
+{
static int inited = 0;
arm_isa_t *isa;
/* needed for the debug support */
be_gas_emit_switch_section(GAS_SECTION_TEXT);
- be_emit_cstring(".Ltext0:\n");
+ be_emit_irprintf("%stext0:\n", be_gas_get_private_prefix());
be_emit_write_line();
- /* we mark referenced global entities, so we can only emit those which
- * are actually referenced. (Note: you mustn't use the type visited flag
- * elsewhere in the backend)
- */
- inc_master_type_visited();
-
inited = 1;
return &isa->arch_env;
}
/**
* Closes the output file and frees the ISA structure.
*/
-static void arm_done(void *self) {
+static void arm_done(void *self)
+{
arm_isa_t *isa = self;
- be_gas_emit_decls(isa->arch_env.main_env, 1);
+ be_gas_emit_decls(isa->arch_env.main_env);
be_emit_exit();
free(self);
* here to speed up register allocation (and makes dumps
* smaller and more readable).
*/
-static unsigned arm_get_n_reg_class(void) {
+static unsigned arm_get_n_reg_class(void)
+{
return N_CLASSES;
}
/**
* Return the register class with requested index.
*/
-static const arch_register_class_t *arm_get_reg_class(unsigned i) {
+static const arch_register_class_t *arm_get_reg_class(unsigned i)
+{
assert(i < N_CLASSES);
return &arm_reg_classes[i];
}
* @param mode The mode in question.
* @return A register class which can hold values of the given mode.
*/
-const arch_register_class_t *arm_get_reg_class_for_mode(const ir_mode *mode) {
+static const arch_register_class_t *arm_get_reg_class_for_mode(const ir_mode *mode)
+{
if (mode_is_float(mode))
return &arm_reg_classes[CLASS_arm_fpa];
else
*
* All nodes which define registers in @p reg_map must keep @p reg_map current.
*/
-static const arch_register_t *arm_abi_prologue(void *self, ir_node **mem, pmap *reg_map, int *stack_bias) {
+static const arch_register_t *arm_abi_prologue(void *self, ir_node **mem, pmap *reg_map, int *stack_bias)
+{
arm_abi_env_t *env = self;
ir_node *store;
ir_graph *irg;
/* spill stuff */
store = new_bd_arm_StoreStackM4Inc(NULL, block, sp, fp, ip, lr, pc, *mem);
- sp = new_r_Proj(block, store, env->arch_env->sp->reg_class->mode, pn_arm_StoreStackM4Inc_ptr);
+ sp = new_r_Proj(store, env->arch_env->sp->reg_class->mode, pn_arm_StoreStackM4Inc_ptr);
arch_set_irn_register(sp, env->arch_env->sp);
- *mem = new_r_Proj(block, store, mode_M, pn_arm_StoreStackM4Inc_M);
+ *mem = new_r_Proj(store, mode_M, pn_arm_StoreStackM4Inc_M);
/* frame pointer is ip-4 (because ip is our old sp value) */
fp = new_bd_arm_Sub_imm(NULL, block, ip, 4, 0);
load_node = new_bd_arm_LoadStackM3Epilogue(NULL, bl, curr_bp, *mem);
- curr_bp = new_r_Proj(bl, load_node, env->arch_env->bp->reg_class->mode, pn_arm_LoadStackM3Epilogue_res0);
- curr_sp = new_r_Proj(bl, load_node, env->arch_env->sp->reg_class->mode, pn_arm_LoadStackM3Epilogue_res1);
- curr_pc = new_r_Proj(bl, load_node, mode_Iu, pn_arm_LoadStackM3Epilogue_res2);
- *mem = new_r_Proj(bl, load_node, mode_M, pn_arm_LoadStackM3Epilogue_M);
+ curr_bp = new_r_Proj(load_node, env->arch_env->bp->reg_class->mode, pn_arm_LoadStackM3Epilogue_res0);
+ curr_sp = new_r_Proj(load_node, env->arch_env->sp->reg_class->mode, pn_arm_LoadStackM3Epilogue_res1);
+ curr_pc = new_r_Proj(load_node, mode_Iu, pn_arm_LoadStackM3Epilogue_res2);
+ *mem = new_r_Proj(load_node, mode_M, pn_arm_LoadStackM3Epilogue_M);
arch_set_irn_register(curr_bp, env->arch_env->bp);
arch_set_irn_register(curr_sp, env->arch_env->sp);
arch_set_irn_register(curr_pc, &arm_gp_regs[REG_PC]);
* @param method_type The type of the method (procedure) in question.
* @param abi The abi object to be modified
*/
-void arm_get_call_abi(const void *self, ir_type *method_type, be_abi_call_t *abi)
+static void arm_get_call_abi(const void *self, ir_type *method_type, be_abi_call_t *abi)
{
ir_type *tp;
ir_mode *mode;
/* reg = get reg for param i; */
/* be_abi_call_param_reg(abi, i, reg); */
if (i < 4) {
- be_abi_call_param_reg(abi, i, arm_get_RegParam_reg(i));
+ be_abi_call_param_reg(abi, i, arm_get_RegParam_reg(i), ABI_CONTEXT_BOTH);
} else {
tp = get_method_param_type(method_type, i);
mode = get_type_mode(tp);
- be_abi_call_param_stack(abi, i, mode, 4, 0, 0);
+ be_abi_call_param_stack(abi, i, mode, 4, 0, 0, ABI_CONTEXT_BOTH);
}
}
assert(!mode_is_float(mode) && "mixed INT, FP results not supported");
- be_abi_call_res_reg(abi, 0, &arm_gp_regs[REG_R0]);
- be_abi_call_res_reg(abi, 1, &arm_gp_regs[REG_R1]);
+ be_abi_call_res_reg(abi, 0, &arm_gp_regs[REG_R0], ABI_CONTEXT_BOTH);
+ be_abi_call_res_reg(abi, 1, &arm_gp_regs[REG_R1], ABI_CONTEXT_BOTH);
} else if (n == 1) {
const arch_register_t *reg;
mode = get_type_mode(tp);
reg = mode_is_float(mode) ? &arm_fpa_regs[REG_F0] : &arm_gp_regs[REG_R0];
- be_abi_call_res_reg(abi, 0, reg);
+ be_abi_call_res_reg(abi, 0, reg, ABI_CONTEXT_BOTH);
}
}
-int arm_to_appear_in_schedule(void *block_env, const ir_node *irn)
+static int arm_to_appear_in_schedule(void *block_env, const ir_node *irn)
{
(void) block_env;
- if(!is_arm_irn(irn))
+ if (!is_arm_irn(irn))
return -1;
return 1;
}
-static const ilp_sched_selector_t *arm_get_ilp_sched_selector(const void *self) {
+static const ilp_sched_selector_t *arm_get_ilp_sched_selector(const void *self)
+{
(void) self;
return NULL;
}
return 4;
}
-static const be_execution_unit_t ***arm_get_allowed_execution_units(const ir_node *irn) {
+static const be_execution_unit_t ***arm_get_allowed_execution_units(const ir_node *irn)
+{
(void) irn;
/* TODO */
panic("Unimplemented arm_get_allowed_execution_units()");
}
-static const be_machine_t *arm_get_machine(const void *self) {
+static const be_machine_t *arm_get_machine(const void *self)
+{
(void) self;
/* TODO */
panic("Unimplemented arm_get_machine()");
/**
* Return irp irgs in the desired order.
*/
-static ir_graph **arm_get_irg_list(const void *self, ir_graph ***irg_list) {
+static ir_graph **arm_get_irg_list(const void *self, ir_graph ***irg_list)
+{
(void) self;
(void) irg_list;
return NULL;
* Allows or disallows the creation of Psi nodes for the given Phi nodes.
* @return 1 if allowed, 0 otherwise
*/
-static int arm_is_psi_allowed(ir_node *sel, ir_node *phi_list, int i, int j) {
- ir_node *cmp, *cmp_a, *phi;
- ir_mode *mode;
-
+static int arm_is_mux_allowed(ir_node *sel, ir_node *mux_false,
+ ir_node *mux_true)
+{
+ (void) sel;
+ (void) mux_false;
+ (void) mux_true;
- /* currently Psi support is not implemented */
return 0;
-
-/* we don't want long long Psi */
-#define IS_BAD_PSI_MODE(mode) (!mode_is_float(mode) && get_mode_size_bits(mode) > 32)
-
- if (get_irn_mode(sel) != mode_b)
- return 0;
-
- cmp = get_Proj_pred(sel);
- cmp_a = get_Cmp_left(cmp);
- mode = get_irn_mode(cmp_a);
-
- if (IS_BAD_PSI_MODE(mode))
- return 0;
-
- /* check the Phi nodes */
- for (phi = phi_list; phi; phi = get_irn_link(phi)) {
- ir_node *pred_i = get_irn_n(phi, i);
- ir_node *pred_j = get_irn_n(phi, j);
- ir_mode *mode_i = get_irn_mode(pred_i);
- ir_mode *mode_j = get_irn_mode(pred_j);
-
- if (IS_BAD_PSI_MODE(mode_i) || IS_BAD_PSI_MODE(mode_j))
- return 0;
- }
-
-#undef IS_BAD_PSI_MODE
-
- return 1;
}
static asm_constraint_flags_t arm_parse_asm_constraint(const char **c)
/**
* Returns the libFirm configuration parameter for this backend.
*/
-static const backend_params *arm_get_libfirm_params(void) {
+static const backend_params *arm_get_libfirm_params(void)
+{
static const ir_settings_if_conv_t ifconv = {
4, /* maxdepth, doesn't matter for Psi-conversion */
- arm_is_psi_allowed /* allows or disallows Psi creation for given selector */
+ arm_is_mux_allowed /* allows or disallows Mux creation for given selector */
};
static ir_settings_arch_dep_t ad = {
1, /* allow subs */
arm_is_valid_clobber
};
+BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch_arm);
void be_init_arch_arm(void)
{
lc_opt_entry_t *be_grp = lc_opt_get_grp(firm_opt_get_root(), "be");
arm_init_transform();
arm_init_emitter();
}
-
-BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch_arm);
projects / libfirm / blobdiff