#include "../besched_t.h"
#include "../be.h"
#include "../beabi.h"
+#include "../bemachine.h"
+#include "../beilpsched.h"
#include "bearch_arm_t.h"
return NULL;
}
-static void arm_set_frame_entity(const void *self, const ir_node *irn, entity *ent) {
+static void arm_set_frame_entity(const void *self, ir_node *irn, entity *ent) {
/* TODO: set the entity assigned to the frame */
}
/* TODO: correct offset if irn accesses the stack */
}
+static int arm_get_sp_bias(const void *self, const ir_node *irn) {
+ return 0;
+}
+
/* fill register allocator interface */
static const arch_irn_ops_if_t arm_irn_ops_if = {
arm_get_frame_entity,
arm_set_frame_entity,
arm_set_stack_bias,
+ arm_get_sp_bias,
NULL, /* get_inverse */
NULL, /* get_op_estimated_cost */
NULL, /* possible_memory_operand */
arm_cg_init,
arm_before_abi, /* before abi introduce */
arm_prepare_graph,
+ NULL, /* spill */
arm_before_sched, /* before scheduling hook */
arm_before_ra, /* before register allocation hook */
NULL, /* after register allocation */
// TODO: Activate Omit fp in epilogue
if(env->flags.try_omit_fp) {
- curr_sp = be_new_IncSP(env->isa->sp, env->irg, bl, curr_sp, *mem, BE_STACK_FRAME_SIZE, be_stack_dir_shrink);
+ curr_sp = be_new_IncSP(env->isa->sp, env->irg, bl, curr_sp, BE_STACK_FRAME_SIZE_SHRINK);
+ add_irn_dep(curr_sp, *mem);
curr_lr = be_new_CopyKeep_single(&arm_reg_classes[CLASS_arm_gp], env->irg, bl, curr_lr, curr_sp, get_irn_mode(curr_lr));
be_node_set_reg_class(curr_lr, 1, &arm_reg_classes[CLASS_arm_gp]);
/**
* Returns the reg_pressure scheduler with to_appear_in_schedule() over\loaded
*/
-static const list_sched_selector_t *arm_get_list_sched_selector(const void *self) {
+static const list_sched_selector_t *arm_get_list_sched_selector(const void *self, list_sched_selector_t *selector) {
memcpy(&arm_sched_selector, reg_pressure_selector, sizeof(list_sched_selector_t));
arm_sched_selector.to_appear_in_schedule = arm_to_appear_in_schedule;
return &arm_sched_selector;
}
+static const ilp_sched_selector_t *arm_get_ilp_sched_selector(const void *self) {
+ return NULL;
+}
+
/**
* Returns the necessary byte alignment for storing a register of given class.
*/
return get_mode_size_bytes(mode);
}
+static const be_execution_unit_t ***arm_get_allowed_execution_units(const void *self, const ir_node *irn) {
+ /* TODO */
+ assert(0);
+ return NULL;
+}
+
+static const be_machine_t *arm_get_machine(const void *self) {
+ /* TODO */
+ assert(0);
+ return NULL;
+}
+
/**
* Returns the libFirm configuration parameter for this backend.
*/
arm_get_irn_handler,
arm_get_code_generator_if,
arm_get_list_sched_selector,
+ arm_get_ilp_sched_selector,
arm_get_reg_class_alignment,
arm_get_libfirm_params,
+ arm_get_allowed_execution_units,
+ arm_get_machine,
#ifdef WITH_LIBCORE
arm_register_options
#endif