/*
- * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
+ * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
*
* This file is part of libFirm.
*
#include "config.h"
#endif
-#include <libcore/lc_opts.h>
-#include <libcore/lc_opts_enum.h>
+#include "lc_opts.h"
+#include "lc_opts_enum.h"
#include "pseudo_irg.h"
#include "irgwalk.h"
#include "ircons.h"
#include "irgmod.h"
#include "irgopt.h"
+#include "iroptimize.h"
#include "lowering.h"
#include "bitset.h"
static arch_irn_flags_t arm_get_flags(const void *self, const ir_node *irn)
{
+ arch_irn_flags_t flags = arch_irn_flags_none;
(void) self;
- irn = skip_Proj_const(irn);
- if (is_arm_irn(irn)) {
- return get_arm_flags(irn);
- }
- else if (is_Unknown(irn)) {
+ if(is_Unknown(irn)) {
return arch_irn_flags_ignore;
}
- return 0;
+ if (is_Proj(irn) && mode_is_datab(get_irn_mode(irn))) {
+ ir_node *pred = get_Proj_pred(irn);
+ if (is_arm_irn(pred)) {
+ flags = get_arm_out_flags(pred, get_Proj_proj(irn));
+ }
+ irn = pred;
+ }
+
+ if (is_arm_irn(irn)) {
+ flags |= get_arm_flags(irn);
+ }
+
+ return flags;
}
static ir_entity *arm_get_frame_entity(const void *self, const ir_node *irn)
0, /* use generic register names instead of SP, LR, PC */
ARM_FPU_ARCH_FPE, /* FPU architecture */
NULL, /* current code generator */
- NULL_EMITTER, /* emitter environment */
};
/**
arm_register_init();
isa->cg = NULL;
- be_emit_init_env(&isa->emit, file_handle);
+ be_emit_init(file_handle);
arm_create_opcodes();
arm_handle_intrinsics();
static void arm_done(void *self) {
arm_isa_t *isa = self;
- be_gas_emit_decls(&isa->emit, isa->arch_isa.main_env, 1);
+ be_gas_emit_decls(isa->arch_isa.main_env, 1);
- be_emit_destroy_env(&isa->emit);
+ be_emit_exit();
free(self);
}
* here to speed up register allocation (and makes dumps
* smaller and more readable).
*/
-static int arm_get_n_reg_class(const void *self) {
- const arm_isa_t *isa = self;
-
- /* ARGH! is called BEFORE transform */
+static unsigned arm_get_n_reg_class(const void *self) {
+ (void) self;
return N_CLASSES;
- return isa->cg->have_fp_insn ? 2 : 1;
}
/**
* Return the register class with requested index.
*/
-static const arch_register_class_t *arm_get_reg_class(const void *self, int i) {
+static const arch_register_class_t *arm_get_reg_class(const void *self,
+ unsigned i) {
(void) self;
+ assert(i < N_CLASSES);
return &arm_reg_classes[i];
}
arch_set_irn_register(env->arch_env, keep, &arm_gp_regs[REG_R12]);
be_set_constr_single_reg(keep, BE_OUT_POS(0), &arm_gp_regs[REG_R12] );
- fp = new_rd_arm_Sub_i(NULL, irg, block, keep, get_irn_mode(fp),
- new_tarval_from_long(4, get_irn_mode(fp)));
+ fp = new_rd_arm_Sub_i(NULL, irg, block, keep, get_irn_mode(fp), 4);
arch_set_irn_register(env->arch_env, fp, env->isa->bp);
be_abi_reg_map_set(reg_map, env->isa->bp, fp);
} else {
ir_node *sub12_node;
ir_node *load_node;
- tarval *tv = new_tarval_from_long(12,mode_Iu);
- sub12_node = new_rd_arm_Sub_i(NULL, env->irg, bl, curr_bp, mode_Iu, tv);
+ sub12_node = new_rd_arm_Sub_i(NULL, env->irg, bl, curr_bp, mode_Iu, 12);
// FIXME
//set_arm_req_out_all(sub12_node, sub12_req);
arch_set_irn_register(env->arch_env, sub12_node, env->isa->sp);
ir_mode *mode;
int i;
int n = get_method_n_params(method_type);
- be_abi_call_flags_t flags = {
- {
- 0, /* store from left to right */
- 0, /* store arguments sequential */
- 1, /* try to omit the frame pointer */
- 1, /* the function can use any register as frame pointer */
- 1, /* a call can take the callee's address as an immediate */
- 0, /* IRG is a leaf function */
- 0 /* Set to one, if there is already enough room on the stack for call args. */
- }
- };
+ be_abi_call_flags_t call_flags = be_abi_call_get_flags(abi);
(void) self;
+ /* set abi flags for calls */
+ call_flags.bits.left_to_right = 0;
+ call_flags.bits.store_args_sequential = 0;
+ /* call_flags.bits.try_omit_fp don't change this we can handle both */
+ call_flags.bits.fp_free = 0;
+ call_flags.bits.call_has_imm = 1; /* IA32 calls can have immediate address */
+
/* set stack parameter passing style */
- be_abi_call_set_flags(abi, flags, &arm_abi_callbacks);
+ be_abi_call_set_flags(abi, call_flags, &arm_abi_callbacks);
for (i = 0; i < n; i++) {
/* reg = get reg for param i; */
/* be_abi_call_param_reg(abi, i, reg); */
- if (i < 4)
-
+ if (i < 4) {
be_abi_call_param_reg(abi, i, arm_get_RegParam_reg(i));
- else
- be_abi_call_param_stack(abi, i, 4, 0, 0);
+ } else {
+ tp = get_method_param_type(method_type, i);
+ mode = get_type_mode(tp);
+ be_abi_call_param_stack(abi, i, mode, 4, 0, 0);
+ }
}
/* set return registers */
*/
static const list_sched_selector_t *arm_get_list_sched_selector(const void *self, list_sched_selector_t *selector) {
(void) self;
- (void) selector;
- arm_sched_selector = reg_pressure_selector;
+ memcpy(&arm_sched_selector, selector, sizeof(arm_sched_selector));
+ /* arm_sched_selector.exectime = arm_sched_exectime; */
arm_sched_selector.to_appear_in_schedule = arm_to_appear_in_schedule;
return &arm_sched_selector;
+
}
static const ilp_sched_selector_t *arm_get_ilp_sched_selector(const void *self) {
be_register_isa_if("arm", &arm_isa_if);
arm_init_transform();
+ arm_init_emitter();
}
BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch_arm);
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