ir_node *op1 = get_binop_left(node);
ir_node *op2 = get_binop_right(node);
dbg_info *dbgi = get_irn_dbg_info(node);
+ ir_mode *mode = get_irn_mode(node);
ir_node *new_op1;
ir_node *new_op2;
+ if (get_mode_modulo_shift(mode) != 32)
+ panic("modulo shift!=32 not supported by arm backend");
+
if (flags & MATCH_SIZE_NEUTRAL) {
op1 = arm_skip_downconv(op1);
op2 = arm_skip_downconv(op2);
ir_node *src_copy;
ir_node *dst_copy;
- src_copy = be_new_Copy(&arm_reg_classes[CLASS_arm_gp], block, new_src);
- dst_copy = be_new_Copy(&arm_reg_classes[CLASS_arm_gp], block, new_dst);
+ src_copy = be_new_Copy(block, new_src);
+ dst_copy = be_new_Copy(block, new_dst);
return new_bd_arm_CopyB(dbg, block, dst_copy, src_copy,
new_bd_arm_EmptyReg(dbg, block),
*/
static int find_out_for_reg(ir_node *node, const arch_register_t *reg)
{
- int n_outs = arch_irn_get_n_outs(node);
+ int n_outs = arch_get_irn_n_outs(node);
int o;
for (o = 0; o < n_outs; ++o) {
- const arch_register_req_t *req = arch_get_out_register_req(node, o);
+ const arch_register_req_t *req = arch_get_irn_register_req_out(node, o);
if (req == reg->single_req)
return o;
}
pmap_insert(node_to_stack, node, incsp);
}
- arch_set_in_register_reqs(res, in_req);
+ arch_set_irn_register_reqs_in(res, in_req);
/* create output register reqs */
- arch_set_out_register_req(res, 0, arch_no_register_req);
+ arch_set_irn_register_req_out(res, 0, arch_no_register_req);
for (o = 0; o < n_caller_saves; ++o) {
const arch_register_t *reg = caller_saves[o];
- arch_set_out_register_req(res, o+1, reg->single_req);
+ arch_set_irn_register_req_out(res, o+1, reg->single_req);
}
/* copy pinned attribute */
copy_node_attr(irg, node, phi);
be_duplicate_deps(node, phi);
- arch_set_out_register_req(phi, 0, req);
+ arch_set_irn_register_req_out(phi, 0, req);
be_enqueue_preds(node);