replace psets with arrays to make the compiler more predictable across runs (and...

[libfirm] / ir / be / arm / arm_spec.pl

diff --git a/ir/be/arm/arm_spec.pl b/ir/be/arm/arm_spec.pl
index 8b8a8ca..9c1c25f 100644 (file)
--- a/ir/be/arm/arm_spec.pl
+++ b/ir/be/arm/arm_spec.pl
@@ -304,6 +304,13 @@ Mvn => {
        constructors => \%unop_shifter_operand_constructors,
 },
 
+Clz => {
+       irn_flags => [ "rematerializable" ],
+       reg_req   => { in => [ "gp" ], out => [ "gp" ] },
+       emit      =>'. clz %D0, %S0',
+       mode      => $mode_gp,
+},
+
 # mov lr, pc\n mov pc, XXX -- This combination is used for calls to function
 # pointers
 LinkMovPC => {
@@ -316,7 +323,6 @@ LinkMovPC => {
                        "\tarch_irn_add_flags(res, arch_irn_flags_modify_flags);",
        emit         => ". mov lr, pc\n".
                        ". mov pc, %SO",
-       mode         => "mode_T",
 },
 
 # mov lr, pc\n ldr pc, XXX -- This combination is used for calls to function
@@ -330,7 +336,6 @@ LinkLdrPC => {
        custominit   => "arch_irn_add_flags(res, arch_irn_flags_modify_flags);",
        emit         => ". mov lr, pc\n".
                        ". ldr pc, %SO",
-       mode         => "mode_T",
 },
 
 Bl => {
@@ -341,7 +346,6 @@ Bl => {
        attr       => "ir_entity *entity, int symconst_offset",
        custominit => "arch_irn_add_flags(res, arch_irn_flags_modify_flags);",
        emit       => '. bl %SC',
-       mode       => "mode_T",
 },
 
 # this node produces ALWAYS an empty (tempary) gp reg and cannot be CSE'd
@@ -442,7 +446,7 @@ Str => {
        op_flags  => [ "labeled", "fragile" ],
        state     => "exc_pinned",
        ins       => [ "ptr", "val", "mem" ],
-       outs      => [ "mem" ],
+       outs      => [ "M" ],
        reg_req   => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
        emit      => '. str%SM %S1, [%S0, #%O]',
        mode      => "mode_M",