-# Creation: 2006/02/13
-# $Id$
-
-# the cpu architecture (ia32, ia64, mips, sparc, ppc, ...)
+# Arm Architecure Specification
+# Author: Matthias Braun, Michael Beck, Oliver Richter, Tobias Gneist
$arch = "arm";
#
# Modes
#
-$mode_gp = "mode_Iu";
-$mode_flags = "mode_Bu";
-$mode_fpa = "mode_E";
-
-# register types:
-$normal = 0; # no special type
-$caller_save = 1; # caller save (register must be saved by the caller of a function)
-$callee_save = 2; # callee save (register must be saved by the called function)
-$ignore = 4; # ignore (do not assign this register)
-$arbitrary = 8; # emitter can choose an arbitrary register of this class
-$virtual = 16; # the register is a virtual one
-$state = 32; # register represents a state
+$mode_gp = "mode_Iu";
+$mode_flags = "mode_Bu";
+$mode_fp = "mode_F";
+
# NOTE: Last entry of each class is the largest Firm-Mode a register can hold
%reg_classes = (
gp => [
- { name => "r0", type => $caller_save },
- { name => "r1", type => $caller_save },
- { name => "r2", type => $caller_save },
- { name => "r3", type => $caller_save },
- { name => "r4", type => $callee_save },
- { name => "r5", type => $callee_save },
- { name => "r6", type => $callee_save },
- { name => "r7", type => $callee_save },
- { name => "r8", type => $callee_save },
- { name => "r9", type => $callee_save },
- { name => "r10", type => $callee_save },
- { name => "r11", type => $callee_save },
- { name => "r12", type => $ignore }, # reserved for linker/immediate fixups
- { name => "sp", type => $ignore }, # this is our stack pointer
- { name => "lr", type => $callee_save | $caller_save }, # this is our return address
- { name => "pc", type => $ignore }, # this is our program counter
+ { name => "r0", dwarf => 0 },
+ { name => "r1", dwarf => 1 },
+ { name => "r2", dwarf => 2 },
+ { name => "r3", dwarf => 3 },
+ { name => "r4", dwarf => 4 },
+ { name => "r5", dwarf => 5 },
+ { name => "r6", dwarf => 6 },
+ { name => "r7", dwarf => 7 },
+ { name => "r8", dwarf => 8 },
+ { name => "r9", dwarf => 9 },
+ { name => "r10", dwarf => 10 },
+ { name => "r11", dwarf => 11 },
+ { name => "r12", dwarf => 12 },
+ { name => "sp", dwarf => 13 },
+ { name => "lr", dwarf => 14 },
+ { name => "pc", dwarf => 15 },
{ mode => $mode_gp }
],
- fpa => [
- { name => "f0", type => $caller_save },
- { name => "f1", type => $caller_save },
- { name => "f2", type => $caller_save },
- { name => "f3", type => $caller_save },
- { name => "f4", type => $caller_save },
- { name => "f5", type => $caller_save },
- { name => "f6", type => $caller_save },
- { name => "f7", type => $caller_save },
- { mode => $mode_fpa }
+ fpa => [
+ { name => "f0", dwarf => 96 },
+ { name => "f1", dwarf => 97 },
+ { name => "f2", dwarf => 98 },
+ { name => "f3", dwarf => 99 },
+ { name => "f4", dwarf => 100 },
+ { name => "f5", dwarf => 101 },
+ { name => "f6", dwarf => 102 },
+ { name => "f7", dwarf => 103 },
+ { mode => $mode_fp }
],
flags => [
- { name => "fl", type => 0 },
+ { name => "fl" },
{ mode => $mode_flags, flags => "manual_ra" }
],
);
-%emit_templates = (
- M => "${arch}_emit_mode(node);",
- LM => "${arch}_emit_load_mode(node);",
- SM => "${arch}_emit_store_mode(node);",
- SO => "${arch}_emit_shifter_operand(node);",
- S0 => "${arch}_emit_source_register(node, 0);",
- SC => "${arch}_emit_symconst(node);",
- S1 => "${arch}_emit_source_register(node, 1);",
- S2 => "${arch}_emit_source_register(node, 2);",
- S3 => "${arch}_emit_source_register(node, 3);",
- S4 => "${arch}_emit_source_register(node, 4);",
- D0 => "${arch}_emit_dest_register(node, 0);",
- D1 => "${arch}_emit_dest_register(node, 1);",
- D2 => "${arch}_emit_dest_register(node, 2);",
- O => "${arch}_emit_offset(node);",
-);
-
$default_attr_type = "arm_attr_t";
$default_copy_attr = "arm_copy_attr";
%init_attr = (
- arm_attr_t => "\tinit_arm_attributes(res, flags, in_reqs, exec_units, n_res);",
+ arm_attr_t => "\tinit_arm_attributes(res, irn_flags_, in_reqs, n_res);",
arm_SymConst_attr_t =>
- "\tinit_arm_attributes(res, flags, in_reqs, exec_units, n_res);\n".
+ "\tinit_arm_attributes(res, irn_flags_, in_reqs, n_res);\n".
"\tinit_arm_SymConst_attributes(res, entity, symconst_offset);",
- arm_CondJmp_attr_t => "\tinit_arm_attributes(res, flags, in_reqs, exec_units, n_res);",
- arm_SwitchJmp_attr_t => "\tinit_arm_attributes(res, flags, in_reqs, exec_units, n_res);",
- arm_fpaConst_attr_t => "\tinit_arm_attributes(res, flags, in_reqs, exec_units, n_res);",
+ arm_CondJmp_attr_t => "\tinit_arm_attributes(res, irn_flags_, in_reqs, n_res);",
+ arm_SwitchJmp_attr_t => "\tinit_arm_attributes(res, irn_flags_, in_reqs, n_res);",
+ arm_fConst_attr_t => "\tinit_arm_attributes(res, irn_flags_, in_reqs, n_res);",
arm_load_store_attr_t =>
- "\tinit_arm_attributes(res, flags, in_reqs, exec_units, n_res);\n".
+ "\tinit_arm_attributes(res, irn_flags_, in_reqs, n_res);\n".
"\tinit_arm_load_store_attributes(res, ls_mode, entity, entity_sign, offset, is_frame_entity);",
arm_shifter_operand_t =>
- "\tinit_arm_attributes(res, flags, in_reqs, exec_units, n_res);\n",
+ "\tinit_arm_attributes(res, irn_flags_, in_reqs, n_res);\n",
arm_cmp_attr_t =>
- "\tinit_arm_attributes(res, flags, in_reqs, exec_units, n_res);\n",
+ "\tinit_arm_attributes(res, irn_flags_, in_reqs, n_res);\n",
+ arm_farith_attr_t =>
+ "\tinit_arm_attributes(res, irn_flags_, in_reqs, n_res);\n".
+ "\tinit_arm_farith_attributes(res, op_mode);",
arm_CopyB_attr_t =>
- "\tinit_arm_attributes(res, flags, in_reqs, exec_units, n_res);\n".
+ "\tinit_arm_attributes(res, irn_flags_, in_reqs, n_res);\n".
"\tinit_arm_CopyB_attributes(res, size);",
);
arm_SymConst_attr_t => "cmp_attr_arm_SymConst",
arm_CondJmp_attr_t => "cmp_attr_arm_CondJmp",
arm_SwitchJmp_attr_t => "cmp_attr_arm_SwitchJmp",
- arm_fpaConst_attr_t => "cmp_attr_arm_fpaConst",
+ arm_fConst_attr_t => "cmp_attr_arm_fConst",
arm_load_store_attr_t => "cmp_attr_arm_load_store",
arm_shifter_operand_t => "cmp_attr_arm_shifter_operand",
arm_CopyB_attr_t => "cmp_attr_arm_CopyB",
arm_cmp_attr_t => "cmp_attr_arm_cmp",
+ arm_farith_attr_t => "cmp_attr_arm_farith",
);
my %unop_shifter_operand_constructors = (
%nodes = (
Add => {
- irn_flags => "R",
- emit => '. add %D0, %S0, %SO',
+ irn_flags => [ "rematerializable" ],
+ emit => 'add %D0, %S0, %O',
mode => $mode_gp,
attr_type => "arm_shifter_operand_t",
constructors => \%binop_shifter_operand_constructors,
},
Mul => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp", "gp" ], out => [ "!in_r1" ] },
- emit =>'. mul %D0, %S0, %S1',
+ emit => 'mul %D0, %S0, %S1',
mode => $mode_gp,
},
Smull => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp", "gp" ], out => [ "gp", "gp" ] },
- emit =>'. smull %D0, %D1, %S0, %S1',
+ emit => 'smull %D0, %D1, %S0, %S1',
outs => [ "low", "high" ],
},
Umull => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp", "gp" ], out => [ "gp", "gp" ] },
- emit =>'. umull %D0, %D1, %S0, %S1',
+ emit =>'umull %D0, %D1, %S0, %S1',
outs => [ "low", "high" ],
mode => $mode_gp,
},
Mla => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp", "gp", "gp" ], out => [ "!in_r1" ] },
- emit =>'. mla %D0, %S0, %S1, %S2',
+ emit =>'mla %D0, %S0, %S1, %S2',
mode => $mode_gp,
},
And => {
- irn_flags => "R",
- emit => '. and %D0, %S0, %SO',
+ irn_flags => [ "rematerializable" ],
+ emit => 'and %D0, %S0, %O',
mode => $mode_gp,
attr_type => "arm_shifter_operand_t",
constructors => \%binop_shifter_operand_constructors,
},
Or => {
- irn_flags => "R",
- emit => '. orr %D0, %S0, %SO',
+ irn_flags => [ "rematerializable" ],
+ emit => 'orr %D0, %S0, %O',
mode => $mode_gp,
attr_type => "arm_shifter_operand_t",
constructors => \%binop_shifter_operand_constructors,
},
Eor => {
- irn_flags => "R",
- emit => '. eor %D0, %S0, %SO',
+ irn_flags => [ "rematerializable" ],
+ emit => 'eor %D0, %S0, %O',
mode => $mode_gp,
attr_type => "arm_shifter_operand_t",
constructors => \%binop_shifter_operand_constructors,
},
Bic => {
- irn_flags => "R",
- emit => '. bic %D0, %S0, %SO',
+ irn_flags => [ "rematerializable" ],
+ emit => 'bic %D0, %S0, %O',
mode => $mode_gp,
attr_type => "arm_shifter_operand_t",
constructors => \%binop_shifter_operand_constructors,
},
Sub => {
- irn_flags => "R",
- emit => '. sub %D0, %S0, %SO',
+ irn_flags => [ "rematerializable" ],
+ emit => 'sub %D0, %S0, %O',
mode => $mode_gp,
attr_type => "arm_shifter_operand_t",
constructors => \%binop_shifter_operand_constructors,
},
Rsb => {
- irn_flags => "R",
- emit => '. rsb %D0, %S0, %SO',
+ irn_flags => [ "rematerializable" ],
+ emit => 'rsb %D0, %S0, %O',
mode => $mode_gp,
attr_type => "arm_shifter_operand_t",
constructors => \%binop_shifter_operand_constructors,
},
Mov => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
arity => "variable",
- emit => '. mov %D0, %SO',
+ emit => 'mov %D0, %O',
mode => $mode_gp,
attr_type => "arm_shifter_operand_t",
constructors => \%unop_shifter_operand_constructors,
},
Mvn => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
attr_type => "arm_shifter_operand_t",
arity => "variable",
- emit => '. mvn %D0, %SO',
+ emit => 'mvn %D0, %O',
mode => $mode_gp,
constructors => \%unop_shifter_operand_constructors,
},
-# Deprecated - we should construct the movs and rsbmi directly...
-Abs => {
- irn_flags => "R",
+Clz => {
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp" ], out => [ "gp" ] },
- emit =>
-'. movs %S0, %S0, #0
-. rsbmi %D0, %S0, #0',
+ emit => 'clz %D0, %S0',
mode => $mode_gp,
},
attr_type => "arm_shifter_operand_t",
attr => "arm_shift_modifier_t shift_modifier, unsigned char immediate_value, unsigned char immediate_rot",
custominit => "init_arm_shifter_operand(res, immediate_value, shift_modifier, immediate_rot);\n".
- "\tarch_irn_add_flags(res, arch_irn_flags_modify_flags);",
- emit => ". mov lr, pc\n".
- ". mov pc, %SO",
- mode => "mode_T",
+ "\tarch_add_irn_flags(res, arch_irn_flags_modify_flags);",
+ emit => "mov lr, pc\n".
+ "mov pc, %O",
},
# mov lr, pc\n ldr pc, XXX -- This combination is used for calls to function
out_arity => "variable",
attr_type => "arm_load_store_attr_t",
attr => "ir_mode *ls_mode, ir_entity *entity, int entity_sign, long offset, bool is_frame_entity",
- custominit => "arch_irn_add_flags(res, arch_irn_flags_modify_flags);",
- emit => ". mov lr, pc\n".
- ". ldr pc, %SO",
- mode => "mode_T",
+ custominit => "arch_add_irn_flags(res, arch_irn_flags_modify_flags);",
+ emit => "mov lr, pc\n".
+ "ldr pc, %O",
},
Bl => {
out_arity => "variable",
attr_type => "arm_SymConst_attr_t",
attr => "ir_entity *entity, int symconst_offset",
- custominit => "arch_irn_add_flags(res, arch_irn_flags_modify_flags);",
- emit => '. bl %SC',
- mode => "mode_T",
+ custominit => "arch_add_irn_flags(res, arch_irn_flags_modify_flags);",
+ emit => 'bl %I',
},
# this node produces ALWAYS an empty (tempary) gp reg and cannot be CSE'd
EmptyReg => {
- op_flags => "c",
- irn_flags => "R",
+ op_flags => [ "constlike" ],
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "gp" ] },
- emit => '. /* %D0 now available for calculations */',
+ emit => '/* %D0 now available for calculations */',
cmp_attr => 'return 1;',
mode => $mode_gp,
},
CopyB => {
- op_flags => "F|H",
state => "pinned",
attr => "unsigned size",
attr_type => "arm_CopyB_attr_t",
},
FrameAddr => {
- op_flags => "c",
- irn_flags => "R",
+ op_flags => [ "constlike" ],
+ irn_flags => [ "rematerializable" ],
attr => "ir_entity *entity, int symconst_offset",
reg_req => { in => [ "gp" ], out => [ "gp" ] },
ins => [ "base" ],
},
SymConst => {
- op_flags => "c",
- irn_flags => "R",
+ op_flags => [ "constlike" ],
+ irn_flags => [ "rematerializable" ],
attr => "ir_entity *entity, int symconst_offset",
reg_req => { out => [ "gp" ] },
attr_type => "arm_SymConst_attr_t",
},
Cmp => {
- irn_flags => "R|F",
- emit => '. cmp %S0, %SO',
+ irn_flags => [ "rematerializable", "modify_flags" ],
+ emit => 'cmp %S0, %O',
mode => $mode_flags,
attr_type => "arm_cmp_attr_t",
constructors => \%cmp_shifter_operand_constructors,
},
Tst => {
- irn_flags => "R|F",
- emit => '. tst %S0, %SO',
+ irn_flags => [ "rematerializable", "modify_flags" ],
+ emit => 'tst %S0, %O',
mode => $mode_flags,
attr_type => "arm_cmp_attr_t",
constructors => \%cmp_shifter_operand_constructors,
},
B => {
- op_flags => "L|X|Y",
+ op_flags => [ "cfopcode", "forking" ],
state => "pinned",
mode => "mode_T",
reg_req => { in => [ "flags" ], out => [ "none", "none" ] },
- attr => "pn_Cmp pnc",
+ attr => "ir_relation relation",
attr_type => "arm_CondJmp_attr_t",
- init_attr => "\tset_arm_CondJmp_pnc(res, pnc);",
+ init_attr => "\tset_arm_CondJmp_relation(res, relation);",
},
Jmp => {
state => "pinned",
- op_flags => "X",
- irn_flags => "J",
+ op_flags => [ "cfopcode" ],
+ irn_flags => [ "simple_jump" ],
reg_req => { out => [ "none" ] },
mode => "mode_X",
},
SwitchJmp => {
- op_flags => "L|X|Y",
+ op_flags => [ "cfopcode", "forking" ],
state => "pinned",
mode => "mode_T",
- attr => "int n_projs, long def_proj_num",
- init_attr => "\tset_arm_SwitchJmp_n_projs(res, n_projs);\n".
- "\tset_arm_SwitchJmp_default_proj_num(res, def_proj_num);",
+ attr => "const ir_switch_table *table",
+ init_attr => "init_arm_SwitchJmp_attributes(res, table);",
reg_req => { in => [ "gp" ], out => [ "none" ] },
+ out_arity => "variable",
attr_type => "arm_SwitchJmp_attr_t",
},
Ldr => {
- op_flags => "L|F",
+ op_flags => [ "uses_memory" ],
state => "exc_pinned",
ins => [ "ptr", "mem" ],
outs => [ "res", "M" ],
reg_req => { in => [ "gp", "none" ], out => [ "gp", "none" ] },
- emit => '. ldr%LM %D0, [%S0, #%O]',
+ emit => 'ldr%ML %D0, [%S0, #%o]',
attr_type => "arm_load_store_attr_t",
attr => "ir_mode *ls_mode, ir_entity *entity, int entity_sign, long offset, bool is_frame_entity",
},
Str => {
- op_flags => "L|F",
+ op_flags => [ "uses_memory" ],
state => "exc_pinned",
ins => [ "ptr", "val", "mem" ],
- outs => [ "mem" ],
+ outs => [ "M" ],
reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
- emit => '. str%SM %S1, [%S0, #%O]',
+ emit => 'str%MS %S1, [%S0, #%o]',
mode => "mode_M",
attr_type => "arm_load_store_attr_t",
attr => "ir_mode *ls_mode, ir_entity *entity, int entity_sign, long offset, bool is_frame_entity",
},
StoreStackM4Inc => {
- op_flags => "L|F",
- irn_flags => "R",
+ op_flags => [ "uses_memory" ],
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "sp", "gp", "gp", "gp", "gp", "none" ], out => [ "sp:I|S", "none" ] },
- emit => '. stmfd %S0!, {%S1, %S2, %S3, %S4}',
+ emit => 'stmfd %S0!, {%S1, %S2, %S3, %S4}',
outs => [ "ptr", "M" ],
},
LoadStackM3Epilogue => {
- op_flags => "L|F",
- irn_flags => "R",
+ op_flags => [ "uses_memory" ],
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "sp", "none" ], out => [ "r11:I", "sp:I|S", "pc:I", "none" ] },
- emit => '. ldmfd %S0, {%D0, %D1, %D2}',
+ emit => 'ldmfd %S0, {%D0, %D1, %D2}',
outs => [ "res0", "res1", "res2", "M" ],
},
-fpaAdf => {
- irn_flags => "R",
+Adf => {
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "fpa", "fpa" ], out => [ "fpa" ] },
- emit => '. adf%M %D0, %S0, %S1',
-},
-
-fpaMuf => {
- irn_flags => "R",
- reg_req => { in => [ "fpa", "fpa" ], out => [ "fpa" ] },
- emit =>'. muf%M %D0, %S0, %S1',
-},
-
-fpaFml => {
- irn_flags => "R",
- reg_req => { in => [ "fpa", "fpa" ], out => [ "fpa" ] },
- emit =>'. fml%M %D0, %S0, %S1',
-},
-
-fpaMax => {
- irn_flags => "R",
- reg_req => { in => [ "fpa", "fpa" ], out => [ "fpa" ] },
- emit =>'. fmax %S0, %S1, %D0',
-},
-
-fpaMin => {
- irn_flags => "R",
- reg_req => { in => [ "fpa", "fpa" ], out => [ "fpa" ] },
- emit =>'. fmin %S0, %S1, %D0',
-},
-
-fpaSuf => {
- irn_flags => "R",
- reg_req => { in => [ "fpa", "fpa" ], out => [ "fpa" ] },
- emit => '. suf%M %D0, %S0, %S1'
+ emit => 'adf%MA %D0, %S0, %S1',
+ attr_type => "arm_farith_attr_t",
+ attr => "ir_mode *op_mode",
+ mode => $mode_fp,
},
-fpaRsf => {
- irn_flags => "R",
+Muf => {
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "fpa", "fpa" ], out => [ "fpa" ] },
- emit => '. rsf%M %D0, %S0, %S1'
-},
-
-fpaDvf => {
+ emit => 'muf%MA %D0, %S0, %S1',
+ attr_type => "arm_farith_attr_t",
attr => "ir_mode *op_mode",
- init_attr => "attr->op_mode = op_mode;",
- reg_req => { in => [ "fpa", "fpa" ], out => [ "fpa", "none" ] },
- emit =>'. dvf%M %D0, %S0, %S1',
- outs => [ "res", "M" ],
+ mode => $mode_fp,
},
-fpaRdf => {
+Suf => {
+ irn_flags => [ "rematerializable" ],
+ reg_req => { in => [ "fpa", "fpa" ], out => [ "fpa" ] },
+ emit => 'suf%MA %D0, %S0, %S1',
+ attr_type => "arm_farith_attr_t",
attr => "ir_mode *op_mode",
- init_attr => "attr->op_mode = op_mode;",
- reg_req => { in => [ "fpa", "fpa" ], out => [ "fpa", "none" ] },
- emit =>'. rdf%M %D0, %S0, %S1',
- outs => [ "res", "M" ],
+ mode => $mode_fp,
},
-fpaFdv => {
- attr => "ir_mode *op_mode",
- init_attr => "attr->op_mode = op_mode;",
+Dvf => {
reg_req => { in => [ "fpa", "fpa" ], out => [ "fpa", "none" ] },
- emit =>'. fdv%M %D0, %S0, %S1',
+ emit => 'dvf%MA %D0, %S0, %S1',
outs => [ "res", "M" ],
-},
-
-fpaFrd => {
+ attr_type => "arm_farith_attr_t",
attr => "ir_mode *op_mode",
- init_attr => "attr->op_mode = op_mode;",
- reg_req => { in => [ "fpa", "fpa" ], out => [ "fpa", "none" ] },
- emit =>'. frd%M %D0, %S0, %S1',
- outs => [ "res", "M" ],
-},
-
-fpaMvf => {
- irn_flags => "R",
- reg_req => { in => [ "fpa" ], out => [ "fpa" ] },
- emit => '. mvf%M %S0, %D0',
-},
-
-fpaMnf => {
- irn_flags => "R",
- reg_req => { in => [ "fpa" ], out => [ "fpa" ] },
- emit => '. mnf%M %S0, %D0',
+ mode => $mode_fp,
},
-fpaAbs => {
- irn_flags => "R",
+Mvf => {
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "fpa" ], out => [ "fpa" ] },
- emit => '. abs%M %D0, %S0',
-},
-
-fpaFlt => {
- irn_flags => "R",
- reg_req => { in => ["gp"], out => [ "fpa" ] },
- emit => '. flt%M %D0, %S0',
-},
-
-fpaFix => {
- irn_flags => "R",
- reg_req => { in => ["fpa"], out => [ "gp" ] },
- emit => '. fix %D0, %S0',
+ emit => 'mvf%MA %S0, %D0',
+ attr_type => "arm_farith_attr_t",
+ attr => "ir_mode *op_mode",
+ mode => $mode_fp,
},
-Cmf => {
- irn_flags => "R|F",
- mode => $mode_flags,
- attr_type => "arm_cmp_attr_t",
- attr => "bool ins_permuted",
- init_attr => "init_arm_cmp_attr(res, ins_permuted, false);",
- reg_req => { in => [ "fpa", "fpa" ], out => [ "flags" ] },
- emit => '. cmf %S0, %S1',
+FltX => {
+ irn_flags => [ "rematerializable" ],
+ reg_req => { in => [ "gp" ], out => [ "fpa" ] },
+ emit => 'flt%MA %D0, %S0',
+ attr_type => "arm_farith_attr_t",
+ attr => "ir_mode *op_mode",
+ mode => $mode_fp,
},
Cmfe => {
- irn_flags => "R|F",
+ irn_flags => [ "rematerializable", "modify_flags" ],
mode => $mode_flags,
attr_type => "arm_cmp_attr_t",
attr => "bool ins_permuted",
init_attr => "init_arm_cmp_attr(res, ins_permuted, false);",
reg_req => { in => [ "fpa", "fpa" ], out => [ "flags" ] },
- emit => '. cmfe %S0, %S1',
+ emit => 'cmfe %S0, %S1',
},
-fpaLdf => {
- op_flags => "L|F",
- irn_flags => "R",
+Ldf => {
+ op_flags => [ "uses_memory" ],
state => "exc_pinned",
- attr => "ir_mode *op_mode",
- init_attr => "attr->op_mode = op_mode;",
- reg_req => { in => [ "gp", "none" ], out => [ "fpa", "none" ] },
- emit => '. ldf%M %D0, [%S0]',
+ ins => [ "ptr", "mem" ],
outs => [ "res", "M" ],
+ reg_req => { in => [ "gp", "none" ], out => [ "fpa", "none" ] },
+ emit => 'ldf%MF %D0, [%S0, #%o]',
+ attr_type => "arm_load_store_attr_t",
+ attr => "ir_mode *ls_mode, ir_entity *entity, int entity_sign, long offset, bool is_frame_entity",
},
-fpaStf => {
- op_flags => "L|F",
- irn_flags => "R",
+Stf => {
+ op_flags => [ "uses_memory" ],
state => "exc_pinned",
- attr => "ir_mode *op_mode",
- init_attr => "attr->op_mode = op_mode;",
- reg_req => { in => [ "gp", "fpa", "none" ], out => [ "none" ] },
- emit => '. stf%M %S1, [%S0]',
+ ins => [ "ptr", "val", "mem" ],
+ outs => [ "M" ],
mode => "mode_M",
+ reg_req => { in => [ "gp", "fpa", "none" ], out => [ "none" ] },
+ emit => 'stf%MF %S1, [%S0, #%o]',
+ attr_type => "arm_load_store_attr_t",
+ attr => "ir_mode *ls_mode, ir_entity *entity, int entity_sign, long offset, bool is_frame_entity",
},
-fpaDbl2GP => {
- op_flags => "L|F",
- irn_flags => "R",
- reg_req => { in => [ "fpa", "none" ], out => [ "gp", "gp", "none" ] },
- outs => [ "low", "high", "M" ],
-},
-
-AddSP => {
- reg_req => { in => [ "sp", "gp", "none" ], out => [ "sp:I|S", "none" ] },
- emit => '. add %D0, %S0, %S1',
- outs => [ "stack", "M" ],
-},
-
-SubSPandCopy => {
- reg_req => { in => [ "sp", "gp", "none" ], out => [ "sp:I|S", "gp", "none" ] },
- ins => [ "stack", "size", "mem" ],
- emit => ". sub %D0, %S0, %S1\n".
- ". mov sp, %D1",
- outs => [ "stack", "addr", "M" ],
-},
-
-LdTls => {
- irn_flags => "R",
- reg_req => { out => [ "gp" ] },
- mode => $mode_gp,
-},
-
-
#
# floating point constants
#
-fpaConst => {
- op_flags => "c",
- irn_flags => "R",
- attr => "tarval *tv",
+fConst => {
+ op_flags => [ "constlike" ],
+ irn_flags => [ "rematerializable" ],
+ attr => "ir_tarval *tv",
init_attr => "attr->tv = tv;",
mode => "get_tarval_mode(tv)",
reg_req => { out => [ "fpa" ] },
- attr_type => "arm_fpaConst_attr_t",
+ attr_type => "arm_fConst_attr_t",
}
); # end of %nodes
projects / libfirm / blobdiff