Do not forcefully rebuild outedges in compute_execfreq(), but handle this at the...

[libfirm] / ir / be / arm / arm_spec.pl

diff --git a/ir/be/arm/arm_spec.pl b/ir/be/arm/arm_spec.pl
index 5441e8a..3adff66 100644 (file)
--- a/ir/be/arm/arm_spec.pl
+++ b/ir/be/arm/arm_spec.pl
@@ -28,10 +28,14 @@ $new_emit_syntax = 1;
 #   comment   => "any comment for constructor",
 #   reg_req   => { in => [ "reg_class|register" ], out => [ "reg_class|register|in_rX" ] },
 #   cmp_attr  => "c source code for comparing node attributes",
+#   outs      => { "out1", "out2" } # optional, creates pn_op_out1, ... consts
+#   ins       => { "in1", "in2" }   # optional, creates n_op_in1, ... consts
+#   mode      => "mode_Iu"          # optional, predefines the mode
 #   emit      => "emit code with templates",
-#   attr      => "attitional attribute arguments for constructor"
-#   init_attr => "emit attribute initialization template"
+#   attr      => "attitional attribute arguments for constructor",
+#   init_attr => "emit attribute initialization template",
 #   rd_constructor => "c source code which constructs an ir_node"
+#   hash_func => "name of the hash function for this operation",
 #   latency   => "latency of this operation (can be float)"
 #   attr_type => "name of the attribute struct",
 # },
@@ -106,33 +110,33 @@ $mode_gp      = "mode_Iu";
 $mode_fpa     = "mode_E";
 
 # register types:
-#   0 - no special type
-#   1 - caller save (register must be saved by the caller of a function)
-#   2 - callee save (register must be saved by the called function)
-#   4 - ignore (do not assign this register)
-#   8 - emitter can choose an arbitrary register of this class
-#  16 - the register is a virtual one
-#  32 - register represents a state
+$normal      =  0; # no special type
+$caller_save =  1; # caller save (register must be saved by the caller of a function)
+$callee_save =  2; # callee save (register must be saved by the called function)
+$ignore      =  4; # ignore (do not assign this register)
+$arbitrary   =  8; # emitter can choose an arbitrary register of this class
+$virtual     = 16; # the register is a virtual one
+$state       = 32; # register represents a state
 # NOTE: Last entry of each class is the largest Firm-Mode a register can hold
 %reg_classes = (
        gp => [
-               { "name" => "r0", "type" => 1 },
-               { "name" => "r1", "type" => 1 },
-               { "name" => "r2", "type" => 1 },
-               { "name" => "r3", "type" => 1 },
-               { "name" => "r4", "type" => 2 },
-               { "name" => "r5", "type" => 2 },
-               { "name" => "r6", "type" => 2 },
-               { "name" => "r7", "type" => 2 },
-               { "name" => "r8", "type" => 2 },
-               { "name" => "r9", "type" => 2 },
-               { "name" => "r10", "type" => 2 },
-               { "name" => "r11", "type" => 2 },
-               { "name" => "r12", "type" => 6 }, # reserved for linker
-               { "name" => "sp", "type" => 6 }, # this is our stack pointer
-               { "name" => "lr", "type" => 3 }, # this is our return address
-               { "name" => "pc", "type" => 6 }, # this is our program counter
-               { name => "gp_UKNWN", type => 4 | 8 | 16 },  # we need a dummy register for Unknown nodes
+               { "name" => "r0", "type"  => $caller_save },
+               { "name" => "r1", "type"  => $caller_save },
+               { "name" => "r2", "type"  => $caller_save },
+               { "name" => "r3", "type"  => $caller_save },
+               { "name" => "r4", "type"  => $callee_save },
+               { "name" => "r5", "type"  => $callee_save },
+               { "name" => "r6", "type"  => $callee_save },
+               { "name" => "r7", "type"  => $callee_save },
+               { "name" => "r8", "type"  => $callee_save },
+               { "name" => "r9", "type"  => $callee_save },
+               { "name" => "r10", "type" => $callee_save },
+               { "name" => "r11", "type" => $callee_save },
+               { "name" => "r12", "type" => $ignore | $callee_save }, # reserved for linker
+               { "name" => "sp", "type"  => $ignore | $callee_save }, # this is our stack pointer
+               { "name" => "lr", "type"  => $callee_save | $caller_save }, # this is our return address
+               { "name" => "pc", "type"  => $ignore | $callee_save }, # this is our program counter
+               { name => "gp_UKNWN", type => $ignore | $arbitrary | $virtual },  # we need a dummy register for Unknown nodes
                { "mode" => $mode_gp }
        ],
        fpa  => [
@@ -183,6 +187,7 @@ $default_copy_attr = "arm_copy_attr";
        arm_SymConst_attr_t  => "\tinit_arm_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res);",
        arm_CondJmp_attr_t   => "\tinit_arm_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res);",
        arm_SwitchJmp_attr_t => "\tinit_arm_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res);",
+       arm_fpaConst_attr_t  => "\tinit_arm_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res);",
 );
 
 %compare_attr = (
@@ -190,6 +195,7 @@ $default_copy_attr = "arm_copy_attr";
        arm_SymConst_attr_t  => "cmp_attr_arm_SymConst",
        arm_CondJmp_attr_t   => "cmp_attr_arm_CondJmp",
        arm_SwitchJmp_attr_t => "cmp_attr_arm_SwitchJmp",
+       arm_fpaConst_attr_t  => "cmp_attr_arm_fpaConst",
 );
 
 #%operands = (
@@ -258,9 +264,9 @@ Add => {
        op_flags  => "C",
        irn_flags => "R",
        comment   => "construct Add: Add(a, b) = Add(b, a) = a + b",
-       attr      => "arm_shift_modifier mod, tarval *shf",
-       init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
-       cmp_attr  => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
+       attr      => "arm_shift_modifier mod, long shf",
+       init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
+       cmp_attr  => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
        reg_req   => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
        emit      => '. add %D0, %S0, %S1%X'
 },
@@ -268,9 +274,9 @@ Add => {
 Add_i => {
        irn_flags => "R",
        comment   => "construct Add: Add(a, const) = Add(const, a) = a + const",
-       attr      => "tarval *tv",
-       init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
-       cmp_attr  => 'return attr_a->value != attr_b->value;',
+       attr      => "long imm",
+       init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
+       cmp_attr  => 'return attr_a->imm_value != attr_b->imm_value;',
        reg_req   => { "in" => [ "gp" ], "out" => [ "gp" ] },
        emit      => '. add %D0, %S0, %C'
 },
@@ -313,9 +319,9 @@ And => {
        op_flags  => "C",
        irn_flags => "R",
        comment   => "construct And: And(a, b) = And(b, a) = a AND b",
-       attr      => "arm_shift_modifier mod, tarval *shf",
-       init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
-       cmp_attr  => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
+       attr      => "arm_shift_modifier mod, long shf",
+       init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
+       cmp_attr  => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
        reg_req   => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
        emit      => '. and %D0, %S0, %S1%X'
 },
@@ -323,20 +329,20 @@ And => {
 And_i => {
        irn_flags => "R",
        comment   => "construct And: And(a, const) = And(const, a) = a AND const",
-       attr      => "tarval *tv",
-       init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
+       attr      => "long imm",
+       init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
        reg_req   => { "in" => [ "gp" ], "out" => [ "gp" ] },
        emit      => '. and %D0, %S0, %C',
-       cmp_attr  => 'return attr_a->value != attr_b->value;'
+       cmp_attr  => 'return attr_a->imm_value != attr_b->imm_value;'
 },
 
 Or => {
        op_flags  => "C",
        irn_flags => "R",
        comment   => "construct Or: Or(a, b) = Or(b, a) = a OR b",
-       attr      => "arm_shift_modifier mod, tarval *shf",
-       init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
-       cmp_attr  => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
+       attr      => "arm_shift_modifier mod, long shf",
+       init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
+       cmp_attr  => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
        reg_req   => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
        emit      => '. orr %D0, %S0, %S1%X'
 },
@@ -344,10 +350,10 @@ Or => {
 Or_i => {
        irn_flags => "R",
        comment   => "construct Or: Or(a, const) = Or(const, a) = a OR const",
-       attr      => "tarval *tv",
-       init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
+       attr      => "long imm",
+       init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
        reg_req   => { "in" => [ "gp" ], "out" => [ "gp" ] },
-       cmp_attr  => 'return attr_a->value != attr_b->value;',
+       cmp_attr  => 'return attr_a->imm_value != attr_b->imm_value;',
        emit      => '. orr %D0, %S0, %C'
 },
 
@@ -355,9 +361,9 @@ Eor => {
        op_flags  => "C",
        irn_flags => "R",
        comment   => "construct Eor: Eor(a, b) = Eor(b, a) = a EOR b",
-       attr      => "arm_shift_modifier mod, tarval *shf",
-       init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
-       cmp_attr  => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
+       attr      => "arm_shift_modifier mod, long shf",
+       init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
+       cmp_attr  => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
        reg_req   => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
        emit      => '. eor %D0, %S0, %S1%X'
 },
@@ -365,10 +371,10 @@ Eor => {
 Eor_i => {
        irn_flags => "R",
        comment   => "construct Eor: Eor(a, const) = Eor(const, a) = a EOR const",
-       attr      => "tarval *tv",
-       init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
+       attr      => "long imm",
+       init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
        reg_req   => { "in" => [ "gp" ], "out" => [ "gp" ] },
-       cmp_attr  => 'return attr_a->value != attr_b->value;',
+       cmp_attr  => 'return attr_a->imm_value != attr_b->imm_value;',
        emit      => '. eor %D0, %S0, %C'
 },
 
@@ -377,9 +383,9 @@ Eor_i => {
 Bic => {
        irn_flags => "R",
        comment   => "construct Bic: Bic(a, b) = a AND ~b",
-       attr      => "arm_shift_modifier mod, tarval *shf",
-       init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
-       cmp_attr  => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
+       attr      => "arm_shift_modifier mod, long shf",
+       init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
+       cmp_attr  => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
        reg_req   => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
        emit      => '. bic %D0, %S0, %S1%X'
 },
@@ -387,19 +393,19 @@ Bic => {
 Bic_i => {
        irn_flags => "R",
        comment   => "construct Bic: Bic(a, const) = a AND ~const",
-       attr      => "tarval *tv",
-       init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
+       attr      => "long imm",
+       init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
        reg_req   => { "in" => [ "gp" ], "out" => [ "gp" ] },
        emit      => '. bic %D0, %S0, %C',
-       cmp_attr  => 'return attr_a->value != attr_b->value;'
+       cmp_attr  => 'return attr_a->imm_value != attr_b->imm_value;'
 },
 
 Sub => {
        irn_flags => "R",
        comment   => "construct Sub: Sub(a, b) = a - b",
-       attr      => "arm_shift_modifier mod, tarval *shf",
-       init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
-       cmp_attr  => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
+       attr      => "arm_shift_modifier mod, long shf",
+       init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
+       cmp_attr  => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
        reg_req   => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
        emit      => '. sub %D0, %S0, %S1%X'
 },
@@ -407,9 +413,9 @@ Sub => {
 Sub_i => {
        irn_flags => "R",
        comment   => "construct Sub: Sub(a, const) = a - const",
-       attr      => "tarval *tv",
-       init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
-       cmp_attr  => 'return attr_a->value != attr_b->value;',
+       attr      => "long imm",
+       init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
+       cmp_attr  => 'return attr_a->imm_value != attr_b->imm_value;',
        reg_req   => { "in" => [ "gp" ], "out" => [ "gp" ] },
        emit      => '. sub %D0, %S0, %C',
 },
@@ -417,9 +423,9 @@ Sub_i => {
 Rsb => {
        irn_flags => "R",
        comment   => "construct Rsb: Rsb(a, b) = b - a",
-       attr      => "arm_shift_modifier mod, tarval *shf",
-       init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
-       cmp_attr  => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
+       attr      => "arm_shift_modifier mod, long shf",
+       init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
+       cmp_attr  => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
        reg_req   => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
        emit      => '. rsb %D0, %S0, %S1%X'
 },
@@ -427,11 +433,11 @@ Rsb => {
 Rsb_i => {
        irn_flags => "R",
        comment   => "construct Rsb: Rsb(a, const) = const - a",
-       attr      => "tarval *tv",
-       init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
+       attr      => "long imm",
+       init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
        reg_req   => { "in" => [ "gp" ], "out" => [ "gp" ] },
        emit      => '. rsb %D0, %S0, %C',
-       cmp_attr  => 'return attr_a->value != attr_b->value;'
+       cmp_attr  => 'return attr_a->imm_value != attr_b->imm_value;'
 },
 
 Shl => {
@@ -443,25 +449,24 @@ Shl => {
 
 Shr => {
        irn_flags => "R",
-       comment   => "construct Shr: Shr(a, b) = a >> b",
-       reg_req   => { "in" => [ "gp", "gp" ], "out" => [ "in_r1" ] },
+       comment   => "construct Shr: Shr(a, b) = a >>u b",
+       reg_req   => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
        emit      => '. mov %D0, %S0, lsr %S1'
 },
 
 Shrs => {
        irn_flags => "R",
-       comment   => "construct Shrs: Shrs(a, b) = a >> b",
-       reg_req   => { "in" => [ "gp", "gp" ], "out" => [ "in_r1" ] },
+       comment   => "construct Shrs: Shrs(a, b) = a >>s b",
+       reg_req   => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
        emit      => '. mov %D0, %S0, asr %S1'
 },
 
-#RotR => {
-#      irn_flags => "R",
-#      comment   => "construct RotR: RotR(a, b) = a ROTR b",
-#      reg_req   => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
-#      emit      => '. mov %D0, %S0, ror %S1 /* RotR(%S0, %S1) -> %D0, (%A1, %A2) */'
-##     emit      => '. ror %S0, %S1, %D0'
-#},
+Ror => {
+       irn_flags => "R",
+       comment   => "construct Ror: Ror(a, b) = a <<r>> b",
+       reg_req   => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
+       emit      => '. mov %D0, %S0, ror %S1'
+},
 
 #RotL => {
 #  irn_flags => "R",
@@ -480,9 +485,9 @@ Shrs => {
 Mov => {
        irn_flags => "R",
        comment   => "construct Mov: a = b",
-       attr      => "arm_shift_modifier mod, tarval *shf",
-       init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
-       cmp_attr  => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
+       attr      => "arm_shift_modifier mod, long shf",
+       init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
+       cmp_attr  => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
        reg_req   => { "in" => [ "gp" ], "out" => [ "gp" ] },
        emit      => '. mov %D0, %S0%X'
 },
@@ -490,19 +495,19 @@ Mov => {
 Mov_i => {
        irn_flags => "R",
        comment   => "represents an integer constant",
-       attr      => "tarval *tv",
-       init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
+       attr      => "long imm",
+       init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
        reg_req   => { "out" => [ "gp" ] },
        emit      => '. mov %D0, %C',
-       cmp_attr  => 'return attr_a->value != attr_b->value;'
+       cmp_attr  => 'return attr_a->imm_value != attr_b->imm_value;'
 },
 
 Mvn => {
        irn_flags => "R",
        comment   => "construct Not: Not(a) = !a",
-       attr      => "arm_shift_modifier mod, tarval *shf",
-       init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
-       cmp_attr  => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
+       attr      => "arm_shift_modifier mod, long shf",
+       init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
+       cmp_attr  => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
        reg_req   => { "in" => [ "gp" ], "out" => [ "gp" ] },
        emit      => '. mvn %D0, %S0%X'
 },
@@ -510,9 +515,9 @@ Mvn => {
 Mvn_i => {
        irn_flags => "R",
        comment   => "represents a negated integer constant",
-       attr      => "tarval *tv",
-       init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
-       cmp_attr  => 'return attr_a->value != attr_b->value;',
+       attr      => "long imm",
+       init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
+       cmp_attr  => 'return attr_a->imm_value != attr_b->imm_value;',
        reg_req   => { "out" => [ "gp" ] },
        emit      => '. mvn %D0, %C',
 },
@@ -549,8 +554,9 @@ CopyB => {
        op_flags  => "F|H",
        state     => "pinned",
        comment   => "implements a memcopy: CopyB(dst, src, size, mem) == memcpy(dst, src, size)",
-       attr      => "tarval *tv",
-       init_attr => 'attr->value = tv;',
+       attr      => "long imm",
+       init_attr => 'attr->imm_value = imm;',
+       cmp_attr  => 'return attr_a->imm_value != attr_b->imm_value;',
        reg_req   => { "in" => [ "!sp", "!sp", "gp", "gp", "gp", "none" ], "out" => [ "none" ] },
        outs      => [ "M" ],
 },
@@ -576,6 +582,17 @@ CmpBra => {
        attr_type => "arm_CondJmp_attr_t",
 },
 
+TstBra => {
+       op_flags  => "L|X|Y",
+       state     => "pinned",
+       comment   => "construct conditional branch: TST A, B && JMPxx LABEL",
+       mode      => "mode_T",
+       attr      => "int proj_num",
+       init_attr => "\tset_arm_CondJmp_proj_num(res, proj_num);",
+       reg_req   => { "in" => [ "gp", "gp" ], "out" => [ "none", "none"] },
+       attr_type => "arm_CondJmp_attr_t",
+},
+
 SwitchJmp => {
        op_flags  => "L|X|Y",
        state     => "pinned",
@@ -674,7 +691,7 @@ StoreStackM4Inc => {
        op_flags  => "L|F",
        irn_flags => "R",
        state     => "exc_pinned",
-       comment   => "construct Store: Store(ptr, val, mem) = ST ptr,val",
+       comment   => "construct Store: Push 4 Registers = ST ptr,val",
        reg_req   => { "in" => [ "sp", "gp", "gp", "gp", "gp", "none" ], "out" => [ "gp", "none" ] },
        emit      => '. stmfd %S0!, {%S1, %S2, %S3, %S4}',
        outs      => [ "ptr", "M" ],
@@ -713,12 +730,11 @@ fpaAdf => {
 },
 
 fpaAdf_i => {
-       op_flags  => "C",
        irn_flags => "R",
        comment   => "construct FPA Add: Add(a, b) = Add(b, a) = a + b",
-       attr      => "tarval *tv",
-       init_attr => 'ARM_SET_FPA_IMM(attr); attr->value = tv;',
-       cmp_attr  => 'return attr_a->value != attr_b->value;',
+       attr      => "long imm",
+       init_attr => 'ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
+       cmp_attr  => 'return attr_a->imm_value != attr_b->imm_value;',
        reg_req   => { "in" => [ "fpa" ], "out" => [ "fpa" ] },
        emit      => '. adf%M %D0, %S0, %C',
 },
@@ -732,12 +748,11 @@ fpaMuf => {
 },
 
 fpaMuf_i => {
-       op_flags  => "C",
        irn_flags => "R",
        comment   => "construct FPA Mul: Mul(a, b) = Mul(b, a) = a * b",
-       attr      => "tarval *tv",
-       init_attr => 'ARM_SET_FPA_IMM(attr); attr->value = tv;',
-       cmp_attr  => 'return attr_a->value != attr_b->value;',
+       attr      => "long imm",
+       init_attr => 'ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
+       cmp_attr  => 'return attr_a->imm_value != attr_b->imm_value;',
        reg_req   => { "in" => [ "fpa" ], "out" => [ "fpa" ] },
        emit      => '. muf%M %D0, %S0, %C',
 },
@@ -778,9 +793,9 @@ fpaSuf => {
 fpaSuf_i => {
        irn_flags => "R",
        comment   => "construct FPA Sub: Sub(a, b) = a - b",
-       attr      => "tarval *tv",
-       init_attr => 'ARM_SET_FPA_IMM(attr); attr->value = tv;',
-       cmp_attr  => 'return attr_a->value != attr_b->value;',
+       attr      => "long imm",
+       init_attr => 'ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
+       cmp_attr  => 'return attr_a->imm_value != attr_b->imm_value;',
        reg_req   => { "in" => [ "fpa" ], "out" => [ "fpa" ] },
        emit      => '. suf%M %D0, %S0, %C'
 },
@@ -795,9 +810,9 @@ fpaRsf => {
 fpaRsf_i => {
        irn_flags => "R",
        comment   => "construct FPA reverse Sub: Sub(a, b) = b - a",
-       attr      => "tarval *tv",
-       init_attr => 'ARM_SET_FPA_IMM(attr); attr->value = tv;',
-       cmp_attr  => 'return attr_a->value != attr_b->value;',
+       attr      => "long imm",
+       init_attr => 'ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
+       cmp_attr  => 'return attr_a->imm_value != attr_b->imm_value;',
        reg_req   => { "in" => [ "fpa" ], "out" => [ "fpa" ] },
        emit      => '. rsf%M %D0, %S0, %C'
 },
@@ -813,9 +828,9 @@ fpaDvf => {
 
 fpaDvf_i => {
        comment   => "construct FPA Div: Div(a, b) = a / b",
-       attr      => "ir_mode *op_mode, tarval *tv",
-       init_attr => 'attr->op_mode = op_mode; ARM_SET_FPA_IMM(attr); attr->value = tv;',
-       cmp_attr  => 'return attr_a->value != attr_b->value;',
+       attr      => "ir_mode *op_mode, long imm",
+       init_attr => 'attr->op_mode = op_mode; ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
+       cmp_attr  => 'return attr_a->imm_value != attr_b->imm_value;',
        reg_req   => { "in" => [ "fpa" ], "out" => [ "fpa", "none" ] },
        emit      =>'. dvf%M %D0, %S0, %C',
        outs      => [ "res", "M" ],
@@ -832,9 +847,9 @@ fpaRdf => {
 
 fpaRdf_i => {
        comment   => "construct FPA reverse Div: Div(a, b) = b / a",
-       attr      => "ir_mode *op_mode, tarval *tv",
-       init_attr => 'attr->op_mode = op_mode; ARM_SET_FPA_IMM(attr); attr->value = tv;',
-       cmp_attr  => 'return attr_a->value != attr_b->value;',
+       attr      => "ir_mode *op_mode, long imm",
+       init_attr => 'attr->op_mode = op_mode; ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
+       cmp_attr  => 'return attr_a->imm_value != attr_b->imm_value;',
        reg_req   => { "in" => [ "fpa" ], "out" => [ "fpa", "none" ] },
        emit      =>'. rdf%M %D0, %S0, %S1',
        outs      => [ "res", "M" ],
@@ -851,9 +866,9 @@ fpaFdv => {
 
 fpaFdv_i => {
        comment   => "construct FPA Fast Div: Div(a, b) = a / b",
-       attr      => "ir_mode *op_mode, tarval *tv",
-       init_attr => 'attr->op_mode = op_mode; ARM_SET_FPA_IMM(attr); attr->value = tv;',
-       cmp_attr  => 'return attr_a->value != attr_b->value;',
+       attr      => "ir_mode *op_mode, long imm",
+       init_attr => 'attr->op_mode = op_mode; ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
+       cmp_attr  => 'return attr_a->imm_value != attr_b->imm_value;',
        reg_req   => { "in" => [ "fpa" ], "out" => [ "fpa", "none" ] },
        emit      =>'. fdv%M %D0, %S0, %C',
        outs      => [ "res", "M" ],
@@ -870,9 +885,9 @@ fpaFrd => {
 
 fpaFrd_i => {
        comment   => "construct FPA Fast reverse Div: Div(a, b) = b / a",
-       attr      => "ir_mode *op_mode, tarval *tv",
-       init_attr => 'attr->op_mode = op_mode; ARM_SET_FPA_IMM(attr); attr->value = tv;',
-       cmp_attr  => 'return attr_a->value != attr_b->value;',
+       attr      => "ir_mode *op_mode, long imm",
+       init_attr => 'attr->op_mode = op_mode; ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
+       cmp_attr  => 'return attr_a->imm_value != attr_b->imm_value;',
        reg_req   => { "in" => [ "fpa" ], "out" => [ "fpa", "none" ] },
        emit      =>'. frd%M %D0, %S0, %C',
        outs      => [ "res", "M" ],
@@ -888,12 +903,11 @@ fpaMvf => {
 fpaMvf_i => {
        irn_flags => "R",
        comment   => "represents a float constant",
-       attr      => "tarval *tv",
-       init_attr => 'ARM_SET_FPA_IMM(attr); attr->value = tv;',
+       attr      => "long imm",
+       init_attr => 'ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
        reg_req   => { "out" => [ "fpa" ] },
-       mode      => "get_tarval_mode(tv)",
-       emit      => '. mvf %D0, %C',
-       cmp_attr  => 'return attr_a->value != attr_b->value;'
+       emit      => '. mvf%M %D0, %C',
+       cmp_attr  => 'return attr_a->imm_value != attr_b->imm_value;'
 },
 
 fpaMnf => {
@@ -906,12 +920,11 @@ fpaMnf => {
 fpaMnf_i => {
        irn_flags => "R",
        comment   => "represents a float constant",
-       attr      => "tarval *tv",
-       init_attr => 'ARM_SET_FPA_IMM(attr); attr->value = tv;',
+       attr      => "long imm",
+       init_attr => 'ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
        reg_req   => { "out" => [ "fpa" ] },
-       mode      => "get_tarval_mode(tv)",
-       emit      => '. mnf %D0, %C',
-       cmp_attr  => 'return attr_a->value != attr_b->value;'
+       emit      => '. mnf%M %D0, %C',
+       cmp_attr  => 'return attr_a->imm_value != attr_b->imm_value;'
 },
 
 fpaAbs => {
@@ -1020,15 +1033,17 @@ AddSP => {
        comment   => "construct Add to stack pointer",
        reg_req   => { in => [ "sp", "gp", "none" ], out => [ "in_r1", "none" ] },
        emit      => '. add %D0, %S0, %S1',
-       outs      => [ "stack:S", "M" ],
+       outs      => [ "stack:I|S", "M" ],
 },
 
-SubSP => {
-       irn_flags => "I",
-       comment   => "construct Sub from stack pointer",
-       reg_req   => { in => [ "sp", "gp", "none" ], out => [ "in_r1", "none" ] },
-       emit      => '. sub %D0, %S0, %S1',
-       outs      => [ "stack:S", "M" ],
+SubSPandCopy => {
+#irn_flags => "I",
+       comment   => "construct Sub from stack pointer and copy to Register",
+       reg_req   => { in => [ "sp", "gp", "none" ], out => [ "in_r1", "gp", "none" ] },
+       ins       => [ "stack", "size", "mem" ],
+       emit      => ". sub %D0, %S0, %S1\n".
+                    ". mov sp, %D1",
+       outs      => [ "stack:I|S", "addr", "M" ],
 },
 
 LdTls => {
@@ -1046,9 +1061,10 @@ fpaConst => {
        irn_flags => "R",
        comment   => "construct a floating point constant",
        attr      => "tarval *tv",
-       init_attr => "attr->value = tv;",
+       init_attr => "attr->tv = tv;",
        mode      => "get_tarval_mode(tv)",
        reg_req   => { "out" => [ "fpa" ] },
+       attr_type => "arm_fpaConst_attr_t",
 }
 
 #---------------------------------------------------#