# Creation: 2006/02/13
+# Arm Architecure Specification
+# Author: Matthias Braun, Michael Beck, Oliver Richter, Tobias Gneist
# $Id$
-# the cpu architecture (ia32, ia64, mips, sparc, ppc, ...)
-
$arch = "arm";
#
# Modes
#
-$mode_gp = "mode_Iu";
-$mode_flags = "mode_Bu";
-$mode_fpa = "mode_E";
-
-# register types:
-$normal = 0; # no special type
-$caller_save = 1; # caller save (register must be saved by the caller of a function)
-$callee_save = 2; # callee save (register must be saved by the called function)
-$ignore = 4; # ignore (do not assign this register)
-$arbitrary = 8; # emitter can choose an arbitrary register of this class
-$virtual = 16; # the register is a virtual one
-$state = 32; # register represents a state
+$mode_gp = "mode_Iu";
+$mode_flags = "mode_Bu";
+$mode_fp = "mode_E";
+
# NOTE: Last entry of each class is the largest Firm-Mode a register can hold
%reg_classes = (
gp => [
- { name => "r0", type => $caller_save },
- { name => "r1", type => $caller_save },
- { name => "r2", type => $caller_save },
- { name => "r3", type => $caller_save },
- { name => "r4", type => $callee_save },
- { name => "r5", type => $callee_save },
- { name => "r6", type => $callee_save },
- { name => "r7", type => $callee_save },
- { name => "r8", type => $callee_save },
- { name => "r9", type => $callee_save },
- { name => "r10", type => $callee_save },
- { name => "r11", type => $callee_save },
- { name => "r12", type => $ignore }, # reserved for linker/immediate fixups
- { name => "sp", type => $ignore }, # this is our stack pointer
- { name => "lr", type => $callee_save | $caller_save }, # this is our return address
- { name => "pc", type => $ignore }, # this is our program counter
+ { name => "r0" },
+ { name => "r1" },
+ { name => "r2" },
+ { name => "r3" },
+ { name => "r4" },
+ { name => "r5" },
+ { name => "r6" },
+ { name => "r7" },
+ { name => "r8" },
+ { name => "r9" },
+ { name => "r10" },
+ { name => "r11" },
+ { name => "r12" },
+ { name => "sp" },
+ { name => "lr" },
+ { name => "pc" },
{ mode => $mode_gp }
],
- fpa => [
- { name => "f0", type => $caller_save },
- { name => "f1", type => $caller_save },
- { name => "f2", type => $caller_save },
- { name => "f3", type => $caller_save },
- { name => "f4", type => $caller_save },
- { name => "f5", type => $caller_save },
- { name => "f6", type => $caller_save },
- { name => "f7", type => $caller_save },
- { mode => $mode_fpa }
+ fpa => [
+ { name => "f0" },
+ { name => "f1" },
+ { name => "f2" },
+ { name => "f3" },
+ { name => "f4" },
+ { name => "f5" },
+ { name => "f6" },
+ { name => "f7" },
+ { mode => $mode_fp }
],
flags => [
- { name => "fl", type => 0 },
+ { name => "fl" },
{ mode => $mode_flags, flags => "manual_ra" }
],
);
%emit_templates = (
- M => "${arch}_emit_mode(node);",
+ FM => "${arch}_emit_float_load_store_mode(node);",
+ AM => "${arch}_emit_float_arithmetic_mode(node);",
LM => "${arch}_emit_load_mode(node);",
SM => "${arch}_emit_store_mode(node);",
SO => "${arch}_emit_shifter_operand(node);",
S0 => "${arch}_emit_source_register(node, 0);",
+ SC => "${arch}_emit_symconst(node);",
S1 => "${arch}_emit_source_register(node, 1);",
S2 => "${arch}_emit_source_register(node, 2);",
S3 => "${arch}_emit_source_register(node, 3);",
$default_copy_attr = "arm_copy_attr";
%init_attr = (
- arm_attr_t => "\tinit_arm_attributes(res, flags, in_reqs, exec_units, n_res);",
+ arm_attr_t => "\tinit_arm_attributes(res, irn_flags_, in_reqs, exec_units, n_res);",
arm_SymConst_attr_t =>
- "\tinit_arm_attributes(res, flags, in_reqs, exec_units, n_res);\n".
- "\tinit_arm_SymConst_attributes(res, entity);",
- arm_CondJmp_attr_t => "\tinit_arm_attributes(res, flags, in_reqs, exec_units, n_res);",
- arm_SwitchJmp_attr_t => "\tinit_arm_attributes(res, flags, in_reqs, exec_units, n_res);",
- arm_fpaConst_attr_t => "\tinit_arm_attributes(res, flags, in_reqs, exec_units, n_res);",
+ "\tinit_arm_attributes(res, irn_flags_, in_reqs, exec_units, n_res);\n".
+ "\tinit_arm_SymConst_attributes(res, entity, symconst_offset);",
+ arm_CondJmp_attr_t => "\tinit_arm_attributes(res, irn_flags_, in_reqs, exec_units, n_res);",
+ arm_SwitchJmp_attr_t => "\tinit_arm_attributes(res, irn_flags_, in_reqs, exec_units, n_res);",
+ arm_fConst_attr_t => "\tinit_arm_attributes(res, irn_flags_, in_reqs, exec_units, n_res);",
arm_load_store_attr_t =>
- "\tinit_arm_attributes(res, flags, in_reqs, exec_units, n_res);\n".
+ "\tinit_arm_attributes(res, irn_flags_, in_reqs, exec_units, n_res);\n".
"\tinit_arm_load_store_attributes(res, ls_mode, entity, entity_sign, offset, is_frame_entity);",
arm_shifter_operand_t =>
- "\tinit_arm_attributes(res, flags, in_reqs, exec_units, n_res);\n",
+ "\tinit_arm_attributes(res, irn_flags_, in_reqs, exec_units, n_res);\n",
arm_cmp_attr_t =>
- "\tinit_arm_attributes(res, flags, in_reqs, exec_units, n_res);\n",
+ "\tinit_arm_attributes(res, irn_flags_, in_reqs, exec_units, n_res);\n",
+ arm_farith_attr_t =>
+ "\tinit_arm_attributes(res, irn_flags_, in_reqs, exec_units, n_res);\n".
+ "\tinit_arm_farith_attributes(res, op_mode);",
arm_CopyB_attr_t =>
- "\tinit_arm_attributes(res, flags, in_reqs, exec_units, n_res);\n".
+ "\tinit_arm_attributes(res, irn_flags_, in_reqs, exec_units, n_res);\n".
"\tinit_arm_CopyB_attributes(res, size);",
);
arm_SymConst_attr_t => "cmp_attr_arm_SymConst",
arm_CondJmp_attr_t => "cmp_attr_arm_CondJmp",
arm_SwitchJmp_attr_t => "cmp_attr_arm_SwitchJmp",
- arm_fpaConst_attr_t => "cmp_attr_arm_fpaConst",
+ arm_fConst_attr_t => "cmp_attr_arm_fConst",
arm_load_store_attr_t => "cmp_attr_arm_load_store",
arm_shifter_operand_t => "cmp_attr_arm_shifter_operand",
arm_CopyB_attr_t => "cmp_attr_arm_CopyB",
arm_cmp_attr_t => "cmp_attr_arm_cmp",
+ arm_farith_attr_t => "cmp_attr_arm_farith",
);
my %unop_shifter_operand_constructors = (
reg_req => { in => [ "gp" ], out => [ "gp" ] },
},
reg_shift_reg => {
- attr => "arm_shift_modifier shift_modifier",
+ attr => "arm_shift_modifier_t shift_modifier",
custominit => "init_arm_shifter_operand(res, 0, shift_modifier, 0);",
reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
},
reg_shift_imm => {
- attr => "arm_shift_modifier shift_modifier, unsigned shift_immediate",
+ attr => "arm_shift_modifier_t shift_modifier, unsigned shift_immediate",
custominit => "init_arm_shifter_operand(res, 0, shift_modifier, shift_immediate);",
reg_req => { in => [ "gp" ], out => [ "gp" ] },
},
ins => [ "left", "right" ],
},
reg_shift_reg => {
- attr => "arm_shift_modifier shift_modifier",
+ attr => "arm_shift_modifier_t shift_modifier",
custominit => "init_arm_shifter_operand(res, 0, shift_modifier, 0);",
reg_req => { in => [ "gp", "gp", "gp" ], out => [ "gp" ] },
ins => [ "left", "right", "shift" ],
},
reg_shift_imm => {
- attr => "arm_shift_modifier shift_modifier, unsigned shift_immediate",
+ attr => "arm_shift_modifier_t shift_modifier, unsigned shift_immediate",
custominit => "init_arm_shifter_operand(res, 0, shift_modifier, shift_immediate);",
reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
ins => [ "left", "right" ],
ins => [ "left", "right" ],
},
reg_shift_reg => {
- attr => "arm_shift_modifier shift_modifier, bool ins_permuted, bool is_unsigned",
+ attr => "arm_shift_modifier_t shift_modifier, bool ins_permuted, bool is_unsigned",
custominit =>
"init_arm_shifter_operand(res, 0, shift_modifier, 0);\n".
"\tinit_arm_cmp_attr(res, ins_permuted, is_unsigned);",
ins => [ "left", "right", "shift" ],
},
reg_shift_imm => {
- attr => "arm_shift_modifier shift_modifier, unsigned shift_immediate, bool ins_permuted, bool is_unsigned",
+ attr => "arm_shift_modifier_t shift_modifier, unsigned shift_immediate, bool ins_permuted, bool is_unsigned",
custominit =>
"init_arm_shifter_operand(res, 0, shift_modifier, shift_immediate);\n".
"\tinit_arm_cmp_attr(res, ins_permuted, is_unsigned);",
%nodes = (
Add => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
emit => '. add %D0, %S0, %SO',
mode => $mode_gp,
attr_type => "arm_shifter_operand_t",
},
Mul => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp", "gp" ], out => [ "!in_r1" ] },
emit =>'. mul %D0, %S0, %S1',
mode => $mode_gp,
},
Smull => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp", "gp" ], out => [ "gp", "gp" ] },
emit =>'. smull %D0, %D1, %S0, %S1',
outs => [ "low", "high" ],
},
Umull => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp", "gp" ], out => [ "gp", "gp" ] },
emit =>'. umull %D0, %D1, %S0, %S1',
outs => [ "low", "high" ],
},
Mla => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp", "gp", "gp" ], out => [ "!in_r1" ] },
emit =>'. mla %D0, %S0, %S1, %S2',
mode => $mode_gp,
},
And => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
emit => '. and %D0, %S0, %SO',
mode => $mode_gp,
attr_type => "arm_shifter_operand_t",
},
Or => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
emit => '. orr %D0, %S0, %SO',
mode => $mode_gp,
attr_type => "arm_shifter_operand_t",
},
Eor => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
emit => '. eor %D0, %S0, %SO',
mode => $mode_gp,
attr_type => "arm_shifter_operand_t",
},
Bic => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
emit => '. bic %D0, %S0, %SO',
mode => $mode_gp,
attr_type => "arm_shifter_operand_t",
},
Sub => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
emit => '. sub %D0, %S0, %SO',
mode => $mode_gp,
attr_type => "arm_shifter_operand_t",
},
Rsb => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
emit => '. rsb %D0, %S0, %SO',
mode => $mode_gp,
attr_type => "arm_shifter_operand_t",
},
Mov => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
arity => "variable",
emit => '. mov %D0, %SO',
mode => $mode_gp,
},
Mvn => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
attr_type => "arm_shifter_operand_t",
arity => "variable",
emit => '. mvn %D0, %SO',
constructors => \%unop_shifter_operand_constructors,
},
-# Deprecated - we should construct the movs and rsbmi directly...
-Abs => {
- irn_flags => "R",
+Clz => {
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp" ], out => [ "gp" ] },
- emit =>
-'. movs %S0, %S0, #0
-. rsbmi %D0, %S0, #0',
+ emit =>'. clz %D0, %S0',
mode => $mode_gp,
},
+# mov lr, pc\n mov pc, XXX -- This combination is used for calls to function
+# pointers
+LinkMovPC => {
+ state => "exc_pinned",
+ arity => "variable",
+ out_arity => "variable",
+ attr_type => "arm_shifter_operand_t",
+ attr => "arm_shift_modifier_t shift_modifier, unsigned char immediate_value, unsigned char immediate_rot",
+ custominit => "init_arm_shifter_operand(res, immediate_value, shift_modifier, immediate_rot);\n".
+ "\tarch_irn_add_flags(res, arch_irn_flags_modify_flags);",
+ emit => ". mov lr, pc\n".
+ ". mov pc, %SO",
+},
+
+# mov lr, pc\n ldr pc, XXX -- This combination is used for calls to function
+# pointers
+LinkLdrPC => {
+ state => "exc_pinned",
+ arity => "variable",
+ out_arity => "variable",
+ attr_type => "arm_load_store_attr_t",
+ attr => "ir_mode *ls_mode, ir_entity *entity, int entity_sign, long offset, bool is_frame_entity",
+ custominit => "arch_irn_add_flags(res, arch_irn_flags_modify_flags);",
+ emit => ". mov lr, pc\n".
+ ". ldr pc, %SO",
+},
+
+Bl => {
+ state => "exc_pinned",
+ arity => "variable",
+ out_arity => "variable",
+ attr_type => "arm_SymConst_attr_t",
+ attr => "ir_entity *entity, int symconst_offset",
+ custominit => "arch_irn_add_flags(res, arch_irn_flags_modify_flags);",
+ emit => '. bl %SC',
+},
+
# this node produces ALWAYS an empty (tempary) gp reg and cannot be CSE'd
EmptyReg => {
- op_flags => "c",
- irn_flags => "R",
+ op_flags => [ "constlike" ],
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "gp" ] },
emit => '. /* %D0 now available for calculations */',
cmp_attr => 'return 1;',
},
CopyB => {
- op_flags => "F|H",
state => "pinned",
attr => "unsigned size",
attr_type => "arm_CopyB_attr_t",
},
FrameAddr => {
- op_flags => "c",
- irn_flags => "R",
- attr => "ir_entity *entity",
+ op_flags => [ "constlike" ],
+ irn_flags => [ "rematerializable" ],
+ attr => "ir_entity *entity, int symconst_offset",
reg_req => { in => [ "gp" ], out => [ "gp" ] },
ins => [ "base" ],
attr_type => "arm_SymConst_attr_t",
},
SymConst => {
- op_flags => "c",
- irn_flags => "R",
- attr => "ir_entity *entity",
+ op_flags => [ "constlike" ],
+ irn_flags => [ "rematerializable" ],
+ attr => "ir_entity *entity, int symconst_offset",
reg_req => { out => [ "gp" ] },
attr_type => "arm_SymConst_attr_t",
mode => $mode_gp,
},
Cmp => {
- irn_flags => "R|F",
+ irn_flags => [ "rematerializable", "modify_flags" ],
emit => '. cmp %S0, %SO',
mode => $mode_flags,
attr_type => "arm_cmp_attr_t",
},
Tst => {
- irn_flags => "R|F",
+ irn_flags => [ "rematerializable", "modify_flags" ],
emit => '. tst %S0, %SO',
mode => $mode_flags,
attr_type => "arm_cmp_attr_t",
},
B => {
- op_flags => "L|X|Y",
+ op_flags => [ "labeled", "cfopcode", "forking" ],
state => "pinned",
mode => "mode_T",
reg_req => { in => [ "flags" ], out => [ "none", "none" ] },
- attr => "int proj_num",
+ attr => "ir_relation relation",
attr_type => "arm_CondJmp_attr_t",
- init_attr => "\tset_arm_CondJmp_proj_num(res, proj_num);",
+ init_attr => "\tset_arm_CondJmp_relation(res, relation);",
},
Jmp => {
state => "pinned",
- op_flags => "X",
- irn_flags => "J",
+ op_flags => [ "cfopcode" ],
+ irn_flags => [ "simple_jump" ],
reg_req => { out => [ "none" ] },
mode => "mode_X",
},
SwitchJmp => {
- op_flags => "L|X|Y",
+ op_flags => [ "labeled", "cfopcode", "forking" ],
state => "pinned",
mode => "mode_T",
attr => "int n_projs, long def_proj_num",
init_attr => "\tset_arm_SwitchJmp_n_projs(res, n_projs);\n".
- "\tset_arm_SwitchJmp_default_proj_num(res, def_proj_num);",
+ "\tset_arm_SwitchJmp_default_proj_num(res, def_proj_num);\n".
+ "\tinfo->out_infos = NULL;",
reg_req => { in => [ "gp" ], out => [ "none" ] },
attr_type => "arm_SwitchJmp_attr_t",
},
Ldr => {
- op_flags => "L|F",
+ op_flags => [ "labeled" ],
state => "exc_pinned",
ins => [ "ptr", "mem" ],
outs => [ "res", "M" ],
},
Str => {
- op_flags => "L|F",
+ op_flags => [ "labeled" ],
state => "exc_pinned",
ins => [ "ptr", "val", "mem" ],
- outs => [ "mem" ],
+ outs => [ "M" ],
reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
emit => '. str%SM %S1, [%S0, #%O]',
mode => "mode_M",
},
StoreStackM4Inc => {
- op_flags => "L|F",
- irn_flags => "R",
+ op_flags => [ "labeled" ],
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "sp", "gp", "gp", "gp", "gp", "none" ], out => [ "sp:I|S", "none" ] },
emit => '. stmfd %S0!, {%S1, %S2, %S3, %S4}',
},
LoadStackM3Epilogue => {
- op_flags => "L|F",
- irn_flags => "R",
+ op_flags => [ "labeled" ],
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "sp", "none" ], out => [ "r11:I", "sp:I|S", "pc:I", "none" ] },
emit => '. ldmfd %S0, {%D0, %D1, %D2}',
-fpaAdf => {
- irn_flags => "R",
- reg_req => { in => [ "fpa", "fpa" ], out => [ "fpa" ] },
- emit => '. adf%M %D0, %S0, %S1',
-},
-
-fpaMuf => {
- irn_flags => "R",
- reg_req => { in => [ "fpa", "fpa" ], out => [ "fpa" ] },
- emit =>'. muf%M %D0, %S0, %S1',
-},
-
-fpaFml => {
- irn_flags => "R",
+Adf => {
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "fpa", "fpa" ], out => [ "fpa" ] },
- emit =>'. fml%M %D0, %S0, %S1',
-},
-
-fpaMax => {
- irn_flags => "R",
- reg_req => { in => [ "fpa", "fpa" ], out => [ "fpa" ] },
- emit =>'. fmax %S0, %S1, %D0',
-},
-
-fpaMin => {
- irn_flags => "R",
- reg_req => { in => [ "fpa", "fpa" ], out => [ "fpa" ] },
- emit =>'. fmin %S0, %S1, %D0',
-},
-
-fpaSuf => {
- irn_flags => "R",
- reg_req => { in => [ "fpa", "fpa" ], out => [ "fpa" ] },
- emit => '. suf%M %D0, %S0, %S1'
+ emit => '. adf%AM %D0, %S0, %S1',
+ attr_type => "arm_farith_attr_t",
+ attr => "ir_mode *op_mode",
+ mode => $mode_fp,
},
-fpaRsf => {
- irn_flags => "R",
+Muf => {
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "fpa", "fpa" ], out => [ "fpa" ] },
- emit => '. rsf%M %D0, %S0, %S1'
-},
-
-fpaDvf => {
+ emit =>'. muf%AM %D0, %S0, %S1',
+ attr_type => "arm_farith_attr_t",
attr => "ir_mode *op_mode",
- init_attr => "attr->op_mode = op_mode;",
- reg_req => { in => [ "fpa", "fpa" ], out => [ "fpa", "none" ] },
- emit =>'. dvf%M %D0, %S0, %S1',
- outs => [ "res", "M" ],
+ mode => $mode_fp,
},
-fpaRdf => {
+Suf => {
+ irn_flags => [ "rematerializable" ],
+ reg_req => { in => [ "fpa", "fpa" ], out => [ "fpa" ] },
+ emit => '. suf%AM %D0, %S0, %S1',
+ attr_type => "arm_farith_attr_t",
attr => "ir_mode *op_mode",
- init_attr => "attr->op_mode = op_mode;",
- reg_req => { in => [ "fpa", "fpa" ], out => [ "fpa", "none" ] },
- emit =>'. rdf%M %D0, %S0, %S1',
- outs => [ "res", "M" ],
+ mode => $mode_fp,
},
-fpaFdv => {
- attr => "ir_mode *op_mode",
- init_attr => "attr->op_mode = op_mode;",
+Dvf => {
reg_req => { in => [ "fpa", "fpa" ], out => [ "fpa", "none" ] },
- emit =>'. fdv%M %D0, %S0, %S1',
+ emit =>'. dvf%AM %D0, %S0, %S1',
outs => [ "res", "M" ],
-},
-
-fpaFrd => {
+ attr_type => "arm_farith_attr_t",
attr => "ir_mode *op_mode",
- init_attr => "attr->op_mode = op_mode;",
- reg_req => { in => [ "fpa", "fpa" ], out => [ "fpa", "none" ] },
- emit =>'. frd%M %D0, %S0, %S1',
- outs => [ "res", "M" ],
-},
-
-fpaMvf => {
- irn_flags => "R",
- reg_req => { in => [ "fpa" ], out => [ "fpa" ] },
- emit => '. mvf%M %S0, %D0',
-},
-
-fpaMnf => {
- irn_flags => "R",
- reg_req => { in => [ "fpa" ], out => [ "fpa" ] },
- emit => '. mnf%M %S0, %D0',
+ mode => $mode_fp,
},
-fpaAbs => {
- irn_flags => "R",
+Mvf => {
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "fpa" ], out => [ "fpa" ] },
- emit => '. abs%M %D0, %S0',
-},
-
-fpaFlt => {
- irn_flags => "R",
- reg_req => { in => ["gp"], out => [ "fpa" ] },
- emit => '. flt%M %D0, %S0',
-},
-
-fpaFix => {
- irn_flags => "R",
- reg_req => { in => ["fpa"], out => [ "gp" ] },
- emit => '. fix %D0, %S0',
-},
-
-fpaCmfBra => {
- op_flags => "L|X|Y",
- state => "pinned",
- mode => "mode_T",
- attr => "int proj_num",
- init_attr => "\tset_arm_CondJmp_proj_num(res, proj_num);",
- reg_req => { in => [ "fpa", "fpa" ], out => [ "none", "none"] },
- attr_type => "arm_CondJmp_attr_t",
-},
-
-fpaCnfBra => {
- op_flags => "L|X|Y",
- state => "pinned",
- mode => "mode_T",
- attr => "int proj_num",
- init_attr => "\tset_arm_CondJmp_proj_num(res, proj_num);",
- reg_req => { in => [ "fpa", "fpa" ], out => [ "none", "none"] },
- attr_type => "arm_CondJmp_attr_t",
+ emit => '. mvf%AM %S0, %D0',
+ attr_type => "arm_farith_attr_t",
+ attr => "ir_mode *op_mode",
+ mode => $mode_fp,
},
-fpaCmfeBra => {
- op_flags => "L|X|Y",
- state => "pinned",
- mode => "mode_T",
- attr => "int proj_num",
- init_attr => "\tset_arm_CondJmp_proj_num(res, proj_num);",
- reg_req => { in => [ "fpa", "fpa" ], out => [ "none", "none"] },
- attr_type => "arm_CondJmp_attr_t",
+FltX => {
+ irn_flags => [ "rematerializable" ],
+ reg_req => { in => [ "gp" ], out => [ "fpa" ] },
+ emit => '. flt%AM %D0, %S0',
+ attr_type => "arm_farith_attr_t",
+ attr => "ir_mode *op_mode",
+ mode => $mode_fp,
},
-fpaCnfeBra => {
- op_flags => "L|X|Y",
- state => "pinned",
- mode => "mode_T",
- attr => "int proj_num",
- init_attr => "\tset_arm_CondJmp_proj_num(res, proj_num);",
- reg_req => { in => [ "fpa", "fpa" ], out => [ "none", "none"] },
- attr_type => "arm_CondJmp_attr_t",
+Cmfe => {
+ irn_flags => [ "rematerializable", "modify_flags" ],
+ mode => $mode_flags,
+ attr_type => "arm_cmp_attr_t",
+ attr => "bool ins_permuted",
+ init_attr => "init_arm_cmp_attr(res, ins_permuted, false);",
+ reg_req => { in => [ "fpa", "fpa" ], out => [ "flags" ] },
+ emit => '. cmfe %S0, %S1',
},
-fpaLdf => {
- op_flags => "L|F",
- irn_flags => "R",
+Ldf => {
+ op_flags => [ "labeled" ],
state => "exc_pinned",
- attr => "ir_mode *op_mode",
- init_attr => "attr->op_mode = op_mode;",
- reg_req => { in => [ "gp", "none" ], out => [ "fpa", "none" ] },
- emit => '. ldf%M %D0, [%S0]',
+ ins => [ "ptr", "mem" ],
outs => [ "res", "M" ],
+ reg_req => { in => [ "gp", "none" ], out => [ "fpa", "none" ] },
+ emit => '. ldf%FM %D0, [%S0, #%O]',
+ attr_type => "arm_load_store_attr_t",
+ attr => "ir_mode *ls_mode, ir_entity *entity, int entity_sign, long offset, bool is_frame_entity",
},
-fpaStf => {
- op_flags => "L|F",
- irn_flags => "R",
+Stf => {
+ op_flags => [ "labeled" ],
state => "exc_pinned",
- attr => "ir_mode *op_mode",
- init_attr => "attr->op_mode = op_mode;",
- reg_req => { in => [ "gp", "fpa", "none" ], out => [ "none" ] },
- emit => '. stf%M %S1, [%S0]',
+ ins => [ "ptr", "val", "mem" ],
+ outs => [ "M" ],
mode => "mode_M",
+ reg_req => { in => [ "gp", "fpa", "none" ], out => [ "none" ] },
+ emit => '. stf%FM %S1, [%S0, #%O]',
+ attr_type => "arm_load_store_attr_t",
+ attr => "ir_mode *ls_mode, ir_entity *entity, int entity_sign, long offset, bool is_frame_entity",
},
-fpaDbl2GP => {
- op_flags => "L|F",
- irn_flags => "R",
- reg_req => { in => [ "fpa", "none" ], out => [ "gp", "gp", "none" ] },
- outs => [ "low", "high", "M" ],
-},
-
-AddSP => {
- reg_req => { in => [ "sp", "gp", "none" ], out => [ "sp:I|S", "none" ] },
- emit => '. add %D0, %S0, %S1',
- outs => [ "stack", "M" ],
-},
-
-SubSPandCopy => {
- reg_req => { in => [ "sp", "gp", "none" ], out => [ "sp:I|S", "gp", "none" ] },
- ins => [ "stack", "size", "mem" ],
- emit => ". sub %D0, %S0, %S1\n".
- ". mov sp, %D1",
- outs => [ "stack", "addr", "M" ],
-},
-
-LdTls => {
- irn_flags => "R",
- reg_req => { out => [ "gp" ] },
-},
-
-
#
# floating point constants
#
-fpaConst => {
- op_flags => "c",
- irn_flags => "R",
- attr => "tarval *tv",
+fConst => {
+ op_flags => [ "constlike" ],
+ irn_flags => [ "rematerializable" ],
+ attr => "ir_tarval *tv",
init_attr => "attr->tv = tv;",
mode => "get_tarval_mode(tv)",
reg_req => { out => [ "fpa" ] },
- attr_type => "arm_fpaConst_attr_t",
+ attr_type => "arm_fConst_attr_t",
}
); # end of %nodes
projects / libfirm / blobdiff