refactored immediates:

[libfirm] / ir / be / arm / arm_spec.pl

diff --git a/ir/be/arm/arm_spec.pl b/ir/be/arm/arm_spec.pl
index 5a3d2a1..10d956d 100644 (file)
--- a/ir/be/arm/arm_spec.pl
+++ b/ir/be/arm/arm_spec.pl
@@ -128,10 +128,10 @@ $mode_fpa     = "mode_E";
                { "name" => "r9", "type" => 2 },
                { "name" => "r10", "type" => 2 },
                { "name" => "r11", "type" => 2 },
-               { "name" => "r12", "type" => 6 }, # reserved for linker
-               { "name" => "sp", "type" => 6 }, # this is our stack pointer
-               { "name" => "lr", "type" => 3 }, # this is our return address
-               { "name" => "pc", "type" => 6 }, # this is our program counter
+               { "name" => "r12", "type" => 4 | 2 }, # reserved for linker
+               { "name" => "sp", "type" => 4 | 2 }, # this is our stack pointer
+               { "name" => "lr", "type" => 2 | 1 }, # this is our return address
+               { "name" => "pc", "type" => 4 | 2 }, # this is our program counter
                { name => "gp_UKNWN", type => 4 | 8 | 16 },  # we need a dummy register for Unknown nodes
                { "mode" => $mode_gp }
        ],
@@ -150,18 +150,18 @@ $mode_fpa     = "mode_E";
 ); # %reg_classes
 
 %emit_templates = (
-       M  => "${arch}_emit_mode(env, node);",
-       X  => "${arch}_emit_shift(env, node);",
-       S0 => "${arch}_emit_source_register(env, node, 0);",
-       S1 => "${arch}_emit_source_register(env, node, 1);",
-       S2 => "${arch}_emit_source_register(env, node, 2);",
-       S3 => "${arch}_emit_source_register(env, node, 3);",
-       S4 => "${arch}_emit_source_register(env, node, 4);",
-       D0 => "${arch}_emit_dest_register(env, node, 0);",
-       D1 => "${arch}_emit_dest_register(env, node, 1);",
-       D2 => "${arch}_emit_dest_register(env, node, 2);",
-       C  => "${arch}_emit_immediate(env, node);",
-       O  => "${arch}_emit_offset(env, mode);",
+       M  => "${arch}_emit_mode(node);",
+       X  => "${arch}_emit_shift(node);",
+       S0 => "${arch}_emit_source_register(node, 0);",
+       S1 => "${arch}_emit_source_register(node, 1);",
+       S2 => "${arch}_emit_source_register(node, 2);",
+       S3 => "${arch}_emit_source_register(node, 3);",
+       S4 => "${arch}_emit_source_register(node, 4);",
+       D0 => "${arch}_emit_dest_register(node, 0);",
+       D1 => "${arch}_emit_dest_register(node, 1);",
+       D2 => "${arch}_emit_dest_register(node, 2);",
+       C  => "${arch}_emit_immediate(node);",
+       O  => "${arch}_emit_offset(mode);",
 );
 
 #--------------------------------------------------#
@@ -179,10 +179,11 @@ $default_attr_type = "arm_attr_t";
 $default_copy_attr = "arm_copy_attr";
 
 %init_attr = (
-       arm_attr_t           => "\tinit_arm_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);",
-       arm_SymConst_attr_t  => "\tinit_arm_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);",
-       arm_CondJmp_attr_t   => "\tinit_arm_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);",
-       arm_SwitchJmp_attr_t => "\tinit_arm_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res, latency);",
+       arm_attr_t           => "\tinit_arm_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res);",
+       arm_SymConst_attr_t  => "\tinit_arm_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res);",
+       arm_CondJmp_attr_t   => "\tinit_arm_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res);",
+       arm_SwitchJmp_attr_t => "\tinit_arm_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res);",
+       arm_fpaConst_attr_t  => "\tinit_arm_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res);",
 );
 
 %compare_attr = (
@@ -190,6 +191,7 @@ $default_copy_attr = "arm_copy_attr";
        arm_SymConst_attr_t  => "cmp_attr_arm_SymConst",
        arm_CondJmp_attr_t   => "cmp_attr_arm_CondJmp",
        arm_SwitchJmp_attr_t => "cmp_attr_arm_SwitchJmp",
+       arm_fpaConst_attr_t  => "cmp_attr_arm_fpaConst",
 );
 
 #%operands = (
@@ -258,9 +260,9 @@ Add => {
        op_flags  => "C",
        irn_flags => "R",
        comment   => "construct Add: Add(a, b) = Add(b, a) = a + b",
-       attr      => "arm_shift_modifier mod, tarval *shf",
-       init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
-       cmp_attr  => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
+       attr      => "arm_shift_modifier mod, long shf",
+       init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
+       cmp_attr  => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
        reg_req   => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
        emit      => '. add %D0, %S0, %S1%X'
 },
@@ -268,9 +270,9 @@ Add => {
 Add_i => {
        irn_flags => "R",
        comment   => "construct Add: Add(a, const) = Add(const, a) = a + const",
-       attr      => "tarval *tv",
-       init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
-       cmp_attr  => 'return attr_a->value != attr_b->value;',
+       attr      => "long imm",
+       init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
+       cmp_attr  => 'return attr_a->imm_value != attr_b->imm_value;',
        reg_req   => { "in" => [ "gp" ], "out" => [ "gp" ] },
        emit      => '. add %D0, %S0, %C'
 },
@@ -313,9 +315,9 @@ And => {
        op_flags  => "C",
        irn_flags => "R",
        comment   => "construct And: And(a, b) = And(b, a) = a AND b",
-       attr      => "arm_shift_modifier mod, tarval *shf",
-       init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
-       cmp_attr  => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
+       attr      => "arm_shift_modifier mod, long shf",
+       init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
+       cmp_attr  => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
        reg_req   => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
        emit      => '. and %D0, %S0, %S1%X'
 },
@@ -323,20 +325,20 @@ And => {
 And_i => {
        irn_flags => "R",
        comment   => "construct And: And(a, const) = And(const, a) = a AND const",
-       attr      => "tarval *tv",
-       init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
+       attr      => "long imm",
+       init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
        reg_req   => { "in" => [ "gp" ], "out" => [ "gp" ] },
        emit      => '. and %D0, %S0, %C',
-       cmp_attr  => 'return attr_a->value != attr_b->value;'
+       cmp_attr  => 'return attr_a->imm_value != attr_b->imm_value;'
 },
 
 Or => {
        op_flags  => "C",
        irn_flags => "R",
        comment   => "construct Or: Or(a, b) = Or(b, a) = a OR b",
-       attr      => "arm_shift_modifier mod, tarval *shf",
-       init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
-       cmp_attr  => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
+       attr      => "arm_shift_modifier mod, long shf",
+       init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
+       cmp_attr  => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
        reg_req   => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
        emit      => '. orr %D0, %S0, %S1%X'
 },
@@ -344,10 +346,10 @@ Or => {
 Or_i => {
        irn_flags => "R",
        comment   => "construct Or: Or(a, const) = Or(const, a) = a OR const",
-       attr      => "tarval *tv",
-       init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
+       attr      => "long imm",
+       init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
        reg_req   => { "in" => [ "gp" ], "out" => [ "gp" ] },
-       cmp_attr  => 'return attr_a->value != attr_b->value;',
+       cmp_attr  => 'return attr_a->imm_value != attr_b->imm_value;',
        emit      => '. orr %D0, %S0, %C'
 },
 
@@ -355,9 +357,9 @@ Eor => {
        op_flags  => "C",
        irn_flags => "R",
        comment   => "construct Eor: Eor(a, b) = Eor(b, a) = a EOR b",
-       attr      => "arm_shift_modifier mod, tarval *shf",
-       init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
-       cmp_attr  => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
+       attr      => "arm_shift_modifier mod, long shf",
+       init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
+       cmp_attr  => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
        reg_req   => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
        emit      => '. eor %D0, %S0, %S1%X'
 },
@@ -365,10 +367,10 @@ Eor => {
 Eor_i => {
        irn_flags => "R",
        comment   => "construct Eor: Eor(a, const) = Eor(const, a) = a EOR const",
-       attr      => "tarval *tv",
-       init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
+       attr      => "long imm",
+       init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
        reg_req   => { "in" => [ "gp" ], "out" => [ "gp" ] },
-       cmp_attr  => 'return attr_a->value != attr_b->value;',
+       cmp_attr  => 'return attr_a->imm_value != attr_b->imm_value;',
        emit      => '. eor %D0, %S0, %C'
 },
 
@@ -377,9 +379,9 @@ Eor_i => {
 Bic => {
        irn_flags => "R",
        comment   => "construct Bic: Bic(a, b) = a AND ~b",
-       attr      => "arm_shift_modifier mod, tarval *shf",
-       init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
-       cmp_attr  => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
+       attr      => "arm_shift_modifier mod, long shf",
+       init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
+       cmp_attr  => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
        reg_req   => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
        emit      => '. bic %D0, %S0, %S1%X'
 },
@@ -387,19 +389,19 @@ Bic => {
 Bic_i => {
        irn_flags => "R",
        comment   => "construct Bic: Bic(a, const) = a AND ~const",
-       attr      => "tarval *tv",
-       init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
+       attr      => "long imm",
+       init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
        reg_req   => { "in" => [ "gp" ], "out" => [ "gp" ] },
        emit      => '. bic %D0, %S0, %C',
-       cmp_attr  => 'return attr_a->value != attr_b->value;'
+       cmp_attr  => 'return attr_a->imm_value != attr_b->imm_value;'
 },
 
 Sub => {
        irn_flags => "R",
        comment   => "construct Sub: Sub(a, b) = a - b",
-       attr      => "arm_shift_modifier mod, tarval *shf",
-       init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
-       cmp_attr  => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
+       attr      => "arm_shift_modifier mod, long shf",
+       init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
+       cmp_attr  => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
        reg_req   => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
        emit      => '. sub %D0, %S0, %S1%X'
 },
@@ -407,9 +409,9 @@ Sub => {
 Sub_i => {
        irn_flags => "R",
        comment   => "construct Sub: Sub(a, const) = a - const",
-       attr      => "tarval *tv",
-       init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
-       cmp_attr  => 'return attr_a->value != attr_b->value;',
+       attr      => "long imm",
+       init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
+       cmp_attr  => 'return attr_a->imm_value != attr_b->imm_value;',
        reg_req   => { "in" => [ "gp" ], "out" => [ "gp" ] },
        emit      => '. sub %D0, %S0, %C',
 },
@@ -417,9 +419,9 @@ Sub_i => {
 Rsb => {
        irn_flags => "R",
        comment   => "construct Rsb: Rsb(a, b) = b - a",
-       attr      => "arm_shift_modifier mod, tarval *shf",
-       init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
-       cmp_attr  => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
+       attr      => "arm_shift_modifier mod, long shf",
+       init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
+       cmp_attr  => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
        reg_req   => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
        emit      => '. rsb %D0, %S0, %S1%X'
 },
@@ -427,11 +429,11 @@ Rsb => {
 Rsb_i => {
        irn_flags => "R",
        comment   => "construct Rsb: Rsb(a, const) = const - a",
-       attr      => "tarval *tv",
-       init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
+       attr      => "long imm",
+       init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
        reg_req   => { "in" => [ "gp" ], "out" => [ "gp" ] },
        emit      => '. rsb %D0, %S0, %C',
-       cmp_attr  => 'return attr_a->value != attr_b->value;'
+       cmp_attr  => 'return attr_a->imm_value != attr_b->imm_value;'
 },
 
 Shl => {
@@ -480,9 +482,9 @@ Shrs => {
 Mov => {
        irn_flags => "R",
        comment   => "construct Mov: a = b",
-       attr      => "arm_shift_modifier mod, tarval *shf",
-       init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
-       cmp_attr  => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
+       attr      => "arm_shift_modifier mod, long shf",
+       init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
+       cmp_attr  => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
        reg_req   => { "in" => [ "gp" ], "out" => [ "gp" ] },
        emit      => '. mov %D0, %S0%X'
 },
@@ -490,19 +492,19 @@ Mov => {
 Mov_i => {
        irn_flags => "R",
        comment   => "represents an integer constant",
-       attr      => "tarval *tv",
-       init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
+       attr      => "long imm",
+       init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
        reg_req   => { "out" => [ "gp" ] },
        emit      => '. mov %D0, %C',
-       cmp_attr  => 'return attr_a->value != attr_b->value;'
+       cmp_attr  => 'return attr_a->imm_value != attr_b->imm_value;'
 },
 
 Mvn => {
        irn_flags => "R",
        comment   => "construct Not: Not(a) = !a",
-       attr      => "arm_shift_modifier mod, tarval *shf",
-       init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
-       cmp_attr  => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
+       attr      => "arm_shift_modifier mod, long shf",
+       init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
+       cmp_attr  => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
        reg_req   => { "in" => [ "gp" ], "out" => [ "gp" ] },
        emit      => '. mvn %D0, %S0%X'
 },
@@ -510,9 +512,9 @@ Mvn => {
 Mvn_i => {
        irn_flags => "R",
        comment   => "represents a negated integer constant",
-       attr      => "tarval *tv",
-       init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
-       cmp_attr  => 'return attr_a->value != attr_b->value;',
+       attr      => "long imm",
+       init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
+       cmp_attr  => 'return attr_a->imm_value != attr_b->imm_value;',
        reg_req   => { "out" => [ "gp" ] },
        emit      => '. mvn %D0, %C',
 },
@@ -549,8 +551,9 @@ CopyB => {
        op_flags  => "F|H",
        state     => "pinned",
        comment   => "implements a memcopy: CopyB(dst, src, size, mem) == memcpy(dst, src, size)",
-       attr      => "tarval *tv",
-       init_attr => 'attr->value = tv;',
+       attr      => "long imm",
+       init_attr => 'attr->imm_value = imm;',
+       cmp_attr  => 'return attr_a->imm_value != attr_b->imm_value;',
        reg_req   => { "in" => [ "!sp", "!sp", "gp", "gp", "gp", "none" ], "out" => [ "none" ] },
        outs      => [ "M" ],
 },
@@ -704,7 +707,7 @@ LoadStackM3 => {
 
 # commutative operations
 
-fpaAdd => {
+fpaAdf => {
        op_flags  => "C",
        irn_flags => "R",
        comment   => "construct FPA Add: Add(a, b) = Add(b, a) = a + b",
@@ -712,15 +715,39 @@ fpaAdd => {
        emit      => '. adf%M %D0, %S0, %S1',
 },
 
-fpaMul => {
+fpaAdf_i => {
+       op_flags  => "C",
+       irn_flags => "R",
+       comment   => "construct FPA Add: Add(a, b) = Add(b, a) = a + b",
+       attr      => "long imm",
+       init_attr => 'ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
+       cmp_attr  => 'return attr_a->imm_value != attr_b->imm_value;',
+       reg_req   => { "in" => [ "fpa" ], "out" => [ "fpa" ] },
+       emit      => '. adf%M %D0, %S0, %C',
+},
+
+fpaMuf => {
        op_flags  => "C",
+       irn_flags => "R",
        comment   => "construct FPA Mul: Mul(a, b) = Mul(b, a) = a * b",
        reg_req   => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
        emit      =>'. muf%M %D0, %S0, %S1',
 },
 
-fpaFMul => {
+fpaMuf_i => {
+       op_flags  => "C",
+       irn_flags => "R",
+       comment   => "construct FPA Mul: Mul(a, b) = Mul(b, a) = a * b",
+       attr      => "long imm",
+       init_attr => 'ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
+       cmp_attr  => 'return attr_a->imm_value != attr_b->imm_value;',
+       reg_req   => { "in" => [ "fpa" ], "out" => [ "fpa" ] },
+       emit      => '. muf%M %D0, %S0, %C',
+},
+
+fpaFml => {
        op_flags  => "C",
+       irn_flags => "R",
        comment   => "construct FPA Fast Mul: Mul(a, b) = Mul(b, a) = a * b",
        reg_req   => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
        emit      =>'. fml%M %D0, %S0, %S1',
@@ -744,21 +771,41 @@ fpaMin => {
 
 # not commutative operations
 
-fpaSub => {
+fpaSuf => {
        irn_flags => "R",
        comment   => "construct FPA Sub: Sub(a, b) = a - b",
        reg_req   => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
        emit      => '. suf%M %D0, %S0, %S1'
 },
 
-fpaRsb => {
+fpaSuf_i => {
+       irn_flags => "R",
+       comment   => "construct FPA Sub: Sub(a, b) = a - b",
+       attr      => "long imm",
+       init_attr => 'ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
+       cmp_attr  => 'return attr_a->imm_value != attr_b->imm_value;',
+       reg_req   => { "in" => [ "fpa" ], "out" => [ "fpa" ] },
+       emit      => '. suf%M %D0, %S0, %C'
+},
+
+fpaRsf => {
        irn_flags => "R",
        comment   => "construct FPA reverse Sub: Sub(a, b) = b - a",
        reg_req   => { "in" => [ "fpa", "fpa" ], "out" => [ "fpa" ] },
        emit      => '. rsf%M %D0, %S0, %S1'
 },
 
-fpaDiv => {
+fpaRsf_i => {
+       irn_flags => "R",
+       comment   => "construct FPA reverse Sub: Sub(a, b) = b - a",
+       attr      => "long imm",
+       init_attr => 'ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
+       cmp_attr  => 'return attr_a->imm_value != attr_b->imm_value;',
+       reg_req   => { "in" => [ "fpa" ], "out" => [ "fpa" ] },
+       emit      => '. rsf%M %D0, %S0, %C'
+},
+
+fpaDvf => {
        comment   => "construct FPA Div: Div(a, b) = a / b",
        attr      => "ir_mode *op_mode",
        init_attr => "attr->op_mode = op_mode;",
@@ -767,7 +814,17 @@ fpaDiv => {
        outs      => [ "res", "M" ],
 },
 
-fpaRdv => {
+fpaDvf_i => {
+       comment   => "construct FPA Div: Div(a, b) = a / b",
+       attr      => "ir_mode *op_mode, long imm",
+       init_attr => 'attr->op_mode = op_mode; ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
+       cmp_attr  => 'return attr_a->imm_value != attr_b->imm_value;',
+       reg_req   => { "in" => [ "fpa" ], "out" => [ "fpa", "none" ] },
+       emit      =>'. dvf%M %D0, %S0, %C',
+       outs      => [ "res", "M" ],
+},
+
+fpaRdf => {
        comment   => "construct FPA reverse Div: Div(a, b) = b / a",
        attr      => "ir_mode *op_mode",
        init_attr => "attr->op_mode = op_mode;",
@@ -776,7 +833,17 @@ fpaRdv => {
        outs      => [ "res", "M" ],
 },
 
-fpaFDiv => {
+fpaRdf_i => {
+       comment   => "construct FPA reverse Div: Div(a, b) = b / a",
+       attr      => "ir_mode *op_mode, long imm",
+       init_attr => 'attr->op_mode = op_mode; ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
+       cmp_attr  => 'return attr_a->imm_value != attr_b->imm_value;',
+       reg_req   => { "in" => [ "fpa" ], "out" => [ "fpa", "none" ] },
+       emit      =>'. rdf%M %D0, %S0, %S1',
+       outs      => [ "res", "M" ],
+},
+
+fpaFdv => {
        comment   => "construct FPA Fast Div: Div(a, b) = a / b",
        attr      => "ir_mode *op_mode",
        init_attr => "attr->op_mode = op_mode;",
@@ -785,7 +852,17 @@ fpaFDiv => {
        outs      => [ "res", "M" ],
 },
 
-fpaFRdv => {
+fpaFdv_i => {
+       comment   => "construct FPA Fast Div: Div(a, b) = a / b",
+       attr      => "ir_mode *op_mode, long imm",
+       init_attr => 'attr->op_mode = op_mode; ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
+       cmp_attr  => 'return attr_a->imm_value != attr_b->imm_value;',
+       reg_req   => { "in" => [ "fpa" ], "out" => [ "fpa", "none" ] },
+       emit      =>'. fdv%M %D0, %S0, %C',
+       outs      => [ "res", "M" ],
+},
+
+fpaFrd => {
        comment   => "construct FPA Fast reverse Div: Div(a, b) = b / a",
        attr      => "ir_mode *op_mode",
        init_attr => "attr->op_mode = op_mode;",
@@ -794,20 +871,50 @@ fpaFRdv => {
        outs      => [ "res", "M" ],
 },
 
-fpaMov => {
+fpaFrd_i => {
+       comment   => "construct FPA Fast reverse Div: Div(a, b) = b / a",
+       attr      => "ir_mode *op_mode, long imm",
+       init_attr => 'attr->op_mode = op_mode; ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
+       cmp_attr  => 'return attr_a->imm_value != attr_b->imm_value;',
+       reg_req   => { "in" => [ "fpa" ], "out" => [ "fpa", "none" ] },
+       emit      =>'. frd%M %D0, %S0, %C',
+       outs      => [ "res", "M" ],
+},
+
+fpaMvf => {
        irn_flags => "R",
        comment   => "construct FPA Move: b = a",
        reg_req   => { "in" => [ "fpa" ], "out" => [ "fpa" ] },
        emit      => '. mvf%M %S0, %D0',
 },
 
-fpaMnv => {
+fpaMvf_i => {
+       irn_flags => "R",
+       comment   => "represents a float constant",
+       attr      => "long imm",
+       init_attr => 'ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
+       reg_req   => { "out" => [ "fpa" ] },
+       emit      => '. mvf %D0, %C',
+       cmp_attr  => 'return attr_a->imm_value != attr_b->imm_value;'
+},
+
+fpaMnf => {
        irn_flags => "R",
        comment   => "construct FPA Move Negated: b = -a",
        reg_req   => { "in" => [ "fpa" ], "out" => [ "fpa" ] },
        emit      => '. mnf%M %S0, %D0',
 },
 
+fpaMnf_i => {
+       irn_flags => "R",
+       comment   => "represents a float constant",
+       attr      => "long imm",
+       init_attr => 'ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
+       reg_req   => { "out" => [ "fpa" ] },
+       emit      => '. mnf %D0, %C',
+       cmp_attr  => 'return attr_a->imm_value != attr_b->imm_value;'
+},
+
 fpaAbs => {
        irn_flags => "R",
        comment   => "construct FPA Absolute value: fAbsd(a) = |a|",
@@ -914,15 +1021,17 @@ AddSP => {
        comment   => "construct Add to stack pointer",
        reg_req   => { in => [ "sp", "gp", "none" ], out => [ "in_r1", "none" ] },
        emit      => '. add %D0, %S0, %S1',
-       outs      => [ "stack:S", "M" ],
+       outs      => [ "stack:I|S", "M" ],
 },
 
 SubSP => {
-       irn_flags => "I",
+#irn_flags => "I",
        comment   => "construct Sub from stack pointer",
-       reg_req   => { in => [ "sp", "gp", "none" ], out => [ "in_r1", "none" ] },
-       emit      => '. sub %D0, %S0, %S1',
-       outs      => [ "stack:S", "M" ],
+       reg_req   => { in => [ "sp", "gp", "none" ], out => [ "in_r1", "gp", "none" ] },
+       ins       => [ "stack", "size", "mem" ],
+       emit      => ". sub %D0, %S0, %S1\n".
+                    ". mov sp, %D1",
+       outs      => [ "stack:I|S", "addr", "M" ],
 },
 
 LdTls => {
@@ -940,9 +1049,10 @@ fpaConst => {
        irn_flags => "R",
        comment   => "construct a floating point constant",
        attr      => "tarval *tv",
-       init_attr => "attr->value = tv;",
+       init_attr => "attr->tv = tv;",
        mode      => "get_tarval_mode(tv)",
        reg_req   => { "out" => [ "fpa" ] },
+       attr_type => "arm_fpaConst_attr_t",
 }
 
 #---------------------------------------------------#