-#ifndef _ARM_NODES_ATTR_H_
-#define _ARM_NODES_ATTR_H_
+/*
+ * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
+ *
+ * This file is part of libFirm.
+ *
+ * This file may be distributed and/or modified under the terms of the
+ * GNU General Public License version 2 as published by the Free Software
+ * Foundation and appearing in the file LICENSE.GPL included in the
+ * packaging of this file.
+ *
+ * Licensees holding valid libFirm Professional Edition licenses may use
+ * this file in accordance with the libFirm Commercial License.
+ * Agreement provided with the Software.
+ *
+ * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
+ * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE.
+ */
-#include "../bearch.h"
-#include "../../common/firm_types.h"
+/**
+ * @file
+ * @brief declarations for ARM node attributes
+ * @author Oliver Richter, Tobias Gneist, Michael Beck
+ * @version $Id$
+ */
+#ifndef FIRM_BE_ARM_ARM_NODES_ATTR_H
+#define FIRM_BE_ARM_ARM_NODES_ATTR_H
-/** A register requirement. */
-typedef struct _arm_register_req_t {
- const arch_register_req_t req;
- int same_pos; /**< in case of "should be same" we need to remember the pos to get the irn */
- int different_pos; /**< in case of "should be different" we need to remember the pos to get the irn */
-} arm_register_req_t;
+#include "firm_types.h"
+#include "irnode_t.h"
+#include "../bearch_t.h"
/**
* Possible ARM register shift types.
ARM_SHF_LSL = 3, /**< logical shift left */
ARM_SHF_LSR = 4, /**< logical shift right */
ARM_SHF_ROR = 5, /**< rotate right */
- ARM_SHF_RRX = 6, /**< rotate with sign extend */
+ ARM_SHF_RRX = 6, /**< rotate right through carry bits */
} arm_shift_modifier;
/** True, if the modifier implies a shift argument */
/** set the shift modifier to flags */
#define ARM_SET_SHF_MOD(attr, mod) ((attr)->instr_fl = (((attr)->instr_fl & ~7) | (mod)))
+/** fpa immediate bit */
+#define ARM_FPA_IMM (1 << 3) /**< fpa floating point immediate */
+
+#define ARM_GET_FPA_IMM(attr) ((attr)->instr_fl & ARM_FPA_IMM)
+#define ARM_SET_FPA_IMM(attr) ((attr)->instr_fl |= ARM_FPA_IMM)
+#define ARM_CLR_FPA_IMM(attr) ((attr)->instr_fl &= ~ARM_FPA_IMM)
/**
* Possible ARM condition codes.
ARM_COND_NE = 1, /**< Not Equal, Z clear */
ARM_COND_CS = 2, /**< Carry set, unsigned >=, C set */
ARM_COND_CC = 3, /**< Carry clear, unsigned <, C clear */
- ARM_COND_MI = 4, /**< Minus/Negativ, N set */
- ARM_COND_PL = 5, /**< Plus/Positiv or Zero, N clear */
+ ARM_COND_MI = 4, /**< Minus/Negative, N set */
+ ARM_COND_PL = 5, /**< Plus/Positive or Zero, N clear */
ARM_COND_VS = 6, /**< Overflow, V set */
ARM_COND_VC = 7, /**< No overflow, V clear */
ARM_COND_HI = 8, /**< unsigned >, C set and Z clear */
} arm_condition;
/** Get the condition code from flags */
-#define ARM_GET_COND(attr) (((attr)->instr_fl >> 3) & 15)
+#define ARM_GET_COND(attr) (((attr)->instr_fl >> 4) & 15)
/** Set the condition code to flags */
-#define ARM_SET_COND(attr, code) ((attr)->instr_fl = (((attr)->instr_fl & ~(15 << 3)) | ((code) << 3)))
-
+#define ARM_SET_COND(attr, code) ((attr)->instr_fl = (((attr)->instr_fl & ~(15 << 4)) | ((code) << 4)))
+
+/** Encoding for fpa immediates */
+enum fpa_immediates {
+ fpa_null = 0,
+ fpa_one,
+ fpa_two,
+ fpa_three,
+ fpa_four,
+ fpa_five,
+ fpa_ten,
+ fpa_half,
+ fpa_max
+};
+
+/** Generic ARM node attributes. */
typedef struct _arm_attr_t {
- arch_irn_flags_t flags; /**< indicating if spillable, rematerializeable ... etc. */
- int n_res; /**< number of results for this node */
+ except_attr exc; /**< the exception attribute. MUST be the first one. */
+ arch_irn_flags_t flags; /**< indicating if spillable, rematerializeable ... etc. */
- const arm_register_req_t **in_req; /**< register requirements for arguments */
- const arm_register_req_t **out_req; /**< register requirements for results */
+ const arch_register_req_t **in_req; /**< register requirements for arguments */
+ const arch_register_req_t **out_req; /**< register requirements for results */
- const arch_register_t **slots; /**< register slots for assigned registers */
+ ir_mode *op_mode; /**< operation mode if different from node's mode */
+ unsigned instr_fl; /**< condition code, shift modifier */
+ long imm_value; /**< immediate */
+ int *out_flags; /**< flags for each produced value */
- ir_mode *op_mode; /**< operation mode */
- unsigned instr_fl; /**< condition code, shift modifier */
- tarval *value; /**< immediate */
- const char *symconst_label;
- int proj_num;
- int n_projs;
- long default_proj_num;
+ const arch_register_t **slots; /**< register slots for assigned registers */
} arm_attr_t;
+/** Attributes for a SymConst */
+typedef struct _arm_SymConst_attr_t {
+ arm_attr_t attr; /**< base attributes */
+ ident *symconst_id; /**< for SymConsts: its ident */
+} arm_SymConst_attr_t;
+
+/** Attributes for a CondJmp */
+typedef struct _arm_CondJmp_attr_t {
+ arm_attr_t attr; /**< base attributes */
+ int proj_num;
+} arm_CondJmp_attr_t;
+
+/** Attributes for a SwitchJmp */
+typedef struct _arm_SwitchJmp_attr_t {
+ arm_attr_t attr; /**< base attributes */
+ int n_projs;
+ long default_proj_num;
+} arm_SwitchJmp_attr_t;
+
+/** Attributes for a fpaConst */
+typedef struct _arm_fpaConst_attr_t {
+ arm_attr_t attr; /**< base attributes */
+ tarval *tv; /**< the tarval representing the FP const */
+} arm_fpaConst_attr_t;
+
/**
* Returns the shift modifier string.
*/
const char *arm_shf_mod_name(arm_shift_modifier mod);
-#endif /* _ARM_NODES_ATTR_H_ */
+/**
+ * Return the fpa immediate from the encoding.
+ */
+const char *arm_get_fpa_imm_name(long imm_value);
+
+#define CAST_ARM_ATTR(type,ptr) ((type *)(ptr))
+#define CONST_CAST_ARM_ATTR(type,ptr) ((const type *)(ptr))
+
+#endif
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