added ir/opt include

[libfirm] / ir / be / arm / arm_new_nodes.c

diff --git a/ir/be/arm/arm_new_nodes.c b/ir/be/arm/arm_new_nodes.c
index c94d296..6074272 100644 (file)
--- a/ir/be/arm/arm_new_nodes.c
+++ b/ir/be/arm/arm_new_nodes.c
@@ -41,7 +41,7 @@
  * Returns the shift modifier string.
  */
 const char *arm_shf_mod_name(arm_shift_modifier mod) {
-  static const char *names[] = { NULL, NULL, "ASR", "LSL", "LSR", "ROR", "RRX" };
+  static const char *names[] = { NULL, NULL, "asr", "lsl", "lsr", "ror", "rrx" };
        return names[mod];
 }
 
@@ -131,7 +131,6 @@ static void dump_reg_req(FILE *F, ir_node *n, const arm_register_req_t **reqs, i
        }
 }
 
-
 /**
  * Dumper interface for dumping arm nodes in vcg.
  * @param n        the node to dump
@@ -139,7 +138,7 @@ static void dump_reg_req(FILE *F, ir_node *n, const arm_register_req_t **reqs, i
  * @param reason   indicates which kind of information should be dumped
  * @return 0 on success or != 0 on failure
  */
-static int dump_node_arm(ir_node *n, FILE *F, dump_reason_t reason) {
+static int arm_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
        ir_mode     *mode = NULL;
        int          bad  = 0;
        int          i;
@@ -500,35 +499,26 @@ arm_shift_modifier get_arm_shift_modifier(ir_node *node) {
 
 /* Set the ARM machine node attributes to default values. */
 void init_arm_attributes(ir_node *node, int flags, const arm_register_req_t ** in_reqs,
-                                                const arm_register_req_t ** out_reqs, int n_res) {
+                                                const arm_register_req_t ** out_reqs, int n_res, unsigned latency) {
        arm_attr_t *attr = get_arm_attr(node);
        attr->in_req           = in_reqs;
        attr->out_req          = out_reqs;
        attr->n_res            = n_res;
        attr->flags            = flags;
-       attr->slots            = xcalloc(n_res, sizeof(attr->slots[0]));
        attr->instr_fl         = (ARM_COND_AL << 3) | ARM_SHF_NONE;
        attr->value            = NULL;
        attr->proj_num         = -42;
        attr->symconst_label   = NULL;
        attr->n_projs          = 0;
        attr->default_proj_num = 0;
+
+       memset((void *)attr->slots, 0, n_res * sizeof(attr->slots[0]));
 }
 
 static int arm_comp_condJmp(arm_attr_t *attr_a, arm_attr_t *attr_b) {
        return 1;
 }
 
-ir_node *arm_new_NoReg_gp(arm_code_gen_t *cg) {
-       return be_abi_get_callee_save_irn(cg->birg->abi, &arm_gp_regs[REG_RXX]);
-}
-
-ir_node *arm_new_NoReg_fp(arm_code_gen_t *cg) {
-       return be_abi_get_callee_save_irn(cg->birg->abi, &arm_fp_regs[REG_FXX]);
-}
-
-
-
 
 /***************************************************************************************
  *                  _                            _                   _
@@ -598,7 +588,7 @@ ir_node *new_r_arm_StoreStackMInc(ir_graph *irg, ir_node *block, ir_node *mem, i
   flags |= arch_irn_flags_rematerializable;   /* op can be easily recalculated */
 
   /* init node attributes */
-  init_arm_attributes(res, flags, _in_req_arm_StoreStackM4Inc, NULL, 0);
+  init_arm_attributes(res, flags, _in_req_arm_StoreStackM4Inc, NULL, 0, 1);
 
   res = optimize_node(res);
   irn_vrfy_irg(res, irg);