/*
- * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
+ * Copyright (C) 1995-2011 University of Karlsruhe. All right reserved.
*
* This file is part of libFirm.
*
* @author Oliver Richter, Tobias Gneist
* @version $Id$
*/
-#ifdef HAVE_CONFIG_H
#include "config.h"
-#endif
#include <stdlib.h>
+#include <stdbool.h>
#include "irprog_t.h"
#include "irgraph_t.h"
#include "ircons_t.h"
#include "iropt_t.h"
#include "irop.h"
-#include "firm_common_t.h"
-#include "irvrfy_t.h"
#include "irprintf.h"
#include "xmalloc.h"
-#include "../bearch_t.h"
+#include "../bearch.h"
#include "arm_nodes_attr.h"
#include "arm_new_nodes.h"
+#include "arm_optimize.h"
#include "../beabi.h"
#include "bearch_arm_t.h"
-/**
- * Returns the shift modifier string.
- */
-const char *arm_shf_mod_name(arm_shift_modifier mod) {
- static const char *names[] = { NULL, NULL, "asr", "lsl", "lsr", "ror", "rrx" };
- return names[mod];
-}
-
-/***********************************************************************************
- * _ _ _ __
- * | | (_) | | / _|
- * __| |_ _ _ __ ___ _ __ ___ _ __ _ _ __ | |_ ___ _ __| |_ __ _ ___ ___
- * / _` | | | | '_ ` _ \| '_ \ / _ \ '__| | | '_ \| __/ _ \ '__| _/ _` |/ __/ _ \
- * | (_| | |_| | | | | | | |_) | __/ | | | | | | || __/ | | || (_| | (_| __/
- * \__,_|\__,_|_| |_| |_| .__/ \___|_| |_|_| |_|\__\___|_| |_| \__,_|\___\___|
- * | |
- * |_|
- ***********************************************************************************/
-
-/**
- * Dumps the register requirements for either in or out.
- */
-static void dump_reg_req(FILE *F, const ir_node *node,
- const arch_register_req_t **reqs, int inout) {
- char *dir = inout ? "out" : "in";
- int max = inout ? get_arm_n_res(node) : get_irn_arity(node);
- char buf[1024];
- int i;
-
- memset(buf, 0, sizeof(buf));
-
- if (reqs) {
- for (i = 0; i < max; i++) {
- fprintf(F, "%sreq #%d =", dir, i);
-
- if (reqs[i]->type == arch_register_req_type_none) {
- fprintf(F, " n/a");
- }
-
- if (reqs[i]->type & arch_register_req_type_normal) {
- fprintf(F, " %s", reqs[i]->cls->name);
- }
-
- if (reqs[i]->type & arch_register_req_type_limited) {
- fprintf(F, " %s",
- arch_register_req_format(buf, sizeof(buf), reqs[i], node));
- }
-
- if (reqs[i]->type & arch_register_req_type_should_be_same) {
- const unsigned other = reqs[i]->other_same;
- int i;
+const char *arm_get_fpa_imm_name(long imm_value)
+{
+ static const char *fpa_imm[] = {
+ "0",
+ "1",
+ "2",
+ "3",
+ "4",
+ "5",
+ "10",
+ "0.5"
+ };
+ return fpa_imm[imm_value];
+}
- ir_fprintf(F, " same as");
- for (i = 0; 1U << i <= other; ++i) {
- if (other & (1U << i)) {
- ir_fprintf(F, " %+F", get_irn_n(node, i));
- }
- }
- }
+static bool arm_has_symconst_attr(const ir_node *node)
+{
+ return is_arm_SymConst(node) || is_arm_FrameAddr(node) || is_arm_Bl(node);
+}
- if (reqs[i]->type & arch_register_req_type_should_be_different) {
- const unsigned other = reqs[i]->other_different;
- int i;
+static bool has_load_store_attr(const ir_node *node)
+{
+ return is_arm_Ldr(node) || is_arm_Str(node) || is_arm_LinkLdrPC(node)
+ || is_arm_Ldf(node) || is_arm_Stf(node);
+}
- ir_fprintf(F, " different from");
- for (i = 0; 1U << i <= other; ++i) {
- if (other & (1U << i)) {
- ir_fprintf(F, " %+F", get_irn_n(node, i));
- }
- }
- }
+static bool has_shifter_operand(const ir_node *node)
+{
+ return is_arm_Add(node) || is_arm_And(node) || is_arm_Or(node)
+ || is_arm_Eor(node) || is_arm_Bic(node) || is_arm_Sub(node)
+ || is_arm_Rsb(node) || is_arm_Mov(node) || is_arm_Mvn(node)
+ || is_arm_Cmp(node) || is_arm_Tst(node) || is_arm_LinkMovPC(node);
+}
- fprintf(F, "\n");
- }
+static bool has_cmp_attr(const ir_node *node)
+{
+ return is_arm_Cmp(node) || is_arm_Tst(node);
+}
- fprintf(F, "\n");
- } else {
- fprintf(F, "%sreq = N/A\n", dir);
- }
+static bool has_farith_attr(const ir_node *node)
+{
+ return is_arm_Adf(node) || is_arm_Muf(node) || is_arm_Suf(node)
+ || is_arm_Dvf(node) || is_arm_Mvf(node) || is_arm_FltX(node);
}
/**
* Dumper interface for dumping arm nodes in vcg.
- * @param n the node to dump
* @param F the output file
+ * @param n the node to dump
* @param reason indicates which kind of information should be dumped
- * @return 0 on success or != 0 on failure
*/
-static int arm_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
- ir_mode *mode = NULL;
- int bad = 0;
- int i;
- arm_attr_t *attr = get_arm_attr(n);
- const arch_register_req_t **reqs;
- const arch_register_t **slots;
- arm_shift_modifier mod;
-
+static void arm_dump_node(FILE *F, ir_node *n, dump_reason_t reason)
+{
switch (reason) {
- case dump_node_opcode_txt:
- fprintf(F, "%s", get_irn_opname(n));
- break;
-
- case dump_node_mode_txt:
- mode = get_irn_mode(n);
-
- if (mode) {
- fprintf(F, "[%s]", get_mode_name(mode));
- }
- else {
- fprintf(F, "[?NOMODE?]");
- }
- break;
-
- case dump_node_nodeattr_txt:
- mod = ARM_GET_SHF_MOD(attr);
- if (ARM_HAS_SHIFT(mod)) {
- fprintf(F, "[%s #%ld]", arm_shf_mod_name(mod), get_tarval_long(attr->value));
- }
- else if (mod == ARM_SHF_IMM) {
- /* immediate */
- fprintf(F, "[#0x%X]", arm_decode_imm_w_shift(attr->value));
- }
- break;
-
- case dump_node_info_txt:
- fprintf(F, "=== arm attr begin ===\n");
-
- /* dump IN requirements */
- if (get_irn_arity(n) > 0) {
- reqs = get_arm_in_req_all(n);
- dump_reg_req(F, n, reqs, 0);
+ case dump_node_opcode_txt:
+ fprintf(F, "%s", get_irn_opname(n));
+
+ if (arm_has_symconst_attr(n)) {
+ const arm_SymConst_attr_t *attr = get_arm_SymConst_attr_const(n);
+ if (attr->entity != NULL) {
+ fputc(' ', F);
+ fputs(get_entity_name(attr->entity), F);
}
-
- /* dump OUT requirements */
- if (ARR_LEN(attr->slots) > 0) {
- reqs = get_arm_out_req_all(n);
- dump_reg_req(F, n, reqs, 1);
- }
-
- /* dump assigned registers */
- slots = get_arm_slots(n);
- if (slots && ARR_LEN(attr->slots) > 0) {
- for (i = 0; i < ARR_LEN(attr->slots); i++) {
- if (slots[i]) {
- fprintf(F, "reg #%d = %s\n", i, slots[i]->name);
- }
- else {
- fprintf(F, "reg #%d = n/a\n", i);
- }
- }
- }
- fprintf(F, "\n");
-
- /* dump n_res */
- fprintf(F, "n_res = %d\n", get_arm_n_res(n));
-
- /* dump flags */
- fprintf(F, "flags =");
- if (attr->flags == arch_irn_flags_none) {
- fprintf(F, " none");
+ }
+ break;
+
+ case dump_node_mode_txt:
+ /* mode isn't relevant in the backend */
+ break;
+
+ case dump_node_nodeattr_txt:
+ /* TODO: dump shift modifiers */
+ break;
+
+ case dump_node_info_txt:
+ arch_dump_reqs_and_registers(F, n);
+
+ if (has_load_store_attr(n)) {
+ const arm_load_store_attr_t *attr
+ = get_arm_load_store_attr_const(n);
+ ir_fprintf(F, "load_store_mode = %+F\n", attr->load_store_mode);
+ ir_fprintf(F, "entity = %+F\n", attr->entity);
+ fprintf(F, "offset = %ld\n", attr->offset);
+ fprintf(F, "is_frame_entity = %s\n",
+ attr->is_frame_entity ? "yes" : "no");
+ fprintf(F, "entity_sign = %s\n",
+ attr->entity_sign ? "yes" : "no");
+ }
+ if (has_shifter_operand(n)) {
+ const arm_shifter_operand_t *attr
+ = get_arm_shifter_operand_attr_const(n);
+ switch (attr->shift_modifier) {
+ case ARM_SHF_REG:
+ break;
+ case ARM_SHF_IMM:
+ fprintf(F, "modifier = imm %d ror %d\n",
+ attr->immediate_value, attr->shift_immediate);
+ break;
+ case ARM_SHF_ASR_IMM:
+ fprintf(F, "modifier = V >>s %d\n", attr->shift_immediate);
+ break;
+ case ARM_SHF_ASR_REG:
+ fprintf(F, "modifier = V >>s R\n");
+ break;
+ case ARM_SHF_LSL_IMM:
+ fprintf(F, "modifier = V << %d\n", attr->shift_immediate);
+ break;
+ case ARM_SHF_LSL_REG:
+ fprintf(F, "modifier = V << R\n");
+ break;
+ case ARM_SHF_LSR_IMM:
+ fprintf(F, "modifier = V >> %d\n", attr->shift_immediate);
+ break;
+ case ARM_SHF_LSR_REG:
+ fprintf(F, "modifier = V >> R\n");
+ break;
+ case ARM_SHF_ROR_IMM:
+ fprintf(F, "modifier = V ROR %d\n", attr->shift_immediate);
+ break;
+ case ARM_SHF_ROR_REG:
+ fprintf(F, "modifier = V ROR R\n");
+ break;
+ case ARM_SHF_RRX:
+ fprintf(F, "modifier = RRX\n");
+ break;
+ default:
+ case ARM_SHF_INVALID:
+ fprintf(F, "modifier = INVALID SHIFT MODIFIER\n");
+ break;
}
- else {
- if (attr->flags & arch_irn_flags_dont_spill) {
- fprintf(F, " unspillable");
- }
- if (attr->flags & arch_irn_flags_rematerializable) {
- fprintf(F, " remat");
- }
- if (attr->flags & arch_irn_flags_ignore) {
- fprintf(F, " ignore");
- }
+ }
+ if (has_cmp_attr(n)) {
+ const arm_cmp_attr_t *attr = get_arm_cmp_attr_const(n);
+ fprintf(F, "cmp_attr =");
+ if (attr->is_unsigned) {
+ fprintf(F, " unsigned");
}
- fprintf(F, " (%d)\n", attr->flags);
-
- if (get_arm_value(n)) {
- if (is_arm_CopyB(n)) {
- fprintf(F, "size = %lu\n", get_tarval_long(get_arm_value(n)));
- } else {
- if (mode_is_float(get_irn_mode(n))) {
- fprintf(F, "float value = (%f)\n", (double) get_tarval_double(get_arm_value(n)));
- } else if (mode_is_int(get_irn_mode(n))) {
- long v = get_tarval_long(get_arm_value(n));
- fprintf(F, "long value = %ld (0x%08lx)\n", v, v);
- } else if (mode_is_reference(get_irn_mode(n))) {
- fprintf(F, "pointer\n");
- } else {
- assert(0 && "unbehandelter Typ im const-Knoten");
- }
- }
+ if (attr->ins_permuted) {
+ fprintf(F, " inputs swapped");
}
- if (is_arm_CmpBra(n) && get_arm_CondJmp_proj_num(n) >= 0) {
- fprintf(F, "proj_num = (%d)\n", get_arm_CondJmp_proj_num(n));
+ fputc('\n', F);
+ }
+ if (arm_has_symconst_attr(n)) {
+ const arm_SymConst_attr_t *attr = get_arm_SymConst_attr_const(n);
+
+ fprintf(F, "entity = ");
+ if (attr->entity != NULL) {
+ fprintf(F, "'%s'", get_entity_name(attr->entity));
+ } else {
+ fputs("NULL", F);
}
- /* TODO: dump all additional attributes */
-
- fprintf(F, "=== arm attr end ===\n");
- /* end of: case dump_node_info_txt */
- break;
+ fputc('\n', F);
+ fprintf(F, "frame offset = %d\n", attr->fp_offset);
+ }
+ if (has_farith_attr(n)) {
+ const arm_farith_attr_t *attr = get_arm_farith_attr_const(n);
+ ir_fprintf(F, "arithmetic mode = %+F\n", attr->mode);
+ }
+ break;
}
- return bad;
}
+arm_attr_t *get_arm_attr(ir_node *node)
+{
+ assert(is_arm_irn(node) && "need arm node to get attributes");
+ return (arm_attr_t*)get_irn_generic_attr(node);
+}
+const arm_attr_t *get_arm_attr_const(const ir_node *node)
+{
+ assert(is_arm_irn(node) && "need arm node to get attributes");
+ return (const arm_attr_t*)get_irn_generic_attr_const(node);
+}
-/***************************************************************************************************
- * _ _ _ __ _ _ _ _
- * | | | | | | / / | | | | | | | |
- * __ _| |_| |_ _ __ ___ ___| |_ / /_ _ ___| |_ _ __ ___ ___| |_| |__ ___ __| |___
- * / _` | __| __| '__| / __|/ _ \ __| / / _` |/ _ \ __| | '_ ` _ \ / _ \ __| '_ \ / _ \ / _` / __|
- * | (_| | |_| |_| | \__ \ __/ |_ / / (_| | __/ |_ | | | | | | __/ |_| | | | (_) | (_| \__ \
- * \__,_|\__|\__|_| |___/\___|\__/_/ \__, |\___|\__| |_| |_| |_|\___|\__|_| |_|\___/ \__,_|___/
- * __/ |
- * |___/
- ***************************************************************************************************/
+static bool has_symconst_attr(const ir_node *node)
+{
+ return is_arm_SymConst(node) || is_arm_FrameAddr(node) || is_arm_Bl(node);
+}
-/* Returns the attributes of a generic Arm node. */
-arm_attr_t *get_arm_attr(ir_node *node) {
- assert(is_arm_irn(node) && "need arm node to get attributes");
- return get_irn_generic_attr(node);
+arm_SymConst_attr_t *get_arm_SymConst_attr(ir_node *node)
+{
+ assert(has_symconst_attr(node));
+ return (arm_SymConst_attr_t*)get_irn_generic_attr(node);
}
-const arm_attr_t *get_arm_attr_const(const ir_node *node) {
- assert(is_arm_irn(node) && "need arm node to get attributes");
- return get_irn_generic_attr_const(node);
+const arm_SymConst_attr_t *get_arm_SymConst_attr_const(const ir_node *node)
+{
+ assert(has_symconst_attr(node));
+ return (const arm_SymConst_attr_t*)get_irn_generic_attr_const(node);
}
-/**
- * Returns the attributes of an ARM SymConst node.
- */
-arm_SymConst_attr_t *get_arm_SymConst_attr(ir_node *node) {
- assert(is_arm_SymConst(node));
- return get_irn_generic_attr(node);
+static const arm_fConst_attr_t *get_arm_fConst_attr_const(const ir_node *node)
+{
+ assert(is_arm_fConst(node));
+ return (const arm_fConst_attr_t*)get_irn_generic_attr_const(node);
}
-const arm_SymConst_attr_t *get_arm_SymConst_attr_const(const ir_node *node) {
- assert(is_arm_SymConst(node));
- return get_irn_generic_attr_const(node);
+static arm_fConst_attr_t *get_arm_fConst_attr(ir_node *node)
+{
+ assert(is_arm_fConst(node));
+ return (arm_fConst_attr_t*)get_irn_generic_attr(node);
}
-static int is_arm_CondJmp(const ir_node *node) {
- int code = get_arm_irn_opcode(node);
+arm_farith_attr_t *get_arm_farith_attr(ir_node *node)
+{
+ assert(has_farith_attr(node));
+ return (arm_farith_attr_t*)get_irn_generic_attr(node);
+}
- return (code == iro_arm_CmpBra || code == iro_arm_fpaCmfBra ||
- code == iro_arm_fpaCnfBra || iro_arm_fpaCmfeBra ||
- code == iro_arm_fpaCnfeBra);
+const arm_farith_attr_t *get_arm_farith_attr_const(const ir_node *node)
+{
+ assert(has_farith_attr(node));
+ return (const arm_farith_attr_t*)get_irn_generic_attr_const(node);
}
-/* Returns the attributes of a CondJmp node. */
-arm_CondJmp_attr_t *get_arm_CondJmp_attr(ir_node *node) {
- assert(is_arm_CondJmp(node));
- return get_irn_generic_attr(node);
+arm_CondJmp_attr_t *get_arm_CondJmp_attr(ir_node *node)
+{
+ assert(is_arm_B(node));
+ return (arm_CondJmp_attr_t*)get_irn_generic_attr(node);
}
-const arm_CondJmp_attr_t *get_arm_CondJmp_attr_const(const ir_node *node) {
- assert(is_arm_CondJmp(node));
- return get_irn_generic_attr_const(node);
+const arm_CondJmp_attr_t *get_arm_CondJmp_attr_const(const ir_node *node)
+{
+ assert(is_arm_B(node));
+ return (const arm_CondJmp_attr_t*)get_irn_generic_attr_const(node);
}
-/* Returns the attributes of a SwitchJmp node. */
-arm_SwitchJmp_attr_t *get_arm_SwitchJmp_attr(ir_node *node) {
+arm_SwitchJmp_attr_t *get_arm_SwitchJmp_attr(ir_node *node)
+{
assert(is_arm_SwitchJmp(node));
- return get_irn_generic_attr(node);
+ return (arm_SwitchJmp_attr_t*)get_irn_generic_attr(node);
}
-const arm_SwitchJmp_attr_t *get_arm_SwitchJmp_attr_const(const ir_node *node) {
+const arm_SwitchJmp_attr_t *get_arm_SwitchJmp_attr_const(const ir_node *node)
+{
assert(is_arm_SwitchJmp(node));
- return get_irn_generic_attr_const(node);
+ return (const arm_SwitchJmp_attr_t*)get_irn_generic_attr_const(node);
}
-/**
- * Returns the argument register requirements of a arm node.
- */
-const arch_register_req_t **get_arm_in_req_all(const ir_node *node) {
- const arm_attr_t *attr = get_arm_attr_const(node);
- return attr->in_req;
+arm_CopyB_attr_t *get_arm_CopyB_attr(ir_node *node)
+{
+ assert(is_arm_CopyB(node));
+ return (arm_CopyB_attr_t*)get_irn_generic_attr(node);
}
-/**
- * Returns the result register requirements of an arm node.
- */
-const arch_register_req_t **get_arm_out_req_all(const ir_node *node) {
- const arm_attr_t *attr = get_arm_attr_const(node);
- return attr->out_req;
+const arm_CopyB_attr_t *get_arm_CopyB_attr_const(const ir_node *node)
+{
+ assert(is_arm_CopyB(node));
+ return (const arm_CopyB_attr_t*)get_irn_generic_attr_const(node);
}
-/**
- * Returns the argument register requirement at position pos of an arm node.
- */
-const arch_register_req_t *get_arm_in_req(const ir_node *node, int pos) {
- const arm_attr_t *attr = get_arm_attr_const(node);
- return attr->in_req[pos];
+ir_tarval *get_fConst_value(const ir_node *node)
+{
+ const arm_fConst_attr_t *attr = get_arm_fConst_attr_const(node);
+ return attr->tv;
}
-/**
- * Returns the result register requirement at position pos of an arm node.
- */
-const arch_register_req_t *get_arm_out_req(const ir_node *node, int pos) {
- const arm_attr_t *attr = get_arm_attr_const(node);
- return attr->out_req[pos];
+void set_fConst_value(ir_node *node, ir_tarval *tv)
+{
+ arm_fConst_attr_t *attr = get_arm_fConst_attr(node);
+ attr->tv = tv;
}
-/**
- * Sets the OUT register requirements at position pos.
- */
-void set_arm_req_out(ir_node *node, const arch_register_req_t *req, int pos) {
- arm_attr_t *attr = get_arm_attr(node);
- attr->out_req[pos] = req;
+ir_relation get_arm_CondJmp_relation(const ir_node *node)
+{
+ const arm_CondJmp_attr_t *attr = get_arm_CondJmp_attr_const(node);
+ return attr->relation;
}
-/**
- * Sets the complete OUT requirements of node.
- */
-void set_arm_req_out_all(ir_node *node, const arch_register_req_t **reqs) {
- arm_attr_t *attr = get_arm_attr(node);
- attr->out_req = reqs;
+void set_arm_CondJmp_relation(ir_node *node, ir_relation relation)
+{
+ arm_CondJmp_attr_t *attr = get_arm_CondJmp_attr(node);
+ attr->relation = relation;
}
-/**
- * Sets the IN register requirements at position pos.
- */
-void set_arm_req_in(ir_node *node, const arch_register_req_t *req, int pos) {
- arm_attr_t *attr = get_arm_attr(node);
- attr->in_req[pos] = req;
+int get_arm_SwitchJmp_n_projs(const ir_node *node)
+{
+ const arm_SwitchJmp_attr_t *attr = get_arm_SwitchJmp_attr_const(node);
+ return attr->n_projs;
}
-/**
- * Returns the register flag of an arm node.
- */
-arch_irn_flags_t get_arm_flags(const ir_node *node) {
- const arm_attr_t *attr = get_arm_attr_const(node);
- return attr->flags;
+void set_arm_SwitchJmp_n_projs(ir_node *node, int n_projs)
+{
+ arm_SwitchJmp_attr_t *attr = get_arm_SwitchJmp_attr(node);
+ attr->n_projs = n_projs;
}
-/**
- * Sets the register flag of an arm node.
- */
-void set_arm_flags(ir_node *node, arch_irn_flags_t flags) {
- arm_attr_t *attr = get_arm_attr(node);
- attr->flags = flags;
+long get_arm_SwitchJmp_default_proj_num(const ir_node *node)
+{
+ const arm_SwitchJmp_attr_t *attr = get_arm_SwitchJmp_attr_const(node);
+ return attr->default_proj_num;
}
-/**
- * Returns the result register slots of an arm node.
- */
-const arch_register_t **get_arm_slots(const ir_node *node) {
- const arm_attr_t *attr = get_arm_attr_const(node);
- return attr->slots;
+void set_arm_SwitchJmp_default_proj_num(ir_node *node, long default_proj_num)
+{
+ arm_SwitchJmp_attr_t *attr = get_arm_SwitchJmp_attr(node);
+ attr->default_proj_num = default_proj_num;
}
-/**
- * Returns the name of the OUT register at position pos.
- */
-const char *get_arm_out_reg_name(const ir_node *node, int pos) {
- const arm_attr_t *attr = get_arm_attr_const(node);
+/* Set the ARM machine node attributes to default values. */
+static void init_arm_attributes(ir_node *node, arch_irn_flags_t flags,
+ const arch_register_req_t ** in_reqs,
+ const be_execution_unit_t ***execution_units,
+ int n_res)
+{
+ ir_graph *irg = get_irn_irg(node);
+ struct obstack *obst = get_irg_obstack(irg);
+ arm_attr_t *attr = get_arm_attr(node);
+ backend_info_t *info;
+ (void) execution_units;
- assert(is_arm_irn(node) && "Not an arm node.");
- assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
- assert(attr->slots[pos] && "No register assigned");
+ arch_irn_set_flags(node, flags);
+ arch_set_in_register_reqs(node, in_reqs);
+ attr->is_load_store = false;
- return arch_register_get_name(attr->slots[pos]);
+ info = be_get_info(node);
+ info->out_infos = NEW_ARR_D(reg_out_info_t, obst, n_res);
+ memset(info->out_infos, 0, n_res * sizeof(info->out_infos[0]));
}
-/**
- * Returns the index of the OUT register at position pos within its register class.
- */
-int get_arm_out_regnr(const ir_node *node, int pos) {
- const arm_attr_t *attr = get_arm_attr_const(node);
+static void init_arm_load_store_attributes(ir_node *res, ir_mode *ls_mode,
+ ir_entity *entity,
+ int entity_sign, long offset,
+ bool is_frame_entity)
+{
+ arm_load_store_attr_t *attr = get_arm_load_store_attr(res);
+ attr->load_store_mode = ls_mode;
+ attr->entity = entity;
+ attr->entity_sign = entity_sign;
+ attr->is_frame_entity = is_frame_entity;
+ attr->offset = offset;
+ attr->base.is_load_store = true;
+}
- assert(is_arm_irn(node) && "Not an arm node.");
- assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
- assert(attr->slots[pos] && "No register assigned");
+static void init_arm_shifter_operand(ir_node *res, unsigned immediate_value,
+ arm_shift_modifier_t shift_modifier,
+ unsigned shift_immediate)
+{
+ arm_shifter_operand_t *attr = get_arm_shifter_operand_attr(res);
+ attr->immediate_value = immediate_value;
+ attr->shift_modifier = shift_modifier;
+ attr->shift_immediate = shift_immediate;
+}
- return arch_register_get_index(attr->slots[pos]);
+static void init_arm_cmp_attr(ir_node *res, bool ins_permuted, bool is_unsigned)
+{
+ arm_cmp_attr_t *attr = get_arm_cmp_attr(res);
+ attr->ins_permuted = ins_permuted;
+ attr->is_unsigned = is_unsigned;
}
-/**
- * Returns the OUT register at position pos.
- */
-const arch_register_t *get_arm_out_reg(const ir_node *node, int pos) {
- const arm_attr_t *attr = get_arm_attr_const(node);
+static void init_arm_SymConst_attributes(ir_node *res, ir_entity *entity,
+ int symconst_offset)
+{
+ arm_SymConst_attr_t *attr = get_arm_SymConst_attr(res);
+ attr->entity = entity;
+ attr->fp_offset = symconst_offset;
+}
- assert(is_arm_irn(node) && "Not an arm node.");
- assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
- assert(attr->slots[pos] && "No register assigned");
+static void init_arm_farith_attributes(ir_node *res, ir_mode *mode)
+{
+ arm_farith_attr_t *attr = get_arm_farith_attr(res);
+ attr->mode = mode;
+}
- return attr->slots[pos];
+static void init_arm_CopyB_attributes(ir_node *res, unsigned size)
+{
+ arm_CopyB_attr_t *attr = get_arm_CopyB_attr(res);
+ attr->size = size;
}
-/**
- * Sets the flags for the n'th out.
- */
-void set_arm_out_flags(ir_node *node, arch_irn_flags_t flags, int pos) {
- arm_attr_t *attr = get_arm_attr(node);
- assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
- attr->out_flags[pos] = flags;
+static int cmp_attr_arm(const ir_node *a, const ir_node *b)
+{
+ (void) a;
+ (void) b;
+ return 0;
}
-/**
- * Gets the flags for the n'th out.
- */
-arch_irn_flags_t get_arm_out_flags(const ir_node *node, int pos) {
- const arm_attr_t *attr = get_arm_attr_const(node);
- assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
- return attr->out_flags[pos];
+static int cmp_attr_arm_SymConst(const ir_node *a, const ir_node *b)
+{
+ const arm_SymConst_attr_t *attr_a;
+ const arm_SymConst_attr_t *attr_b;
+
+ if (cmp_attr_arm(a, b))
+ return 1;
+
+ attr_a = get_arm_SymConst_attr_const(a);
+ attr_b = get_arm_SymConst_attr_const(b);
+ return attr_a->entity != attr_b->entity
+ || attr_a->fp_offset != attr_b->fp_offset;
}
-/**
- * Returns the number of results.
- */
-int get_arm_n_res(const ir_node *node) {
- const arm_attr_t *attr = get_arm_attr_const(node);
- return ARR_LEN(attr->slots);
+static int cmp_attr_arm_CopyB(const ir_node *a, const ir_node *b)
+{
+ const arm_CopyB_attr_t *attr_a;
+ const arm_CopyB_attr_t *attr_b;
+
+ if (cmp_attr_arm(a, b))
+ return 1;
+
+ attr_a = get_arm_CopyB_attr_const(a);
+ attr_b = get_arm_CopyB_attr_const(b);
+ return attr_a->size != attr_b->size;
}
-/**
- * Returns the tarvalue
- */
-tarval *get_arm_value(const ir_node *node) {
- const arm_attr_t *attr = get_arm_attr_const(node);
- return attr->value;
+
+static int cmp_attr_arm_CondJmp(const ir_node *a, const ir_node *b)
+{
+ (void) a;
+ (void) b;
+ /* never identical */
+ return 1;
}
-/**
- * Sets the tarvalue
- */
-void set_arm_value(ir_node *node, tarval *tv) {
- arm_attr_t *attr = get_arm_attr(node);
- attr->value = tv;
+static int cmp_attr_arm_SwitchJmp(const ir_node *a, const ir_node *b)
+{
+ (void) a;
+ (void) b;
+ /* never identical */
+ return 1;
}
-/**
- * Returns the proj num
- */
-int get_arm_CondJmp_proj_num(const ir_node *node) {
- const arm_CondJmp_attr_t *attr = get_arm_CondJmp_attr_const(node);
- return attr->proj_num;
+static int cmp_attr_arm_fConst(const ir_node *a, const ir_node *b)
+{
+ const arm_fConst_attr_t *attr_a;
+ const arm_fConst_attr_t *attr_b;
+
+ if (cmp_attr_arm(a, b))
+ return 1;
+
+ attr_a = get_arm_fConst_attr_const(a);
+ attr_b = get_arm_fConst_attr_const(b);
+
+ return attr_a->tv != attr_b->tv;
}
-/**
- * Sets the proj num
- */
-void set_arm_CondJmp_proj_num(ir_node *node, int proj_num) {
- arm_CondJmp_attr_t *attr = get_arm_CondJmp_attr(node);
- attr->proj_num = proj_num;
+
+arm_load_store_attr_t *get_arm_load_store_attr(ir_node *node)
+{
+ return (arm_load_store_attr_t*) get_irn_generic_attr(node);
}
-/**
- * Returns the SymConst label
- */
-ident *get_arm_symconst_id(const ir_node *node) {
- const arm_SymConst_attr_t *attr = get_arm_SymConst_attr_const(node);
- return attr->symconst_id;
+const arm_load_store_attr_t *get_arm_load_store_attr_const(const ir_node *node)
+{
+ return (const arm_load_store_attr_t*) get_irn_generic_attr_const(node);
}
-/**
- * Sets the SymConst label
- */
-void set_arm_symconst_id(ir_node *node, ident *symconst_id) {
- arm_SymConst_attr_t *attr = get_arm_SymConst_attr(node);
- attr->symconst_id = symconst_id;
+arm_shifter_operand_t *get_arm_shifter_operand_attr(ir_node *node)
+{
+ return (arm_shifter_operand_t*) get_irn_generic_attr(node);
}
-/**
- * Returns the number of projs of a SwitchJmp.
- */
-int get_arm_SwitchJmp_n_projs(const ir_node *node) {
- const arm_SwitchJmp_attr_t *attr = get_arm_SwitchJmp_attr_const(node);
- return attr->n_projs;
+const arm_shifter_operand_t *get_arm_shifter_operand_attr_const(
+ const ir_node *node)
+{
+ return (const arm_shifter_operand_t*) get_irn_generic_attr_const(node);
}
-/**
- * Sets the number of projs.
- */
-void set_arm_SwitchJmp_n_projs(ir_node *node, int n_projs) {
- arm_SwitchJmp_attr_t *attr = get_arm_SwitchJmp_attr(node);
- attr->n_projs = n_projs;
+arm_cmp_attr_t *get_arm_cmp_attr(ir_node *node)
+{
+ return (arm_cmp_attr_t*) get_irn_generic_attr(node);
}
-/**
- * Returns the default_proj_num.
- */
-long get_arm_SwitchJmp_default_proj_num(const ir_node *node) {
- const arm_SwitchJmp_attr_t *attr = get_arm_SwitchJmp_attr_const(node);
- return attr->default_proj_num;
+const arm_cmp_attr_t *get_arm_cmp_attr_const(const ir_node *node)
+{
+ return (const arm_cmp_attr_t*) get_irn_generic_attr_const(node);
}
-/**
- * Sets the default_proj_num.
- */
-void set_arm_SwitchJmp_default_proj_num(ir_node *node, long default_proj_num) {
- arm_SwitchJmp_attr_t *attr = get_arm_SwitchJmp_attr(node);
- attr->default_proj_num = default_proj_num;
+static int cmp_attr_arm_load_store(const ir_node *a, const ir_node *b)
+{
+ const arm_load_store_attr_t *attr_a;
+ const arm_load_store_attr_t *attr_b;
+
+ if (cmp_attr_arm(a, b))
+ return 1;
+
+ attr_a = get_arm_load_store_attr_const(a);
+ attr_b = get_arm_load_store_attr_const(b);
+ if (attr_a->entity != attr_b->entity
+ || attr_a->entity_sign != attr_b->entity_sign
+ || attr_a->offset != attr_b->offset)
+ return 1;
+
+ return 0;
}
-/**
- * Gets the shift modifier attribute.
- */
-arm_shift_modifier get_arm_shift_modifier(const ir_node *node) {
- const arm_attr_t *attr = get_arm_attr_const(node);
- return ARM_GET_SHF_MOD(attr);
+static int cmp_attr_arm_shifter_operand(const ir_node *a, const ir_node *b)
+{
+ const arm_shifter_operand_t *attr_a;
+ const arm_shifter_operand_t *attr_b;
+
+ if (cmp_attr_arm(a, b))
+ return 1;
+
+ attr_a = get_arm_shifter_operand_attr_const(a);
+ attr_b = get_arm_shifter_operand_attr_const(b);
+ if (attr_a->shift_modifier != attr_b->shift_modifier
+ || attr_a->immediate_value != attr_b->immediate_value
+ || attr_a->shift_immediate != attr_b->shift_immediate)
+ return 1;
+
+ return 0;
}
-/* Set the ARM machine node attributes to default values. */
-static void init_arm_attributes(ir_node *node, int flags,
- const arch_register_req_t ** in_reqs,
- const arch_register_req_t ** out_reqs,
- const be_execution_unit_t ***execution_units,
- int n_res) {
- ir_graph *irg = get_irn_irg(node);
- struct obstack *obst = get_irg_obstack(irg);
- arm_attr_t *attr = get_arm_attr(node);
- (void) execution_units;
+static int cmp_attr_arm_cmp(const ir_node *a, const ir_node *b)
+{
+ const arm_cmp_attr_t *attr_a;
+ const arm_cmp_attr_t *attr_b;
- attr->in_req = in_reqs;
- attr->out_req = out_reqs;
- attr->flags = flags;
- attr->instr_fl = (ARM_COND_AL << 3) | ARM_SHF_NONE;
- attr->value = NULL;
-
- attr->out_flags = NEW_ARR_D(int, obst, n_res);
- memset(attr->out_flags, 0, n_res * sizeof(attr->out_flags[0]));
-
- attr->slots = NEW_ARR_D(const arch_register_t*, obst, n_res);
- memset(attr->slots, 0, n_res * sizeof(attr->slots[0]));
-}
-
-/************************************************
- * ___ _ _ _ *
- * / _ \ _ __ | |_(_)_ __ ___ (_)_______ _ __ *
- * | | | | '_ \| __| | '_ ` _ \| |_ / _ \ '__| *
- * | |_| | |_) | |_| | | | | | | |/ / __/ | *
- * \___/| .__/ \__|_|_| |_| |_|_/___\___|_| *
- * |_| *
- ************************************************/
-
-typedef struct _opt_tuple {
- ir_op *op_imm_left; /**< immediate is left */
- ir_op *op_imm_right; /**< immediate is right */
- ir_op *op_shf_left; /**< shift operand on left */
- ir_op *op_shf_right; /**< shift operand on right */
-} opt_tuple;
-
-//static const opt_tuple *opt_ops[iro_arm_last];
-
-void arm_set_optimizers(void) {
- /*
-#define STD(op) p_##op = { op_arm_##op##_i, op_arm_##op##_i, op_arm_##op, op_arm_##op }
-#define LEFT(op) p_##op = { op_arm_##op##_i, NULL, op_arm_##op, NULL }
-#define SET(op) opt_ops[iro_arm_##op] = &p_##op;
-
- static const opt_tuple
- STD(Add),
- STD(And),
- STD(Or),
- STD(Eor),
- LEFT(Bic),
- LEFT(Shl),
- LEFT(Shr),
- LEFT(Shrs),
- p_Sub = { op_arm_Sub_i, op_arm_Rsb_i, op_arm_Sub, op_arm_Rsb },
-
- memset(opt_ops, 0, sizeof(opt_ops));
- SET(Add);
- SET(And);
- SET(Or);
- SET(Eor);
- SET(Sub);
- SET(Bic);
- SET(Shl);
- SET(Shr);
- SET(Shrs);
- */
-}
-
-static int cmp_attr_arm_SymConst(ir_node *a, ir_node *b) {
- const arm_SymConst_attr_t *attr_a = get_irn_generic_attr_const(a);
- const arm_SymConst_attr_t *attr_b = get_irn_generic_attr_const(b);
- return attr_a->symconst_id != attr_b->symconst_id;
-}
-
-static int cmp_attr_arm(ir_node *a, ir_node *b) {
- arm_attr_t *attr_a = get_irn_generic_attr(a);
- arm_attr_t *attr_b = get_irn_generic_attr(b);
- return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);
-}
-
-static int cmp_attr_arm_CondJmp(ir_node *a, ir_node *b) {
- (void) a;
- (void) b;
- /* never identical */
- return 1;
+ if (cmp_attr_arm(a, b))
+ return 1;
+
+ attr_a = get_arm_cmp_attr_const(a);
+ attr_b = get_arm_cmp_attr_const(b);
+ if (attr_a->ins_permuted != attr_b->ins_permuted
+ || attr_a->is_unsigned != attr_b->is_unsigned)
+ return 1;
+ return 0;
}
-static int cmp_attr_arm_SwitchJmp(ir_node *a, ir_node *b) {
- (void) a;
- (void) b;
- /* never identical */
- return 1;
+static int cmp_attr_arm_farith(const ir_node *a, const ir_node *b)
+{
+ const arm_farith_attr_t *attr_a;
+ const arm_farith_attr_t *attr_b;
+
+ if (cmp_attr_arm(a, b))
+ return 1;
+
+ attr_a = get_arm_farith_attr_const(a);
+ attr_b = get_arm_farith_attr_const(b);
+ return attr_a->mode != attr_b->mode;
}
/** copies the ARM attributes of a node. */
-static void arm_copy_attr(const ir_node *old_node, ir_node *new_node) {
- ir_graph *irg = get_irn_irg(new_node);
- struct obstack *obst = get_irg_obstack(irg);
+static void arm_copy_attr(ir_graph *irg, const ir_node *old_node,
+ ir_node *new_node)
+{
+ struct obstack *obst = get_irg_obstack(irg);
const arm_attr_t *attr_old = get_arm_attr_const(old_node);
arm_attr_t *attr_new = get_arm_attr(new_node);
+ backend_info_t *old_info = be_get_info(old_node);
+ backend_info_t *new_info = be_get_info(new_node);
/* copy the attributes */
memcpy(attr_new, attr_old, get_op_attr_size(get_irn_op(old_node)));
/* copy out flags */
- attr_new->out_flags =
- DUP_ARR_D(int, obst, attr_old->out_flags);
- /* copy register assignments */
- attr_new->slots =
- DUP_ARR_D(arch_register_t*, obst, attr_old->slots);
+ new_info->out_infos =
+ DUP_ARR_D(reg_out_info_t, obst, old_info->out_infos);
+ new_info->in_reqs = old_info->in_reqs;
}
-
/* Include the generated constructor functions */
#include "gen_arm_new_nodes.c.inl"
projects / libfirm / blobdiff