* @author Oliver Richter, Tobias Gneist
* @version $Id$
*/
-#ifdef HAVE_CONFIG_H
#include "config.h"
-#endif
#include <stdlib.h>
#include "ircons_t.h"
#include "iropt_t.h"
#include "irop.h"
-#include "firm_common_t.h"
#include "irvrfy_t.h"
#include "irprintf.h"
#include "xmalloc.h"
-#include "../bearch_t.h"
+#include "../bearch.h"
#include "arm_nodes_attr.h"
#include "arm_new_nodes.h"
* |_|
***********************************************************************************/
-/**
- * Dumps the register requirements for either in or out.
- */
-static void dump_reg_req(FILE *F, const ir_node *node,
- const arch_register_req_t **reqs, int inout) {
- char *dir = inout ? "out" : "in";
- int max = inout ? get_arm_n_res(node) : get_irn_arity(node);
- char buf[1024];
- int i;
-
- memset(buf, 0, sizeof(buf));
-
- if (reqs) {
- for (i = 0; i < max; i++) {
- fprintf(F, "%sreq #%d =", dir, i);
-
- if (reqs[i]->type == arch_register_req_type_none) {
- fprintf(F, " n/a");
- }
-
- if (reqs[i]->type & arch_register_req_type_normal) {
- fprintf(F, " %s", reqs[i]->cls->name);
- }
-
- if (reqs[i]->type & arch_register_req_type_limited) {
- fprintf(F, " %s",
- arch_register_req_format(buf, sizeof(buf), reqs[i], node));
- }
-
- if (reqs[i]->type & arch_register_req_type_should_be_same) {
- const unsigned other = reqs[i]->other_same;
- int i;
-
- ir_fprintf(F, " same as");
- for (i = 0; 1U << i <= other; ++i) {
- if (other & (1U << i)) {
- ir_fprintf(F, " %+F", get_irn_n(node, i));
- }
- }
- }
-
- if (reqs[i]->type & arch_register_req_type_must_be_different) {
- const unsigned other = reqs[i]->other_different;
- int i;
-
- ir_fprintf(F, " different from");
- for (i = 0; 1U << i <= other; ++i) {
- if (other & (1U << i)) {
- ir_fprintf(F, " %+F", get_irn_n(node, i));
- }
- }
- }
-
- fprintf(F, "\n");
- }
-
- fprintf(F, "\n");
- } else {
- fprintf(F, "%sreq = N/A\n", dir);
- }
-}
-
/**
* Dumper interface for dumping arm nodes in vcg.
* @param n the node to dump
* @param reason indicates which kind of information should be dumped
* @return 0 on success or != 0 on failure
*/
-static int arm_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
+static int arm_dump_node(ir_node *n, FILE *F, dump_reason_t reason)
+{
ir_mode *mode = NULL;
- int bad = 0;
- int i;
arm_attr_t *attr = get_arm_attr(n);
- const arch_register_req_t **reqs;
- const arch_register_t **slots;
arm_shift_modifier mod;
switch (reason) {
break;
case dump_node_info_txt:
- fprintf(F, "=== arm attr begin ===\n");
-
- /* dump IN requirements */
- if (get_irn_arity(n) > 0) {
- reqs = get_arm_in_req_all(n);
- dump_reg_req(F, n, reqs, 0);
- }
-
- /* dump OUT requirements */
- if (ARR_LEN(attr->slots) > 0) {
- reqs = get_arm_out_req_all(n);
- dump_reg_req(F, n, reqs, 1);
- }
-
- /* dump assigned registers */
- slots = get_arm_slots(n);
- if (slots && ARR_LEN(attr->slots) > 0) {
- for (i = 0; i < ARR_LEN(attr->slots); i++) {
- if (slots[i]) {
- fprintf(F, "reg #%d = %s\n", i, slots[i]->name);
- }
- else {
- fprintf(F, "reg #%d = n/a\n", i);
- }
- }
- }
- fprintf(F, "\n");
-
- /* dump n_res */
- fprintf(F, "n_res = %d\n", get_arm_n_res(n));
-
- /* dump flags */
- fprintf(F, "flags =");
- if (attr->flags == arch_irn_flags_none) {
- fprintf(F, " none");
- }
- else {
- if (attr->flags & arch_irn_flags_dont_spill) {
- fprintf(F, " unspillable");
- }
- if (attr->flags & arch_irn_flags_rematerializable) {
- fprintf(F, " remat");
- }
- if (attr->flags & arch_irn_flags_ignore) {
- fprintf(F, " ignore");
- }
- }
- fprintf(F, " (%d)\n", attr->flags);
+ arch_dump_reqs_and_registers(F, n);
if (is_arm_CopyB(n)) {
fprintf(F, "size = %lu\n", get_arm_imm_value(n));
if (is_arm_CmpBra(n) && get_arm_CondJmp_proj_num(n) >= 0) {
fprintf(F, "proj_num = (%d)\n", get_arm_CondJmp_proj_num(n));
}
- /* TODO: dump all additional attributes */
-
- fprintf(F, "=== arm attr end ===\n");
- /* end of: case dump_node_info_txt */
break;
}
- return bad;
+
+ return 0;
}
return fpa_attr;
}
+#ifndef NDEBUG
static int is_arm_CondJmp(const ir_node *node) {
int code = get_arm_irn_opcode(node);
code == iro_arm_fpaCnfBra || iro_arm_fpaCmfeBra ||
code == iro_arm_fpaCnfeBra);
}
+#endif
/* Returns the attributes of a CondJmp node. */
arm_CondJmp_attr_t *get_arm_CondJmp_attr(ir_node *node) {
return attr->in_req;
}
-/**
- * Returns the result register requirements of an arm node.
- */
-const arch_register_req_t **get_arm_out_req_all(const ir_node *node) {
- const arm_attr_t *attr = get_arm_attr_const(node);
- return attr->out_req;
-}
-
/**
* Returns the argument register requirement at position pos of an arm node.
*/
return attr->in_req[pos];
}
-/**
- * Returns the result register requirement at position pos of an arm node.
- */
-const arch_register_req_t *get_arm_out_req(const ir_node *node, int pos) {
- const arm_attr_t *attr = get_arm_attr_const(node);
- return attr->out_req[pos];
-}
-
-/**
- * Sets the OUT register requirements at position pos.
- */
-void set_arm_req_out(ir_node *node, const arch_register_req_t *req, int pos) {
- arm_attr_t *attr = get_arm_attr(node);
- attr->out_req[pos] = req;
-}
-
-/**
- * Sets the complete OUT requirements of node.
- */
-void set_arm_req_out_all(ir_node *node, const arch_register_req_t **reqs) {
- arm_attr_t *attr = get_arm_attr(node);
- attr->out_req = reqs;
-}
-
/**
* Sets the IN register requirements at position pos.
*/
attr->in_req[pos] = req;
}
-/**
- * Returns the register flag of an arm node.
- */
-arch_irn_flags_t get_arm_flags(const ir_node *node) {
- const arm_attr_t *attr = get_arm_attr_const(node);
- return attr->flags;
-}
-
-/**
- * Sets the register flag of an arm node.
- */
-void set_arm_flags(ir_node *node, arch_irn_flags_t flags) {
- arm_attr_t *attr = get_arm_attr(node);
- attr->flags = flags;
-}
-
-/**
- * Returns the result register slots of an arm node.
- */
-const arch_register_t **get_arm_slots(const ir_node *node) {
- const arm_attr_t *attr = get_arm_attr_const(node);
- return attr->slots;
-}
-
-/**
- * Returns the name of the OUT register at position pos.
- */
-const char *get_arm_out_reg_name(const ir_node *node, int pos) {
- const arm_attr_t *attr = get_arm_attr_const(node);
-
- assert(is_arm_irn(node) && "Not an arm node.");
- assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
- assert(attr->slots[pos] && "No register assigned");
-
- return arch_register_get_name(attr->slots[pos]);
-}
-
-/**
- * Returns the index of the OUT register at position pos within its register class.
- */
-int get_arm_out_regnr(const ir_node *node, int pos) {
- const arm_attr_t *attr = get_arm_attr_const(node);
-
- assert(is_arm_irn(node) && "Not an arm node.");
- assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
- assert(attr->slots[pos] && "No register assigned");
-
- return arch_register_get_index(attr->slots[pos]);
-}
-
-/**
- * Returns the OUT register at position pos.
- */
-const arch_register_t *get_arm_out_reg(const ir_node *node, int pos) {
- const arm_attr_t *attr = get_arm_attr_const(node);
-
- assert(is_arm_irn(node) && "Not an arm node.");
- assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
- assert(attr->slots[pos] && "No register assigned");
-
- return attr->slots[pos];
-}
-
-/**
- * Sets the flags for the n'th out.
- */
-void set_arm_out_flags(ir_node *node, arch_irn_flags_t flags, int pos) {
- arm_attr_t *attr = get_arm_attr(node);
- assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
- attr->out_flags[pos] = flags;
-}
-
-/**
- * Gets the flags for the n'th out.
- */
-arch_irn_flags_t get_arm_out_flags(const ir_node *node, int pos) {
- const arm_attr_t *attr = get_arm_attr_const(node);
- assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
- return attr->out_flags[pos];
-}
-
-/**
- * Returns the number of results.
- */
-int get_arm_n_res(const ir_node *node) {
- const arm_attr_t *attr = get_arm_attr_const(node);
- return ARR_LEN(attr->slots);
-}
-
/**
* Returns the immediate value
*/
/* Set the ARM machine node attributes to default values. */
static void init_arm_attributes(ir_node *node, int flags,
const arch_register_req_t ** in_reqs,
- const arch_register_req_t ** out_reqs,
const be_execution_unit_t ***execution_units,
int n_res) {
ir_graph *irg = get_irn_irg(node);
struct obstack *obst = get_irg_obstack(irg);
arm_attr_t *attr = get_arm_attr(node);
+ backend_info_t *info;
(void) execution_units;
+ arch_irn_set_flags(node, flags);
attr->in_req = in_reqs;
- attr->out_req = out_reqs;
- attr->flags = flags;
attr->instr_fl = (ARM_COND_AL << 3) | ARM_SHF_NONE;
attr->imm_value = 0;
- attr->out_flags = NEW_ARR_D(int, obst, n_res);
- memset(attr->out_flags, 0, n_res * sizeof(attr->out_flags[0]));
-
- attr->slots = NEW_ARR_D(const arch_register_t*, obst, n_res);
- memset(attr->slots, 0, n_res * sizeof(attr->slots[0]));
+ info = be_get_info(node);
+ info->out_infos = NEW_ARR_D(reg_out_info_t, obst, n_res);
+ memset(info->out_infos, 0, n_res * sizeof(info->out_infos[0]));
}
/************************************************
struct obstack *obst = get_irg_obstack(irg);
const arm_attr_t *attr_old = get_arm_attr_const(old_node);
arm_attr_t *attr_new = get_arm_attr(new_node);
+ backend_info_t *old_info = be_get_info(old_node);
+ backend_info_t *new_info = be_get_info(new_node);
/* copy the attributes */
memcpy(attr_new, attr_old, get_op_attr_size(get_irn_op(old_node)));
/* copy out flags */
- attr_new->out_flags =
- DUP_ARR_D(int, obst, attr_old->out_flags);
- /* copy register assignments */
- attr_new->slots =
- DUP_ARR_D(arch_register_t*, obst, attr_old->slots);
+ new_info->out_infos =
+ DUP_ARR_D(reg_out_info_t, obst, old_info->out_infos);
}
projects / libfirm / blobdiff