* @file
* @brief arm emitter
* @author Oliver Richter, Tobias Gneist, Michael Beck
- * @version $Id$
*/
-#define SILENCER
-
-#ifdef HAVE_CONFIG_H
#include "config.h"
-#endif
#include <limits.h>
+#include <stdbool.h>
#include "xmalloc.h"
#include "tv.h"
#include "raw_bitset.h"
#include "dbginfo.h"
-#include "../besched.h"
-#include "../beblocksched.h"
-#include "../beirg_t.h"
-#include "../begnuas.h"
-#include "../be_dbgout.h"
+#include "besched.h"
+#include "beblocksched.h"
+#include "beirg.h"
+#include "begnuas.h"
+#include "bedwarf.h"
#include "arm_emitter.h"
+#include "arm_optimize.h"
#include "gen_arm_emitter.h"
#include "arm_nodes_attr.h"
#include "arm_new_nodes.h"
#include "arm_map_regs.h"
#include "gen_arm_regalloc_if.h"
-#include "../benode_t.h"
-
-#define BLOCK_PREFIX ".L"
-
-#define SNPRINTF_BUF_LEN 128
+#include "benode.h"
DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
-static const arch_env_t *arch_env = NULL;
-static const arm_code_gen_t *cg;
-static const arm_isa_t *isa;
-static set *sym_or_tv;
-
-/**
- * Returns the register at in position pos.
- */
-static const arch_register_t *get_in_reg(const ir_node *irn, int pos) {
- ir_node *op;
- const arch_register_t *reg = NULL;
-
- assert(get_irn_arity(irn) > pos && "Invalid IN position");
-
- /* The out register of the operator at position pos is the
- in register we need. */
- op = get_irn_n(irn, pos);
-
- reg = arch_get_irn_register(arch_env, op);
-
- assert(reg && "no in register found");
+static set *sym_or_tv;
+static arm_isa_t *isa;
- /* in case of a joker register: just return a valid register */
- if (arch_register_type_is(reg, joker)) {
- const arch_register_req_t *req;
-
- /* ask for the requirements */
- req = arch_get_register_req(arch_env, irn, pos);
-
- if (arch_register_req_is(req, limited)) {
- /* in case of limited requirements: get the first allowed register */
- unsigned idx = rbitset_next(req->limited, 0, 1);
- reg = arch_register_for_index(req->cls, idx);
- } else {
- /* otherwise get first register in class */
- reg = arch_register_for_index(req->cls, 0);
- }
- }
- return reg;
+static void arm_emit_register(const arch_register_t *reg)
+{
+ be_emit_string(arch_register_get_name(reg));
}
-
-/**
- * Returns the register at out position pos.
- */
-static const arch_register_t *get_out_reg(const ir_node *node, int pos)
+void arm_emit_source_register(const ir_node *node, int pos)
{
- ir_node *proj;
- const arch_register_t *reg = NULL;
-
- /* 1st case: irn is not of mode_T, so it has only */
- /* one OUT register -> good */
- /* 2nd case: irn is of mode_T -> collect all Projs and ask the */
- /* Proj with the corresponding projnum for the register */
-
- if (get_irn_mode(node) != mode_T) {
- reg = arch_get_irn_register(arch_env, node);
- } else if (is_arm_irn(node)) {
- reg = get_arm_out_reg(node, pos);
- } else {
- const ir_edge_t *edge;
-
- foreach_out_edge(node, edge) {
- proj = get_edge_src_irn(edge);
- assert(is_Proj(proj) && "non-Proj from mode_T node");
- if (get_Proj_proj(proj) == pos) {
- reg = arch_get_irn_register(arch_env, proj);
- break;
- }
- }
- }
-
- assert(reg && "no out register found");
- return reg;
+ const arch_register_t *reg = arch_get_irn_register_in(node, pos);
+ arm_emit_register(reg);
}
-/*************************************************************
- * _ _ __ _ _
- * (_) | | / _| | | | |
- * _ __ _ __ _ _ __ | |_| |_ | |__ ___| |_ __ ___ _ __
- * | '_ \| '__| | '_ \| __| _| | '_ \ / _ \ | '_ \ / _ \ '__|
- * | |_) | | | | | | | |_| | | | | | __/ | |_) | __/ |
- * | .__/|_| |_|_| |_|\__|_| |_| |_|\___|_| .__/ \___|_|
- * | | | |
- * |_| |_|
- *************************************************************/
-
-/**
- * Emit the name of the source register at given input position.
- */
-void arm_emit_source_register(const ir_node *node, int pos) {
- const arch_register_t *reg = get_in_reg(node, pos);
- be_emit_string(arch_register_get_name(reg));
+void arm_emit_dest_register(const ir_node *node, int pos)
+{
+ const arch_register_t *reg = arch_get_irn_register_out(node, pos);
+ arm_emit_register(reg);
}
-/**
- * Emit the name of the destination register at given output position.
- */
-void arm_emit_dest_register(const ir_node *node, int pos) {
- const arch_register_t *reg = get_out_reg(node, pos);
- be_emit_string(arch_register_get_name(reg));
-}
+void arm_emit_offset(const ir_node *node)
+{
+ const arm_load_store_attr_t *attr = get_arm_load_store_attr_const(node);
+ assert(attr->base.is_load_store);
-/**
- * Emit a node's offset.
- */
-void arm_emit_offset(const ir_node *node) {
- int offset = 0;
- ir_opcode opc = get_irn_opcode(node);
-
- if (opc == beo_Reload || opc == beo_Spill) {
- ir_entity *ent = be_get_frame_entity(node);
- offset = get_entity_offset(ent);
- } else if (opc == beo_IncSP) {
- offset = - be_get_IncSP_offset(node);
- } else {
- assert(!"unimplemented arm_emit_offset for this node type");
- panic("unimplemented arm_emit_offset for this node type");
- }
- be_emit_irprintf("%d", offset);
+ be_emit_irprintf("0x%X", attr->offset);
}
/**
* Emit the arm fpa instruction suffix depending on the mode.
*/
-static void arm_emit_fpa_postfix(const ir_mode *mode) {
+static void arm_emit_fpa_postfix(const ir_mode *mode)
+{
int bits = get_mode_size_bits(mode);
char c = 'e';
be_emit_char(c);
}
-/**
- * Emit the instruction suffix depending on the mode.
- */
-void arm_emit_mode(const ir_node *node) {
- ir_mode *mode;
+void arm_emit_float_load_store_mode(const ir_node *node)
+{
+ const arm_load_store_attr_t *attr = get_arm_load_store_attr_const(node);
+ arm_emit_fpa_postfix(attr->load_store_mode);
+}
+
+void arm_emit_float_arithmetic_mode(const ir_node *node)
+{
+ const arm_farith_attr_t *attr = get_arm_farith_attr_const(node);
+ arm_emit_fpa_postfix(attr->mode);
+}
+
+void arm_emit_symconst(const ir_node *node)
+{
+ const arm_SymConst_attr_t *symconst = get_arm_SymConst_attr_const(node);
+ ir_entity *entity = symconst->entity;
+
+ be_gas_emit_entity(entity);
- if (is_arm_irn(node)) {
- const arm_attr_t *attr = get_arm_attr_const(node);
- mode = attr->op_mode ? attr->op_mode : get_irn_mode(node);
+ /* TODO do something with offset */
+}
+
+void arm_emit_load_mode(const ir_node *node)
+{
+ const arm_load_store_attr_t *attr = get_arm_load_store_attr_const(node);
+ ir_mode *mode = attr->load_store_mode;
+ int bits = get_mode_size_bits(mode);
+ bool is_signed = mode_is_signed(mode);
+ if (bits == 16) {
+ be_emit_string(is_signed ? "sh" : "h");
+ } else if (bits == 8) {
+ be_emit_string(is_signed ? "sb" : "b");
} else {
- mode = get_irn_mode(node);
+ assert(bits == 32);
}
- arm_emit_fpa_postfix(mode);
}
-/**
- * Emit a const or SymConst value.
- */
-void arm_emit_immediate(const ir_node *node) {
- const arm_attr_t *attr = get_arm_attr_const(node);
-
- if (ARM_GET_SHF_MOD(attr) == ARM_SHF_IMM) {
- be_emit_irprintf("#0x%X", arm_decode_imm_w_shift(get_arm_imm_value(node)));
- } else if (ARM_GET_FPA_IMM(attr)) {
- be_emit_irprintf("#%s", arm_get_fpa_imm_name(get_arm_imm_value(node)));
- } else if (is_arm_SymConst(node))
- be_emit_ident(get_arm_symconst_id(node));
- else {
- assert(!"not a Constant");
+void arm_emit_store_mode(const ir_node *node)
+{
+ const arm_load_store_attr_t *attr = get_arm_load_store_attr_const(node);
+ ir_mode *mode = attr->load_store_mode;
+ int bits = get_mode_size_bits(mode);
+ if (bits == 16) {
+ be_emit_cstring("h");
+ } else if (bits == 8) {
+ be_emit_cstring("b");
+ } else {
+ assert(bits == 32);
}
}
-/**
- * Returns the tarval or offset of an arm node as a string.
- */
-void arm_emit_shift(const ir_node *node) {
- arm_shift_modifier mod;
+static void emit_shf_mod_name(arm_shift_modifier_t mod)
+{
+ switch (mod) {
+ case ARM_SHF_ASR_REG:
+ case ARM_SHF_ASR_IMM:
+ be_emit_cstring("asr");
+ return;
+ case ARM_SHF_LSL_REG:
+ case ARM_SHF_LSL_IMM:
+ be_emit_cstring("lsl");
+ return;
+ case ARM_SHF_LSR_REG:
+ case ARM_SHF_LSR_IMM:
+ be_emit_cstring("lsr");
+ return;
+ case ARM_SHF_ROR_REG:
+ case ARM_SHF_ROR_IMM:
+ be_emit_cstring("ror");
+ return;
+ default:
+ break;
+ }
+ panic("can't emit this shf_mod_name %d", (int) mod);
+}
- mod = get_arm_shift_modifier(node);
- if (ARM_HAS_SHIFT(mod)) {
- long v = get_arm_imm_value(node);
+void arm_emit_shifter_operand(const ir_node *node)
+{
+ const arm_shifter_operand_t *attr = get_arm_shifter_operand_attr_const(node);
- be_emit_irprintf(", %s #%l", arm_shf_mod_name(mod), v);
+ switch (attr->shift_modifier) {
+ case ARM_SHF_REG:
+ arm_emit_source_register(node, get_irn_arity(node) - 1);
+ return;
+ case ARM_SHF_IMM: {
+ unsigned val = attr->immediate_value;
+ val = (val >> attr->shift_immediate)
+ | (val << (32-attr->shift_immediate));
+ val &= 0xFFFFFFFF;
+ be_emit_irprintf("#0x%X", val);
+ return;
}
+ case ARM_SHF_ASR_IMM:
+ case ARM_SHF_LSL_IMM:
+ case ARM_SHF_LSR_IMM:
+ case ARM_SHF_ROR_IMM:
+ arm_emit_source_register(node, get_irn_arity(node) - 1);
+ be_emit_cstring(", ");
+ emit_shf_mod_name(attr->shift_modifier);
+ be_emit_irprintf(" #0x%X", attr->shift_immediate);
+ return;
+
+ case ARM_SHF_ASR_REG:
+ case ARM_SHF_LSL_REG:
+ case ARM_SHF_LSR_REG:
+ case ARM_SHF_ROR_REG:
+ arm_emit_source_register(node, get_irn_arity(node) - 2);
+ be_emit_cstring(", ");
+ emit_shf_mod_name(attr->shift_modifier);
+ be_emit_cstring(" ");
+ arm_emit_source_register(node, get_irn_arity(node) - 1);
+ return;
+
+ case ARM_SHF_RRX:
+ arm_emit_source_register(node, get_irn_arity(node) - 1);
+ panic("RRX shifter emitter TODO");
+
+ case ARM_SHF_INVALID:
+ break;
+ }
+ panic("Invalid shift_modifier while emitting %+F", node);
}
/** An entry in the sym_or_tv set. */
typedef struct sym_or_tv_t {
union {
- ident *id; /**< An ident. */
- tarval *tv; /**< A tarval. */
+ ir_entity *entity; /**< An entity. */
+ ir_tarval *tv; /**< A tarval. */
const void *generic; /**< For generic compare. */
} u;
unsigned label; /**< the associated label. */
- char is_ident; /**< Non-zero if an ident is stored. */
+ bool is_entity; /**< true if an entity is stored. */
} sym_or_tv_t;
/**
* Returns a unique label. This number will not be used a second time.
*/
-static unsigned get_unique_label(void) {
+static unsigned get_unique_label(void)
+{
static unsigned id = 0;
return ++id;
}
+static void emit_constant_name(const sym_or_tv_t *entry)
+{
+ be_emit_irprintf("%sC%u", be_gas_get_private_prefix(), entry->label);
+}
+
/**
* Emit a SymConst.
*/
-static void emit_arm_SymConst(const ir_node *irn) {
+static void emit_arm_SymConst(const ir_node *irn)
+{
+ const arm_SymConst_attr_t *attr = get_arm_SymConst_attr_const(irn);
sym_or_tv_t key, *entry;
- unsigned label;
- key.u.id = get_arm_symconst_id(irn);
- key.is_ident = 1;
- key.label = 0;
- entry = (sym_or_tv_t *)set_insert(sym_or_tv, &key, sizeof(key), HASH_PTR(key.u.generic));
+ key.u.entity = attr->entity;
+ key.is_entity = true;
+ key.label = 0;
+ entry = set_insert(sym_or_tv_t, sym_or_tv, &key, sizeof(key), hash_ptr(key.u.generic));
if (entry->label == 0) {
/* allocate a label */
entry->label = get_unique_label();
}
- label = entry->label;
/* load the symbol indirect */
be_emit_cstring("\tldr ");
arm_emit_dest_register(irn, 0);
- be_emit_irprintf(", .L%u", label);
+ be_emit_cstring(", ");
+ emit_constant_name(entry);
+ be_emit_finish_line_gas(irn);
+}
+
+static void emit_arm_FrameAddr(const ir_node *irn)
+{
+ const arm_SymConst_attr_t *attr = get_arm_SymConst_attr_const(irn);
+
+ be_emit_cstring("\tadd ");
+ arm_emit_dest_register(irn, 0);
+ be_emit_cstring(", ");
+ arm_emit_source_register(irn, 0);
+ be_emit_cstring(", ");
+ be_emit_irprintf("#0x%X", attr->fp_offset);
be_emit_finish_line_gas(irn);
}
/**
* Emit a floating point fpa constant.
*/
-static void emit_arm_fpaConst(const ir_node *irn) {
+static void emit_arm_fConst(const ir_node *irn)
+{
sym_or_tv_t key, *entry;
- unsigned label;
ir_mode *mode;
- key.u.tv = get_fpaConst_value(irn);
- key.is_ident = 0;
- key.label = 0;
- entry = (sym_or_tv_t *)set_insert(sym_or_tv, &key, sizeof(key), HASH_PTR(key.u.generic));
+ key.u.tv = get_fConst_value(irn);
+ key.is_entity = false;
+ key.label = 0;
+ entry = set_insert(sym_or_tv_t, sym_or_tv, &key, sizeof(key), hash_ptr(key.u.generic));
if (entry->label == 0) {
/* allocate a label */
entry->label = get_unique_label();
}
- label = entry->label;
/* load the tarval indirect */
mode = get_irn_mode(irn);
be_emit_char(' ');
arm_emit_dest_register(irn, 0);
- be_emit_irprintf(", .L%u", label);
+ be_emit_cstring(", ");
+ emit_constant_name(entry);
be_emit_finish_line_gas(irn);
}
/**
* Returns the next block in a block schedule.
*/
-static ir_node *sched_next_block(const ir_node *block) {
- return get_irn_link(block);
+static ir_node *sched_next_block(const ir_node *block)
+{
+ return (ir_node*)get_irn_link(block);
}
/**
* Returns the target block for a control flow node.
*/
-static ir_node *get_cfop_target_block(const ir_node *irn) {
- return get_irn_link(irn);
-}
-
-/**
- * Emits a block label for the given block.
- */
-static void arm_emit_block_name(const ir_node *block) {
- if (has_Block_label(block)) {
- be_emit_string(be_gas_label_prefix());
- be_emit_irprintf("%lu", get_Block_label(block));
- } else {
- be_emit_cstring(BLOCK_PREFIX);
- be_emit_irprintf("%d", get_irn_node_nr(block));
- }
+static ir_node *get_cfop_target_block(const ir_node *irn)
+{
+ return (ir_node*)get_irn_link(irn);
}
/**
* Emit the target label for a control flow node.
*/
-static void arm_emit_cfop_target(const ir_node *irn) {
+static void arm_emit_cfop_target(const ir_node *irn)
+{
ir_node *block = get_cfop_target_block(irn);
- arm_emit_block_name(block);
+ be_gas_emit_block_name(block);
}
/**
* Emit a Compare with conditional branch.
*/
-static void emit_arm_CmpBra(const ir_node *irn) {
+static void emit_arm_B(const ir_node *irn)
+{
const ir_edge_t *edge;
const ir_node *proj_true = NULL;
const ir_node *proj_false = NULL;
const ir_node *block;
const ir_node *next_block;
ir_node *op1 = get_irn_n(irn, 0);
- ir_mode *opmode = get_irn_mode(op1);
const char *suffix;
- int proj_num = get_arm_CondJmp_proj_num(irn);
+ ir_relation relation = get_arm_CondJmp_relation(irn);
+ const arm_cmp_attr_t *cmp_attr = get_arm_cmp_attr_const(op1);
+ bool is_signed = !cmp_attr->is_unsigned;
+
+ assert(is_arm_Cmp(op1) || is_arm_Tst(op1));
foreach_out_edge(irn, edge) {
ir_node *proj = get_edge_src_irn(edge);
}
}
+ if (cmp_attr->ins_permuted) {
+ relation = get_inversed_relation(relation);
+ }
+
/* for now, the code works for scheduled and non-schedules blocks */
block = get_nodes_block(irn);
/* we have a block schedule */
next_block = sched_next_block(block);
- if (proj_num == pn_Cmp_False) {
- /* always false: should not happen */
- be_emit_cstring("\tb ");
- arm_emit_cfop_target(proj_false);
- be_emit_finish_line_gas(proj_false);
- } else if (proj_num == pn_Cmp_True) {
- /* always true: should not happen */
- be_emit_cstring("\tb ");
- arm_emit_cfop_target(proj_true);
- be_emit_finish_line_gas(proj_true);
- } else {
- if (mode_is_float(opmode)) {
- suffix = "ICHWILLIMPLEMENTIERTWERDEN";
+ assert(relation != ir_relation_false);
+ assert(relation != ir_relation_true);
- be_emit_cstring("\tfcmp ");
- arm_emit_source_register(irn, 0);
- be_emit_cstring(", ");
- arm_emit_source_register(irn, 1);
- be_emit_finish_line_gas(irn);
+ if (get_cfop_target_block(proj_true) == next_block) {
+ /* exchange both proj's so the second one can be omitted */
+ const ir_node *t = proj_true;
- be_emit_cstring("\tfmstat");
- be_emit_pad_comment();
- be_emit_cstring("/* FCSPR -> CPSR */");
- be_emit_finish_line_gas(NULL);
- } else {
- if (get_cfop_target_block(proj_true) == next_block) {
- /* exchange both proj's so the second one can be omitted */
- const ir_node *t = proj_true;
+ proj_true = proj_false;
+ proj_false = t;
+ relation = get_negated_relation(relation);
+ }
- proj_true = proj_false;
- proj_false = t;
- proj_num = get_negated_pnc(proj_num, mode_Iu);
- }
- switch (proj_num) {
- case pn_Cmp_Eq: suffix = "eq"; break;
- case pn_Cmp_Lt: suffix = "lt"; break;
- case pn_Cmp_Le: suffix = "le"; break;
- case pn_Cmp_Gt: suffix = "gt"; break;
- case pn_Cmp_Ge: suffix = "ge"; break;
- case pn_Cmp_Lg: suffix = "ne"; break;
- case pn_Cmp_Leg: suffix = "al"; break;
- default: assert(!"Cmp unsupported"); suffix = "al";
- }
- be_emit_cstring("\tcmp ");
- arm_emit_source_register(irn, 0);
- be_emit_cstring(", ");
- arm_emit_source_register(irn, 1);
- be_emit_finish_line_gas(irn);
- }
+ switch (relation & (ir_relation_less_equal_greater)) {
+ case ir_relation_equal: suffix = "eq"; break;
+ case ir_relation_less: suffix = is_signed ? "lt" : "lo"; break;
+ case ir_relation_less_equal: suffix = is_signed ? "le" : "ls"; break;
+ case ir_relation_greater: suffix = is_signed ? "gt" : "hi"; break;
+ case ir_relation_greater_equal: suffix = is_signed ? "ge" : "hs"; break;
+ case ir_relation_less_greater: suffix = "ne"; break;
+ case ir_relation_less_equal_greater: suffix = "al"; break;
+ default: panic("Cmp has unsupported relation");
+ }
- /* emit the true proj */
- be_emit_irprintf("\tb%s ", suffix);
- arm_emit_cfop_target(proj_true);
- be_emit_finish_line_gas(proj_true);
+ /* emit the true proj */
+ be_emit_irprintf("\tb%s ", suffix);
+ arm_emit_cfop_target(proj_true);
+ be_emit_finish_line_gas(proj_true);
- if (get_cfop_target_block(proj_false) == next_block) {
+ if (get_cfop_target_block(proj_false) == next_block) {
+ if (be_options.verbose_asm) {
be_emit_cstring("\t/* fallthrough to ");
arm_emit_cfop_target(proj_false);
be_emit_cstring(" */");
be_emit_finish_line_gas(proj_false);
- } else {
- be_emit_cstring("b ");
- arm_emit_cfop_target(proj_false);
- be_emit_finish_line_gas(proj_false);
}
+ } else {
+ be_emit_cstring("\tb ");
+ arm_emit_cfop_target(proj_false);
+ be_emit_finish_line_gas(proj_false);
}
}
-/**
- * Emit a Compare with conditional branch.
- */
-static void emit_arm_fpaCmfBra(const ir_node *irn) {
- (void) irn;
-}
-
-/**
- * Emit a Compare with conditional branch.
- */
-static void emit_arm_fpaCmfeBra(const ir_node *irn) {
- (void) irn;
-}
-
/** Sort register in ascending order. */
-static int reg_cmp(const void *a, const void *b) {
- const arch_register_t * const *ra = a;
- const arch_register_t * const *rb = b;
+static int reg_cmp(const void *a, const void *b)
+{
+ const arch_register_t * const *ra = (const arch_register_t**)a;
+ const arch_register_t * const *rb = (const arch_register_t**)b;
return *ra < *rb ? -1 : (*ra != *rb);
}
/**
* Create the CopyB instruction sequence.
*/
-static void emit_arm_CopyB(const ir_node *irn) {
- unsigned size = (unsigned)get_arm_imm_value(irn);
+static void emit_arm_CopyB(const ir_node *irn)
+{
+ const arm_CopyB_attr_t *attr = get_arm_CopyB_attr_const(irn);
+ unsigned size = attr->size;
- const char *tgt = arch_register_get_name(get_in_reg(irn, 0));
- const char *src = arch_register_get_name(get_in_reg(irn, 1));
+ const char *tgt = arch_register_get_name(arch_get_irn_register_in(irn, 0));
+ const char *src = arch_register_get_name(arch_get_irn_register_in(irn, 1));
const char *t0, *t1, *t2, *t3;
const arch_register_t *tmpregs[4];
/* collect the temporary registers and sort them, we need ascending order */
- tmpregs[0] = get_in_reg(irn, 2);
- tmpregs[1] = get_in_reg(irn, 3);
- tmpregs[2] = get_in_reg(irn, 4);
- tmpregs[3] = &arm_gp_regs[REG_R12];
+ tmpregs[0] = arch_get_irn_register_in(irn, 2);
+ tmpregs[1] = arch_get_irn_register_in(irn, 3);
+ tmpregs[2] = arch_get_irn_register_in(irn, 4);
+ tmpregs[3] = &arm_registers[REG_R12];
/* Note: R12 is always the last register because the RA did not assign higher ones */
qsort((void *)tmpregs, 3, sizeof(tmpregs[0]), reg_cmp);
t2 = arch_register_get_name(tmpregs[2]);
t3 = arch_register_get_name(tmpregs[3]);
- be_emit_cstring("/* MemCopy (");
- be_emit_string(src);
- be_emit_cstring(")->(");
- arm_emit_source_register(irn, 0);
- be_emit_irprintf(" [%u bytes], Uses ", size);
- be_emit_string(t0);
- be_emit_cstring(", ");
- be_emit_string(t1);
- be_emit_cstring(", ");
- be_emit_string(t2);
- be_emit_cstring(", and ");
- be_emit_string(t3);
- be_emit_cstring("*/");
- be_emit_finish_line_gas(NULL);
+ if (be_options.verbose_asm) {
+ be_emit_cstring("/* MemCopy (");
+ be_emit_string(src);
+ be_emit_cstring(")->(");
+ arm_emit_source_register(irn, 0);
+ be_emit_irprintf(" [%u bytes], Uses ", size);
+ be_emit_string(t0);
+ be_emit_cstring(", ");
+ be_emit_string(t1);
+ be_emit_cstring(", ");
+ be_emit_string(t2);
+ be_emit_cstring(", and ");
+ be_emit_string(t3);
+ be_emit_cstring("*/");
+ be_emit_finish_line_gas(NULL);
+ }
assert(size > 0 && "CopyB needs size > 0" );
if (size & 3) {
- assert(!"strange hack enabled: copy more bytes than needed!");
+ fprintf(stderr, "strange hack enabled: copy more bytes than needed!");
size += 4;
}
}
}
-static void emit_arm_SwitchJmp(const ir_node *irn) {
- const ir_edge_t *edge;
- ir_node *proj;
- int i;
- ir_node **projs;
- int n_projs;
- int block_nr;
- ir_node *default_proj = NULL;
-
- block_nr = get_irn_node_nr(irn);
- n_projs = get_arm_SwitchJmp_n_projs(irn);
-
- projs = xcalloc(n_projs , sizeof(ir_node*));
-
- foreach_out_edge(irn, edge) {
- proj = get_edge_src_irn(edge);
- assert(is_Proj(proj) && "Only proj allowed at SwitchJmp");
-
- if (get_Proj_proj(proj) == get_arm_SwitchJmp_default_proj_num(irn))
- default_proj = proj;
-
- projs[get_Proj_proj(proj)] = proj;
- }
- assert(default_proj != NULL && "SwitchJmp should have a Default Proj");
-
- /*
- CMP %1S, n_projs - 1
- BHI default
- */
-
- be_emit_cstring("\tcmp ");
+static void emit_arm_SwitchJmp(const ir_node *irn)
+{
+ const arm_SwitchJmp_attr_t *attr = get_arm_SwitchJmp_attr_const(irn);
+ be_emit_cstring("\tldrls pc, [pc, ");
arm_emit_source_register(irn, 0);
- be_emit_irprintf(", #%u", n_projs - 1);
+ be_emit_cstring(", asl #2]");
be_emit_finish_line_gas(irn);
- be_emit_cstring("\tbhi ");
- arm_emit_cfop_target(default_proj);
- be_emit_finish_line_gas(default_proj);
-
- /*
- LDR %r12, .TABLE_X_START
- ADD %r12, %r12, [%1S, LSL #2]
- LDR %r15, %r12
- */
-
- be_emit_irprintf("\tldr %%r12, TABLE_%d_START", block_nr);
- be_emit_finish_line_gas(NULL);
-
- be_emit_irprintf("\tadd %%r12, %%r12, ");
- arm_emit_source_register(irn, 0);
- be_emit_cstring(", LSL #2");
- be_emit_finish_line_gas(NULL);
-
- be_emit_cstring("\tldr %r15, [%r12, #0]");
- be_emit_finish_line_gas(NULL);
-
- be_emit_irprintf("TABLE_%d_START:\n\t.word\tTABLE_%d", block_nr, block_nr);
- be_emit_finish_line_gas(NULL);
- be_emit_irprintf("\t.align 2");
- be_emit_finish_line_gas(NULL);
- be_emit_irprintf("TABLE_%d:", block_nr);
- be_emit_finish_line_gas(NULL);
-
- for (i = 0; i < n_projs; ++i) {
- proj = projs[i];
- if (proj == NULL) {
- proj = projs[get_arm_SwitchJmp_default_proj_num(irn)];
- }
- be_emit_cstring("\t.word\t");
- arm_emit_cfop_target(proj);
- be_emit_finish_line_gas(proj);
- }
- be_emit_irprintf("\t.align 2\n");
- be_emit_finish_line_gas(NULL);
- xfree(projs);
-}
-
-/************************************************************************/
-/* emit_be */
-/************************************************************************/
-
-static void emit_be_Call(const ir_node *irn) {
- ir_entity *ent = be_Call_get_entity(irn);
-
- be_emit_cstring("\tbl ");
- if (ent) {
- set_entity_backend_marked(ent, 1);
- be_emit_ident(get_entity_ld_ident(ent));
- } else {
- arm_emit_source_register(irn, be_pos_Call_ptr);
- }
- be_emit_finish_line_gas(irn);
+ be_emit_jump_table(irn, attr->table, NULL, get_cfop_target_block);
}
/** Emit an IncSP node */
-static void emit_be_IncSP(const ir_node *irn) {
- int offs = be_get_IncSP_offset(irn);
+static void emit_be_IncSP(const ir_node *irn)
+{
+ int offs = -be_get_IncSP_offset(irn);
if (offs != 0) {
- be_emit_cstring("\tadd ");
+ if (offs < 0) {
+ be_emit_cstring("\tsub ");
+ offs = -offs;
+ } else {
+ be_emit_cstring("\tadd ");
+ }
arm_emit_dest_register(irn, 0);
be_emit_cstring(", ");
arm_emit_source_register(irn, 0);
- be_emit_cstring(", #");
- arm_emit_offset(irn);
+ be_emit_irprintf(", #0x%X", offs);
+ be_emit_finish_line_gas(irn);
} else {
- be_emit_cstring("\t/* omitted IncSP(");
- arm_emit_offset(irn);
- be_emit_cstring(") */");
+ /* omitted IncSP(0) */
+ return;
}
- be_emit_finish_line_gas(irn);
}
-static void emit_be_Copy(const ir_node *irn) {
+static void emit_be_Copy(const ir_node *irn)
+{
ir_mode *mode = get_irn_mode(irn);
- if (get_in_reg(irn, 0) == get_out_reg(irn, 0)) {
- be_emit_cstring("\t/* omitted Copy: ");
- arm_emit_source_register(irn, 0);
- be_emit_cstring(" -> ");
- arm_emit_dest_register(irn, 0);
- be_emit_finish_line_gas(irn);
+ if (arch_get_irn_register_in(irn, 0) == arch_get_irn_register_out(irn, 0)) {
+ /* omitted Copy */
return;
}
if (mode_is_float(mode)) {
if (USE_FPA(isa)) {
be_emit_cstring("\tmvf");
- arm_emit_mode(irn);
be_emit_char(' ');
arm_emit_dest_register(irn, 0);
be_emit_cstring(", ");
arm_emit_source_register(irn, 0);
be_emit_finish_line_gas(irn);
} else {
- assert(0 && "move not supported for this mode");
panic("emit_be_Copy: move not supported for this mode");
}
} else if (mode_is_data(mode)) {
arm_emit_dest_register(irn, 0);
be_emit_cstring(", ");
arm_emit_source_register(irn, 0);
- be_emit_finish_line_gas(irn);
+ be_emit_finish_line_gas(irn);
} else {
- assert(0 && "move not supported for this mode");
panic("emit_be_Copy: move not supported for this mode");
}
}
-/**
- * Emit code for a Spill.
- */
-static void emit_be_Spill(const ir_node *irn) {
- ir_mode *mode = get_irn_mode(be_get_Spill_val(irn));
-
- if (mode_is_float(mode)) {
- if (USE_FPA(cg->isa)) {
- be_emit_cstring("\tstf");
- arm_emit_fpa_postfix(mode);
- be_emit_char(' ');
- } else {
- assert(0 && "spill not supported for this mode");
- panic("emit_be_Spill: spill not supported for this mode");
- }
- } else if (mode_is_dataM(mode)) {
- be_emit_cstring("\tstr ");
- } else {
- assert(0 && "spill not supported for this mode");
- panic("emit_be_Spill: spill not supported for this mode");
- }
- arm_emit_source_register(irn, 1);
- be_emit_cstring(", [");
- arm_emit_source_register(irn, 0);
- be_emit_cstring(", #");
- arm_emit_offset(irn);
- be_emit_char(']');
- be_emit_finish_line_gas(irn);
-}
-
-/**
- * Emit code for a Reload.
- */
-static void emit_be_Reload(const ir_node *irn) {
- ir_mode *mode = get_irn_mode(irn);
-
- if (mode_is_float(mode)) {
- if (USE_FPA(cg->isa)) {
- be_emit_cstring("\tldf");
- arm_emit_fpa_postfix(mode);
- be_emit_char(' ');
- } else {
- assert(0 && "reload not supported for this mode");
- panic("emit_be_Reload: reload not supported for this mode");
- }
- } else if (mode_is_dataM(mode)) {
- be_emit_cstring("\tldr ");
- } else {
- assert(0 && "reload not supported for this mode");
- panic("emit_be_Reload: reload not supported for this mode");
- }
- arm_emit_dest_register(irn, 0);
- be_emit_cstring(", [");
- arm_emit_source_register(irn, 0);
- be_emit_cstring(", #");
- arm_emit_offset(irn);
- be_emit_char(']');
- be_emit_finish_line_gas(irn);
-}
-
-static void emit_be_Perm(const ir_node *irn) {
+static void emit_be_Perm(const ir_node *irn)
+{
be_emit_cstring("\teor ");
arm_emit_source_register(irn, 0);
be_emit_cstring(", ");
be_emit_finish_line_gas(irn);
}
-/************************************************************************/
-/* emit */
-/************************************************************************/
+static void emit_be_MemPerm(const ir_node *node)
+{
+ int i;
+ int memperm_arity;
+ int sp_change = 0;
+
+ /* TODO: this implementation is slower than necessary.
+ The longterm goal is however to avoid the memperm node completely */
+
+ memperm_arity = be_get_MemPerm_entity_arity(node);
+ if (memperm_arity > 12)
+ panic("memperm with more than 12 inputs not supported yet");
+
+ for (i = 0; i < memperm_arity; ++i) {
+ int offset;
+ ir_entity *entity = be_get_MemPerm_in_entity(node, i);
+
+ /* spill register */
+ be_emit_irprintf("\tstr r%d, [sp, #-4]!", i);
+ be_emit_finish_line_gas(node);
+ sp_change += 4;
+ /* load from entity */
+ offset = get_entity_offset(entity) + sp_change;
+ be_emit_irprintf("\tldr r%d, [sp, #%d]", i, offset);
+ be_emit_finish_line_gas(node);
+ }
+
+ for (i = memperm_arity-1; i >= 0; --i) {
+ int offset;
+ ir_entity *entity = be_get_MemPerm_out_entity(node, i);
+
+ /* store to new entity */
+ offset = get_entity_offset(entity) + sp_change;
+ be_emit_irprintf("\tstr r%d, [sp, #%d]", i, offset);
+ be_emit_finish_line_gas(node);
+ /* restore register */
+ be_emit_irprintf("\tldr r%d, [sp], #4", i);
+ sp_change -= 4;
+ be_emit_finish_line_gas(node);
+ }
+ assert(sp_change == 0);
+}
+
+static void emit_be_Start(const ir_node *node)
+{
+ ir_graph *irg = get_irn_irg(node);
+ ir_type *frame_type = get_irg_frame_type(irg);
+ unsigned size = get_type_size_bytes(frame_type);
+
+ /* allocate stackframe */
+ if (size > 0) {
+ be_emit_cstring("\tsub ");
+ arm_emit_register(&arm_registers[REG_SP]);
+ be_emit_cstring(", ");
+ arm_emit_register(&arm_registers[REG_SP]);
+ be_emit_irprintf(", #0x%X", size);
+ be_emit_finish_line_gas(node);
+ }
+}
+
+static void emit_be_Return(const ir_node *node)
+{
+ ir_graph *irg = get_irn_irg(node);
+ ir_type *frame_type = get_irg_frame_type(irg);
+ unsigned size = get_type_size_bytes(frame_type);
+
+ /* deallocate stackframe */
+ if (size > 0) {
+ be_emit_cstring("\tadd ");
+ arm_emit_register(&arm_registers[REG_SP]);
+ be_emit_cstring(", ");
+ arm_emit_register(&arm_registers[REG_SP]);
+ be_emit_irprintf(", #0x%X", size);
+ be_emit_finish_line_gas(node);
+ }
-static void emit_Jmp(const ir_node *node) {
+ be_emit_cstring("\tmov pc, lr");
+ be_emit_finish_line_gas(node);
+}
+
+
+static void emit_arm_Jmp(const ir_node *node)
+{
ir_node *block, *next_block;
/* for now, the code works for scheduled and non-schedules blocks */
if (get_cfop_target_block(node) != next_block) {
be_emit_cstring("\tb ");
arm_emit_cfop_target(node);
+ be_emit_finish_line_gas(node);
} else {
- be_emit_cstring("\t/* fallthrough to ");
- arm_emit_cfop_target(node);
- be_emit_cstring(" */");
+ if (be_options.verbose_asm) {
+ be_emit_cstring("\t/* fallthrough to ");
+ arm_emit_cfop_target(node);
+ be_emit_cstring(" */");
+ be_emit_finish_line_gas(node);
+ }
}
- be_emit_finish_line_gas(node);
-}
-
-static void emit_arm_fpaDbl2GP(const ir_node *irn) {
- be_emit_cstring("\tstfd ");
- arm_emit_source_register(irn, 0);
- be_emit_cstring(", [sp, #-8]!");
- be_emit_pad_comment();
- be_emit_cstring("/* Push fp to stack */");
- be_emit_finish_line_gas(NULL);
-
- be_emit_cstring("\tldmfd sp!, {");
- arm_emit_dest_register(irn, 1);
- be_emit_cstring(", ");
- arm_emit_dest_register(irn, 0);
- be_emit_char('}');
- be_emit_pad_comment();
- be_emit_cstring("/* Pop destination */");
- be_emit_finish_line_gas(irn);
-}
-
-static void emit_arm_LdTls(const ir_node *irn) {
- (void) irn;
- panic("TLS not supported for this target\n");
- /* Er... our gcc does not support it... Install a newer toolchain. */
}
-/***********************************************************************************
- * _ __ _
- * (_) / _| | |
- * _ __ ___ __ _ _ _ __ | |_ _ __ __ _ _ __ ___ _____ _____ _ __| | __
- * | '_ ` _ \ / _` | | '_ \ | _| '__/ _` | '_ ` _ \ / _ \ \ /\ / / _ \| '__| |/ /
- * | | | | | | (_| | | | | | | | | | | (_| | | | | | | __/\ V V / (_) | | | <
- * |_| |_| |_|\__,_|_|_| |_| |_| |_| \__,_|_| |_| |_|\___| \_/\_/ \___/|_| |_|\_\
- *
- ***********************************************************************************/
-
-static void emit_silence(const ir_node *irn) {
+static void emit_nothing(const ir_node *irn)
+{
(void) irn;
- /* Do nothing. */
}
/**
/**
* Set a node emitter. Make it a bit more type safe.
*/
-static INLINE void set_emitter(ir_op *op, emit_func arm_emit_node) {
+static inline void set_emitter(ir_op *op, emit_func arm_emit_node)
+{
op->ops.generic = (op_func)arm_emit_node;
}
* Enters the emitter functions for handled nodes into the generic
* pointer of an opcode.
*/
-static void arm_register_emitters(void) {
-
-#define ARM_EMIT(a) set_emitter(op_arm_##a, emit_arm_##a)
-#define EMIT(a) set_emitter(op_##a, emit_##a)
-#define BE_EMIT(a) set_emitter(op_be_##a, emit_be_##a)
-#define SILENCE(a) set_emitter(op_##a, emit_silence)
-
+static void arm_register_emitters(void)
+{
/* first clear the generic function pointer for all ops */
- clear_irp_opcodes_generic_func();
+ ir_clear_opcodes_generic_func();
/* register all emitter functions defined in spec */
arm_register_spec_emitters();
- /* other emitter functions */
- ARM_EMIT(CmpBra);
- ARM_EMIT(fpaCmfBra);
- ARM_EMIT(fpaCmfeBra);
- ARM_EMIT(CopyB);
-// ARM_EMIT(CopyB_i);
-// ARM_EMIT(Const);
- ARM_EMIT(SymConst);
- ARM_EMIT(SwitchJmp);
- ARM_EMIT(fpaDbl2GP);
- ARM_EMIT(fpaConst);
- ARM_EMIT(LdTls);
-
- /* benode emitter */
- BE_EMIT(Call);
- BE_EMIT(IncSP);
- BE_EMIT(Copy);
- BE_EMIT(Spill);
- BE_EMIT(Reload);
- BE_EMIT(Perm);
-
- /* firm emitter */
- EMIT(Jmp);
-
- /* noisy stuff */
-#ifdef SILENCER
- SILENCE(Start);
- SILENCE(Proj);
- SILENCE(Phi);
- SILENCE(be_Keep);
- SILENCE(be_CopyKeep);
- SILENCE(be_RegParams);
- SILENCE(be_Barrier);
- SILENCE(be_Return);
-#endif
-
-#undef ARM_EMIT
-#undef BE_EMIT
-#undef EMIT
-#undef SILENCE
+ /* custom emitter */
+ set_emitter(op_arm_B, emit_arm_B);
+ set_emitter(op_arm_CopyB, emit_arm_CopyB);
+ set_emitter(op_arm_fConst, emit_arm_fConst);
+ set_emitter(op_arm_FrameAddr, emit_arm_FrameAddr);
+ set_emitter(op_arm_Jmp, emit_arm_Jmp);
+ set_emitter(op_arm_SwitchJmp, emit_arm_SwitchJmp);
+ set_emitter(op_arm_SymConst, emit_arm_SymConst);
+ set_emitter(op_be_Copy, emit_be_Copy);
+ set_emitter(op_be_CopyKeep, emit_be_Copy);
+ set_emitter(op_be_IncSP, emit_be_IncSP);
+ set_emitter(op_be_MemPerm, emit_be_MemPerm);
+ set_emitter(op_be_Perm, emit_be_Perm);
+ set_emitter(op_be_Return, emit_be_Return);
+ set_emitter(op_be_Start, emit_be_Start);
+
+ /* no need to emit anything for the following nodes */
+ set_emitter(op_Phi, emit_nothing);
+ set_emitter(op_be_Keep, emit_nothing);
}
/**
* Emits code for a node.
*/
-static void arm_emit_node(const ir_node *irn) {
+static void arm_emit_node(const ir_node *irn)
+{
ir_op *op = get_irn_op(irn);
if (op->ops.generic) {
emit_func *emit = (emit_func *)op->ops.generic;
- be_dbg_set_dbg_info(get_irn_dbg_info(irn));
+ be_dwarf_location(get_irn_dbg_info(irn));
(*emit)(irn);
} else {
- be_emit_cstring("\t/* TODO */");
- be_emit_finish_line_gas(irn);
+ panic("Error: No emit handler for node %+F (graph %+F)\n",
+ irn, get_irn_irg(irn));
}
}
*/
static void arm_emit_block_header(ir_node *block, ir_node *prev)
{
- int n_cfgpreds;
- int need_label;
- int i, arity;
- ir_exec_freq *exec_freq = cg->birg->exec_freq;
+ bool need_label = false;
+ int n_cfgpreds;
- need_label = 0;
n_cfgpreds = get_Block_n_cfgpreds(block);
if (n_cfgpreds == 1) {
ir_node *pred = get_Block_cfgpred(block, 0);
* are no fallthroughs */
if (pred_block == prev &&
!(is_Proj(pred) && is_arm_SwitchJmp(get_Proj_pred(pred)))) {
- need_label = 0;
+ need_label = false;
} else {
- need_label = 1;
+ need_label = true;
}
} else {
- need_label = 1;
+ need_label = true;
}
- if (need_label) {
- arm_emit_block_name(block);
- be_emit_char(':');
-
- be_emit_pad_comment();
- be_emit_cstring(" /* preds:");
-
- /* emit list of pred blocks in comment */
- arity = get_irn_arity(block);
- for (i = 0; i < arity; ++i) {
- ir_node *predblock = get_Block_cfgpred_block(block, i);
- be_emit_irprintf(" %d", get_irn_node_nr(predblock));
- }
- } else {
- be_emit_cstring("\t/* ");
- arm_emit_block_name(block);
- be_emit_cstring(": ");
- }
- if (exec_freq != NULL) {
- be_emit_irprintf(" freq: %f",
- get_block_execfreq(exec_freq, block));
- }
- be_emit_cstring(" */\n");
- be_emit_write_line();
+ be_gas_begin_block(block, need_label);
}
/**
* Walks over the nodes in a block connected by scheduling edges
* and emits code for each node.
*/
-static void arm_gen_block(ir_node *block, ir_node *prev_block) {
+static void arm_gen_block(ir_node *block, ir_node *prev_block)
+{
ir_node *irn;
arm_emit_block_header(block, prev_block);
- be_dbg_set_dbg_info(get_irn_dbg_info(block));
+ be_dwarf_location(get_irn_dbg_info(block));
sched_foreach(block, irn) {
arm_emit_node(irn);
}
}
-/**
- * Emits code for function start.
- */
-void arm_func_prolog(ir_graph *irg) {
- ir_entity *ent = get_irg_entity(irg);
- const char *irg_name = get_entity_ld_name(ent);
-
- be_emit_write_line();
- be_gas_emit_switch_section(GAS_SECTION_TEXT);
- be_emit_cstring("\t.align 2\n");
-
- if (get_entity_visibility(ent) == visibility_external_visible)
- be_emit_irprintf("\t.global %s\n", irg_name);
- be_emit_irprintf("%s:\n", irg_name);
-}
-
-/**
- * Emits code for function end
- */
-void arm_emit_end(FILE *F, ir_graph *irg) {
- (void) irg;
- fprintf(F, "\t.ident \"firmcc\"\n");
-}
-
/**
* Block-walker:
* Sets labels for control flow nodes (jump target)
*/
-static void arm_gen_labels(ir_node *block, void *env) {
+static void arm_gen_labels(ir_node *block, void *env)
+{
ir_node *pred;
int n = get_Block_n_cfgpreds(block);
(void)env;
/**
* Compare two entries of the symbol or tarval set.
*/
-static int cmp_sym_or_tv(const void *elt, const void *key, size_t size) {
- const sym_or_tv_t *p1 = elt;
- const sym_or_tv_t *p2 = key;
+static int cmp_sym_or_tv(const void *elt, const void *key, size_t size)
+{
+ const sym_or_tv_t *p1 = (const sym_or_tv_t*)elt;
+ const sym_or_tv_t *p2 = (const sym_or_tv_t*)key;
(void) size;
/* as an identifier NEVER can point to a tarval, it's enough
return p1->u.generic != p2->u.generic;
}
-/**
- * Main driver. Emits the code for one routine.
- */
-void arm_gen_routine(const arm_code_gen_t *arm_cg, ir_graph *irg) {
- ir_node **blk_sched;
- int i, n;
- ir_node *last_block = NULL;
-
- cg = arm_cg;
- isa = (const arm_isa_t *)cg->arch_env;
- arch_env = cg->arch_env;
+void arm_gen_routine(ir_graph *irg)
+{
+ ir_node *last_block = NULL;
+ ir_entity *entity = get_irg_entity(irg);
+ const arch_env_t *arch_env = be_get_irg_arch_env(irg);
+ ir_node **blk_sched;
+ size_t i, n;
+
+ isa = (arm_isa_t*) arch_env;
sym_or_tv = new_set(cmp_sym_or_tv, 8);
+ be_gas_elf_type_char = '%';
+
arm_register_emitters();
- /* create the block schedule. For now, we don't need it earlier. */
- blk_sched = be_create_block_schedule(cg->irg, cg->birg->exec_freq);
+ /* create the block schedule */
+ blk_sched = be_create_block_schedule(irg);
+
+ be_gas_emit_function_prolog(entity, 4, NULL);
- arm_func_prolog(irg);
irg_block_walk_graph(irg, arm_gen_labels, NULL, NULL);
n = ARR_LEN(blk_sched);
/* emit SymConst values */
if (set_count(sym_or_tv) > 0) {
- sym_or_tv_t *entry;
-
be_emit_cstring("\t.align 2\n");
- foreach_set(sym_or_tv, entry) {
- be_emit_irprintf(".L%u:\n", entry->label);
+ foreach_set(sym_or_tv, sym_or_tv_t, entry) {
+ emit_constant_name(entry);
+ be_emit_cstring(":\n");
+ be_emit_write_line();
- if (entry->is_ident) {
+ if (entry->is_entity) {
be_emit_cstring("\t.word\t");
- be_emit_ident(entry->u.id);
+ be_gas_emit_entity(entry->u.entity);
be_emit_char('\n');
be_emit_write_line();
} else {
- tarval *tv = entry->u.tv;
- int i, size = get_mode_size_bytes(get_tarval_mode(tv));
- unsigned v;
+ ir_tarval *tv = entry->u.tv;
+ int vi;
+ int size = get_mode_size_bytes(get_tarval_mode(tv));
/* beware: ARM fpa uses big endian format */
- for (i = ((size + 3) & ~3) - 4; i >= 0; i -= 4) {
+ for (vi = ((size + 3) & ~3) - 4; vi >= 0; vi -= 4) {
/* get 32 bits */
- v = get_tarval_sub_bits(tv, i+3);
- v = (v << 8) | get_tarval_sub_bits(tv, i+2);
- v = (v << 8) | get_tarval_sub_bits(tv, i+1);
- v = (v << 8) | get_tarval_sub_bits(tv, i+0);
+ unsigned v;
+ v = get_tarval_sub_bits(tv, vi+3);
+ v = (v << 8) | get_tarval_sub_bits(tv, vi+2);
+ v = (v << 8) | get_tarval_sub_bits(tv, vi+1);
+ v = (v << 8) | get_tarval_sub_bits(tv, vi+0);
be_emit_irprintf("\t.word\t%u\n", v);
be_emit_write_line();
}
be_emit_write_line();
}
del_set(sym_or_tv);
+
+ be_gas_emit_function_epilog(entity);
}
void arm_init_emitter(void)
projects / libfirm / blobdiff