* @author Oliver Richter, Tobias Gneist, Michael Beck
* @version $Id$
*/
-#define SILENCER
-
#include "config.h"
#include <limits.h>
#include "../besched.h"
#include "../beblocksched.h"
-#include "../beirg_t.h"
+#include "../beirg.h"
#include "../begnuas.h"
#include "../be_dbgout.h"
#include "arm_map_regs.h"
#include "gen_arm_regalloc_if.h"
-#include "../benode_t.h"
+#include "../benode.h"
#define BLOCK_PREFIX ".L"
-
#define SNPRINTF_BUF_LEN 128
DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
/**
* Returns the register at in position pos.
*/
-static const arch_register_t *get_in_reg(const ir_node *irn, int pos) {
+static const arch_register_t *get_in_reg(const ir_node *irn, int pos)
+{
ir_node *op;
const arch_register_t *reg = NULL;
return reg;
}
-/*************************************************************
- * _ _ __ _ _
- * (_) | | / _| | | | |
- * _ __ _ __ _ _ __ | |_| |_ | |__ ___| |_ __ ___ _ __
- * | '_ \| '__| | '_ \| __| _| | '_ \ / _ \ | '_ \ / _ \ '__|
- * | |_) | | | | | | | |_| | | | | | __/ | |_) | __/ |
- * | .__/|_| |_|_| |_|\__|_| |_| |_|\___|_| .__/ \___|_|
- * | | | |
- * |_| |_|
- *************************************************************/
-
/**
* Emit the name of the source register at given input position.
*/
/**
* Emit a node's offset.
*/
-void arm_emit_offset(const ir_node *node) {
- int offset = 0;
- ir_opcode opc = get_irn_opcode(node);
+void arm_emit_offset(const ir_node *node)
+{
+ const arm_load_store_attr_t *attr = get_arm_load_store_attr_const(node);
+ assert(attr->base.is_load_store);
- if (opc == beo_Reload || opc == beo_Spill) {
- ir_entity *ent = be_get_frame_entity(node);
- offset = get_entity_offset(ent);
- } else {
- assert(!"unimplemented arm_emit_offset for this node type");
- panic("unimplemented arm_emit_offset for this node type");
- }
- be_emit_irprintf("%d", offset);
+ be_emit_irprintf("0x%X", attr->offset);
}
/**
/**
* Emit a const or SymConst value.
*/
-void arm_emit_immediate(const ir_node *node) {
+void arm_emit_immediate(const ir_node *node)
+{
const arm_attr_t *attr = get_arm_attr_const(node);
- if (ARM_GET_SHF_MOD(attr) == ARM_SHF_IMM) {
- be_emit_irprintf("#0x%X", arm_decode_imm_w_shift(get_arm_imm_value(node)));
- } else if (ARM_GET_FPA_IMM(attr)) {
- be_emit_irprintf("#%s", arm_get_fpa_imm_name(get_arm_imm_value(node)));
- } else if (is_arm_SymConst(node))
- be_emit_ident(get_arm_symconst_id(node));
- else {
+ if (ARM_GET_FPA_IMM(attr)) {
+ /* TODO */
+ //be_emit_irprintf("#%s", arm_get_fpa_imm_name(get_arm_imm_value(node)));
+ } else {
assert(!"not a Constant");
}
}
-/**
- * Returns the tarval or offset of an arm node as a string.
- */
-void arm_emit_shift(const ir_node *node) {
- arm_shift_modifier mod;
+void arm_emit_load_mode(const ir_node *node)
+{
+ const arm_load_store_attr_t *attr = get_arm_load_store_attr_const(node);
+ ir_mode *mode = attr->load_store_mode;
+ int bits = get_mode_size_bits(mode);
+ bool is_signed = mode_is_signed(mode);
+ if (bits == 16) {
+ be_emit_string(is_signed ? "sh" : "h");
+ } else if (bits == 8) {
+ be_emit_string(is_signed ? "sb" : "b");
+ } else {
+ assert(bits == 32);
+ }
+}
+
+void arm_emit_store_mode(const ir_node *node)
+{
+ const arm_load_store_attr_t *attr = get_arm_load_store_attr_const(node);
+ ir_mode *mode = attr->load_store_mode;
+ int bits = get_mode_size_bits(mode);
+ if (bits == 16) {
+ be_emit_cstring("h");
+ } else if (bits == 8) {
+ be_emit_cstring("b");
+ } else {
+ assert(bits == 32);
+ }
+}
- mod = get_arm_shift_modifier(node);
- if (ARM_HAS_SHIFT(mod)) {
- int v = get_arm_imm_value(node);
- be_emit_irprintf(", %s #%d", arm_shf_mod_name(mod), v);
+static void emit_shf_mod_name(arm_shift_modifier mod)
+{
+ switch (mod) {
+ case ARM_SHF_ASR_REG:
+ case ARM_SHF_ASR_IMM:
+ be_emit_cstring("asr");
+ return;
+ case ARM_SHF_LSL_REG:
+ case ARM_SHF_LSL_IMM:
+ be_emit_cstring("lsl");
+ return;
+ case ARM_SHF_LSR_REG:
+ case ARM_SHF_LSR_IMM:
+ be_emit_cstring("lsr");
+ return;
+ case ARM_SHF_ROR_REG:
+ case ARM_SHF_ROR_IMM:
+ be_emit_cstring("ror");
+ return;
+ default:
+ break;
}
+ panic("can't emit this shf_mod_name %d", (int) mod);
+}
+
+void arm_emit_shifter_operand(const ir_node *node)
+{
+ const arm_shifter_operand_t *attr = get_irn_generic_attr_const(node);
+
+ switch (attr->shift_modifier) {
+ case ARM_SHF_REG:
+ arm_emit_source_register(node, get_irn_arity(node) - 1);
+ return;
+ case ARM_SHF_IMM: {
+ unsigned val = attr->immediate_value;
+ val = (val >> attr->shift_immediate)
+ | (val << (32-attr->shift_immediate));
+ val &= 0xFFFFFFFF;
+ be_emit_irprintf("#0x%X", val);
+ return;
+ }
+ case ARM_SHF_ASR_IMM:
+ case ARM_SHF_LSL_IMM:
+ case ARM_SHF_LSR_IMM:
+ case ARM_SHF_ROR_IMM:
+ arm_emit_source_register(node, get_irn_arity(node) - 1);
+ be_emit_cstring(", ");
+ emit_shf_mod_name(attr->shift_modifier);
+ be_emit_irprintf(" #0x%X", attr->shift_immediate);
+ return;
+
+ case ARM_SHF_ASR_REG:
+ case ARM_SHF_LSL_REG:
+ case ARM_SHF_LSR_REG:
+ case ARM_SHF_ROR_REG:
+ arm_emit_source_register(node, get_irn_arity(node) - 2);
+ be_emit_cstring(", ");
+ emit_shf_mod_name(attr->shift_modifier);
+ be_emit_cstring(" ");
+ arm_emit_source_register(node, get_irn_arity(node) - 1);
+ return;
+
+ case ARM_SHF_RRX:
+ arm_emit_source_register(node, get_irn_arity(node) - 1);
+ panic("RRX shifter emitter TODO");
+ return;
+
+ case ARM_SHF_INVALID:
+ break;
+ }
+ panic("Invalid shift_modifier while emitting %+F", node);
}
/** An entry in the sym_or_tv set. */
/**
* Emit a SymConst.
*/
-static void emit_arm_SymConst(const ir_node *irn) {
+static void emit_arm_SymConst(const ir_node *irn)
+{
+ const arm_SymConst_attr_t *attr = get_arm_SymConst_attr_const(irn);
sym_or_tv_t key, *entry;
unsigned label;
- key.u.id = get_arm_symconst_id(irn);
+ key.u.id = get_entity_ld_ident(attr->entity);
key.is_ident = 1;
key.label = 0;
entry = (sym_or_tv_t *)set_insert(sym_or_tv, &key, sizeof(key), HASH_PTR(key.u.generic));
be_emit_finish_line_gas(irn);
}
+static void emit_arm_FrameAddr(const ir_node *irn)
+{
+ const arm_SymConst_attr_t *attr = get_irn_generic_attr_const(irn);
+
+ be_emit_cstring("\tadd ");
+ arm_emit_dest_register(irn, 0);
+ be_emit_cstring(", ");
+ arm_emit_source_register(irn, 0);
+ be_emit_cstring(", ");
+ be_emit_irprintf("#0x%X", attr->fp_offset);
+ be_emit_finish_line_gas(irn);
+}
+
/**
* Emit a floating point fpa constant.
*/
/**
* Emit a Compare with conditional branch.
*/
-static void emit_arm_CmpBra(const ir_node *irn) {
+static void emit_arm_B(const ir_node *irn)
+{
const ir_edge_t *edge;
const ir_node *proj_true = NULL;
const ir_node *proj_false = NULL;
const ir_node *block;
const ir_node *next_block;
ir_node *op1 = get_irn_n(irn, 0);
- ir_mode *opmode = get_irn_mode(op1);
const char *suffix;
int proj_num = get_arm_CondJmp_proj_num(irn);
+ const arm_cmp_attr_t *cmp_attr = get_irn_generic_attr_const(op1);
+ bool is_signed = !cmp_attr->is_unsigned;
+
+ assert(is_arm_Cmp(op1) || is_arm_Tst(op1));
foreach_out_edge(irn, edge) {
ir_node *proj = get_edge_src_irn(edge);
}
}
- /* for now, the code works for scheduled and non-schedules blocks */
- block = get_nodes_block(irn);
-
- /* we have a block schedule */
- next_block = sched_next_block(block);
-
- if (proj_num == pn_Cmp_False) {
- /* always false: should not happen */
- be_emit_cstring("\tb ");
- arm_emit_cfop_target(proj_false);
- be_emit_finish_line_gas(proj_false);
- } else if (proj_num == pn_Cmp_True) {
- /* always true: should not happen */
- be_emit_cstring("\tb ");
- arm_emit_cfop_target(proj_true);
- be_emit_finish_line_gas(proj_true);
- } else {
- if (mode_is_float(opmode)) {
- suffix = "ICHWILLIMPLEMENTIERTWERDEN";
-
- be_emit_cstring("\tfcmp ");
- arm_emit_source_register(irn, 0);
- be_emit_cstring(", ");
- arm_emit_source_register(irn, 1);
- be_emit_finish_line_gas(irn);
-
- be_emit_cstring("\tfmstat");
- be_emit_pad_comment();
- be_emit_cstring("/* FCSPR -> CPSR */");
- be_emit_finish_line_gas(NULL);
- } else {
- if (get_cfop_target_block(proj_true) == next_block) {
- /* exchange both proj's so the second one can be omitted */
- const ir_node *t = proj_true;
-
- proj_true = proj_false;
- proj_false = t;
- proj_num = get_negated_pnc(proj_num, mode_Iu);
- }
- switch (proj_num) {
- case pn_Cmp_Eq: suffix = "eq"; break;
- case pn_Cmp_Lt: suffix = "lt"; break;
- case pn_Cmp_Le: suffix = "le"; break;
- case pn_Cmp_Gt: suffix = "gt"; break;
- case pn_Cmp_Ge: suffix = "ge"; break;
- case pn_Cmp_Lg: suffix = "ne"; break;
- case pn_Cmp_Leg: suffix = "al"; break;
- default: assert(!"Cmp unsupported"); suffix = "al";
- }
- be_emit_cstring("\tcmp ");
- arm_emit_source_register(irn, 0);
- be_emit_cstring(", ");
- arm_emit_source_register(irn, 1);
- be_emit_finish_line_gas(irn);
- }
-
- /* emit the true proj */
- be_emit_irprintf("\tb%s ", suffix);
- arm_emit_cfop_target(proj_true);
- be_emit_finish_line_gas(proj_true);
-
- if (get_cfop_target_block(proj_false) == next_block) {
- be_emit_cstring("\t/* fallthrough to ");
- arm_emit_cfop_target(proj_false);
- be_emit_cstring(" */");
- be_emit_finish_line_gas(proj_false);
- } else {
- be_emit_cstring("b ");
- arm_emit_cfop_target(proj_false);
- be_emit_finish_line_gas(proj_false);
- }
- }
-}
-
-
-/**
- * Emit a Tst with conditional branch.
- */
-static void emit_arm_TstBra(const ir_node *irn)
-{
- const ir_edge_t *edge;
- const ir_node *proj_true = NULL;
- const ir_node *proj_false = NULL;
- const ir_node *block;
- const ir_node *next_block;
- const char *suffix;
- int proj_num = get_arm_CondJmp_proj_num(irn);
-
- foreach_out_edge(irn, edge) {
- ir_node *proj = get_edge_src_irn(edge);
- long nr = get_Proj_proj(proj);
- if (nr == pn_Cond_true) {
- proj_true = proj;
- } else {
- proj_false = proj;
- }
+ if (cmp_attr->ins_permuted) {
+ proj_num = get_mirrored_pnc(proj_num);
}
/* for now, the code works for scheduled and non-schedules blocks */
proj_false = t;
proj_num = get_negated_pnc(proj_num, mode_Iu);
}
+
switch (proj_num) {
case pn_Cmp_Eq: suffix = "eq"; break;
- case pn_Cmp_Lt: suffix = "lt"; break;
- case pn_Cmp_Le: suffix = "le"; break;
- case pn_Cmp_Gt: suffix = "gt"; break;
- case pn_Cmp_Ge: suffix = "ge"; break;
+ case pn_Cmp_Lt: suffix = is_signed ? "lt" : "lo"; break;
+ case pn_Cmp_Le: suffix = is_signed ? "le" : "ls"; break;
+ case pn_Cmp_Gt: suffix = is_signed ? "gt" : "hi"; break;
+ case pn_Cmp_Ge: suffix = is_signed ? "ge" : "hs"; break;
case pn_Cmp_Lg: suffix = "ne"; break;
case pn_Cmp_Leg: suffix = "al"; break;
- default: assert(!"Cmp unsupported"); suffix = "al";
+ default: panic("Cmp has unsupported pnc");
}
- be_emit_cstring("\ttst ");
- arm_emit_source_register(irn, 0);
- be_emit_cstring(", ");
- arm_emit_source_register(irn, 1);
- be_emit_finish_line_gas(irn);
/* emit the true proj */
be_emit_irprintf("\tb%s ", suffix);
be_emit_cstring(" */");
be_emit_finish_line_gas(proj_false);
} else {
- be_emit_cstring("b ");
+ be_emit_cstring("\tb ");
arm_emit_cfop_target(proj_false);
be_emit_finish_line_gas(proj_false);
}
}
-/**
- * Emit a Compare with conditional branch.
- */
-static void emit_arm_fpaCmfBra(const ir_node *irn) {
- (void) irn;
-}
-
-/**
- * Emit a Compare with conditional branch.
- */
-static void emit_arm_fpaCmfeBra(const ir_node *irn) {
- (void) irn;
-}
-
/** Sort register in ascending order. */
static int reg_cmp(const void *a, const void *b) {
const arch_register_t * const *ra = a;
/**
* Create the CopyB instruction sequence.
*/
-static void emit_arm_CopyB(const ir_node *irn) {
- unsigned size = (unsigned)get_arm_imm_value(irn);
+static void emit_arm_CopyB(const ir_node *irn)
+{
+ const arm_CopyB_attr_t *attr = get_irn_generic_attr_const(irn);
+ unsigned size = attr->size;
const char *tgt = arch_register_get_name(get_in_reg(irn, 0));
const char *src = arch_register_get_name(get_in_reg(irn, 1));
/* emit_be */
/************************************************************************/
-static void emit_be_Call(const ir_node *irn) {
- ir_entity *ent = be_Call_get_entity(irn);
+static void arm_emit_entity(ir_entity *entity)
+{
+ be_emit_ident(get_entity_ld_ident(entity));
+}
+
+static void emit_be_Call(const ir_node *irn)
+{
+ ir_entity *entity = be_Call_get_entity(irn);
- be_emit_cstring("\tbl ");
- if (ent) {
- set_entity_backend_marked(ent, 1);
- be_emit_ident(get_entity_ld_ident(ent));
+ if (entity != NULL) {
+ be_emit_cstring("\tbl ");
+ arm_emit_entity(entity);
+ be_emit_finish_line_gas(irn);
} else {
+ be_emit_cstring("\tmov lr, pc");
+ be_emit_finish_line_gas(irn);
+ be_emit_cstring("\tmov pc, ");
arm_emit_source_register(irn, be_pos_Call_ptr);
+ be_emit_finish_line_gas(irn);
}
- be_emit_finish_line_gas(irn);
}
/** Emit an IncSP node */
}
}
-/**
- * Emit code for a Spill.
- */
-static void emit_be_Spill(const ir_node *irn) {
- ir_mode *mode = get_irn_mode(be_get_Spill_val(irn));
-
- if (mode_is_float(mode)) {
- if (USE_FPA(cg->isa)) {
- be_emit_cstring("\tstf");
- arm_emit_fpa_postfix(mode);
- be_emit_char(' ');
- } else {
- assert(0 && "spill not supported for this mode");
- panic("emit_be_Spill: spill not supported for this mode");
- }
- } else if (mode_is_dataM(mode)) {
- be_emit_cstring("\tstr ");
- } else {
- assert(0 && "spill not supported for this mode");
- panic("emit_be_Spill: spill not supported for this mode");
- }
- arm_emit_source_register(irn, 1);
- be_emit_cstring(", [");
- arm_emit_source_register(irn, 0);
- be_emit_cstring(", #");
- arm_emit_offset(irn);
- be_emit_char(']');
- be_emit_finish_line_gas(irn);
-}
-
-/**
- * Emit code for a Reload.
- */
-static void emit_be_Reload(const ir_node *irn) {
- ir_mode *mode = get_irn_mode(irn);
-
- if (mode_is_float(mode)) {
- if (USE_FPA(cg->isa)) {
- be_emit_cstring("\tldf");
- arm_emit_fpa_postfix(mode);
- be_emit_char(' ');
- } else {
- assert(0 && "reload not supported for this mode");
- panic("emit_be_Reload: reload not supported for this mode");
- }
- } else if (mode_is_dataM(mode)) {
- be_emit_cstring("\tldr ");
- } else {
- assert(0 && "reload not supported for this mode");
- panic("emit_be_Reload: reload not supported for this mode");
- }
- arm_emit_dest_register(irn, 0);
- be_emit_cstring(", [");
- arm_emit_source_register(irn, 0);
- be_emit_cstring(", #");
- arm_emit_offset(irn);
- be_emit_char(']');
- be_emit_finish_line_gas(irn);
-}
-
-static void emit_be_Perm(const ir_node *irn) {
+static void emit_be_Perm(const ir_node *irn)
+{
be_emit_cstring("\teor ");
arm_emit_source_register(irn, 0);
be_emit_cstring(", ");
be_emit_finish_line_gas(irn);
}
+static void emit_be_MemPerm(const ir_node *node)
+{
+ int i;
+ int memperm_arity;
+ int sp_change = 0;
+
+ /* TODO: this implementation is slower than necessary.
+ The longterm goal is however to avoid the memperm node completely */
+
+ memperm_arity = be_get_MemPerm_entity_arity(node);
+ if (memperm_arity > 12)
+ panic("memperm with more than 12 inputs not supported yet");
+
+ for (i = 0; i < memperm_arity; ++i) {
+ int offset;
+ ir_entity *entity = be_get_MemPerm_in_entity(node, i);
+
+ /* spill register */
+ be_emit_irprintf("\tstr r%d, [sp, #-4]!", i);
+ be_emit_finish_line_gas(node);
+ sp_change += 4;
+ /* load from entity */
+ offset = get_entity_offset(entity) + sp_change;
+ be_emit_irprintf("\tldr r%d, [sp, #%d]", i, offset);
+ be_emit_finish_line_gas(node);
+ }
+
+ for (i = memperm_arity-1; i >= 0; --i) {
+ int offset;
+ ir_entity *entity = be_get_MemPerm_out_entity(node, i);
+
+ /* store to new entity */
+ offset = get_entity_offset(entity) + sp_change;
+ be_emit_irprintf("\tstr r%d, [sp, #%d]", i, offset);
+ be_emit_finish_line_gas(node);
+ /* restore register */
+ be_emit_irprintf("\tldr r%d, [sp], #4", i);
+ sp_change -= 4;
+ be_emit_finish_line_gas(node);
+ }
+ assert(sp_change == 0);
+}
+
+static void emit_be_Return(const ir_node *node)
+{
+ be_emit_cstring("\tmov pc, lr");
+ be_emit_finish_line_gas(node);
+}
+
/************************************************************************/
/* emit */
/************************************************************************/
-static void emit_Jmp(const ir_node *node) {
+static void emit_arm_Jmp(const ir_node *node)
+{
ir_node *block, *next_block;
/* for now, the code works for scheduled and non-schedules blocks */
/* Er... our gcc does not support it... Install a newer toolchain. */
}
-/***********************************************************************************
- * _ __ _
- * (_) / _| | |
- * _ __ ___ __ _ _ _ __ | |_ _ __ __ _ _ __ ___ _____ _____ _ __| | __
- * | '_ ` _ \ / _` | | '_ \ | _| '__/ _` | '_ ` _ \ / _ \ \ /\ / / _ \| '__| |/ /
- * | | | | | | (_| | | | | | | | | | | (_| | | | | | | __/\ V V / (_) | | | <
- * |_| |_| |_|\__,_|_|_| |_| |_| |_| \__,_|_| |_| |_|\___| \_/\_/ \___/|_| |_|\_\
- *
- ***********************************************************************************/
-
-static void emit_silence(const ir_node *irn) {
+static void emit_nothing(const ir_node *irn)
+{
(void) irn;
- /* Do nothing. */
}
/**
/**
* Set a node emitter. Make it a bit more type safe.
*/
-static inline void set_emitter(ir_op *op, emit_func arm_emit_node) {
+static inline void set_emitter(ir_op *op, emit_func arm_emit_node)
+{
op->ops.generic = (op_func)arm_emit_node;
}
* Enters the emitter functions for handled nodes into the generic
* pointer of an opcode.
*/
-static void arm_register_emitters(void) {
-
-#define ARM_EMIT(a) set_emitter(op_arm_##a, emit_arm_##a)
-#define EMIT(a) set_emitter(op_##a, emit_##a)
-#define BE_EMIT(a) set_emitter(op_be_##a, emit_be_##a)
-#define SILENCE(a) set_emitter(op_##a, emit_silence)
-
+static void arm_register_emitters(void)
+{
/* first clear the generic function pointer for all ops */
clear_irp_opcodes_generic_func();
/* register all emitter functions defined in spec */
arm_register_spec_emitters();
- /* other emitter functions */
- ARM_EMIT(CmpBra);
- ARM_EMIT(TstBra);
- ARM_EMIT(fpaCmfBra);
- ARM_EMIT(fpaCmfeBra);
- ARM_EMIT(CopyB);
-// ARM_EMIT(CopyB_i);
-// ARM_EMIT(Const);
- ARM_EMIT(SymConst);
- ARM_EMIT(SwitchJmp);
- ARM_EMIT(fpaDbl2GP);
- ARM_EMIT(fpaConst);
- ARM_EMIT(LdTls);
-
- /* benode emitter */
- BE_EMIT(Call);
- BE_EMIT(IncSP);
- BE_EMIT(Copy);
- BE_EMIT(Spill);
- BE_EMIT(Reload);
- BE_EMIT(Perm);
-
- /* firm emitter */
- EMIT(Jmp);
-
- /* noisy stuff */
-#ifdef SILENCER
- SILENCE(Start);
- SILENCE(Proj);
- SILENCE(Phi);
- SILENCE(be_Keep);
- SILENCE(be_CopyKeep);
- SILENCE(be_RegParams);
- SILENCE(be_Barrier);
- SILENCE(be_Return);
-#endif
-
-#undef ARM_EMIT
-#undef BE_EMIT
-#undef EMIT
-#undef SILENCE
+ /* custom emitter */
+ set_emitter(op_arm_B, emit_arm_B);
+ set_emitter(op_arm_CopyB, emit_arm_CopyB);
+ set_emitter(op_arm_fpaConst, emit_arm_fpaConst);
+ set_emitter(op_arm_fpaDbl2GP, emit_arm_fpaDbl2GP);
+ set_emitter(op_arm_FrameAddr, emit_arm_FrameAddr);
+ set_emitter(op_arm_Jmp, emit_arm_Jmp);
+ set_emitter(op_arm_LdTls, emit_arm_LdTls);
+ set_emitter(op_arm_SwitchJmp, emit_arm_SwitchJmp);
+ set_emitter(op_arm_SymConst, emit_arm_SymConst);
+ set_emitter(op_be_Call, emit_be_Call);
+ set_emitter(op_be_Copy, emit_be_Copy);
+ set_emitter(op_be_CopyKeep, emit_be_Copy);
+ set_emitter(op_be_IncSP, emit_be_IncSP);
+ set_emitter(op_be_MemPerm, emit_be_MemPerm);
+ set_emitter(op_be_Perm, emit_be_Perm);
+ set_emitter(op_be_Return, emit_be_Return);
+
+ /* no need to emit anything for the following nodes */
+ set_emitter(op_Phi, emit_nothing);
+ set_emitter(op_be_Keep, emit_nothing);
+ set_emitter(op_be_Start, emit_nothing);
+ set_emitter(op_be_Barrier, emit_nothing);
}
/**
be_dbg_set_dbg_info(get_irn_dbg_info(irn));
(*emit)(irn);
} else {
- be_emit_cstring("\t/* TODO */");
- be_emit_finish_line_gas(irn);
+ panic("Error: No emit handler for node %+F (graph %+F)\n",
+ irn, current_ir_graph);
}
}
}
}
-/**
- * Emits code for function start.
- */
-void arm_func_prolog(ir_graph *irg) {
- ir_entity *ent = get_irg_entity(irg);
- const char *irg_name = get_entity_ld_name(ent);
-
- be_emit_write_line();
- be_gas_emit_switch_section(GAS_SECTION_TEXT);
- be_emit_cstring("\t.align 2\n");
-
- if (get_entity_visibility(ent) == visibility_external_visible)
- be_emit_irprintf("\t.global %s\n", irg_name);
- be_emit_irprintf("%s:\n", irg_name);
-}
-
-/**
- * Emits code for function end
- */
-void arm_emit_end(FILE *F, ir_graph *irg) {
- (void) irg;
- fprintf(F, "\t.ident \"firmcc\"\n");
-}
-
/**
* Block-walker:
* Sets labels for control flow nodes (jump target)
/**
* Main driver. Emits the code for one routine.
*/
-void arm_gen_routine(const arm_code_gen_t *arm_cg, ir_graph *irg) {
+void arm_gen_routine(const arm_code_gen_t *arm_cg, ir_graph *irg)
+{
ir_node **blk_sched;
int i, n;
ir_node *last_block = NULL;
cg = arm_cg;
sym_or_tv = new_set(cmp_sym_or_tv, 8);
+ be_gas_elf_type_char = '%';
+
arm_register_emitters();
be_dbg_method_begin(entity, be_abi_get_stack_layout(cg->birg->abi));
/* create the block schedule. For now, we don't need it earlier. */
blk_sched = be_create_block_schedule(cg->irg, cg->birg->exec_freq);
- arm_func_prolog(irg);
+ be_gas_emit_function_prolog(entity, 4);
+
irg_block_walk_graph(irg, arm_gen_labels, NULL, NULL);
n = ARR_LEN(blk_sched);
last_block = block;
}
+ be_gas_emit_function_epilog(entity);
be_dbg_method_end();
/* emit SymConst values */
projects / libfirm / blobdiff