gen_$(arch)_emitter.c gen_$(arch)_emitter.h $(arch)_emitter.c $(arch)_emitter.h \
bearch_$(arch).c gen_$(arch)_regalloc_if_t.h gen_$(arch)_regalloc_if.h gen_$(arch)_regalloc_if.c \
$(arch)_transform.c $(arch)_transform.h $(arch)_gen_decls.c $(arch)_gen_decls.h \
- $(arch)_map_regs.c $(arch)_map_regs.h
+ $(arch)_map_regs.c $(arch)_map_regs.h gen_$(arch)_machine.c gen_$(arch)_machine.h
include $(topdir)/MakeRules
-I$(top_srcdir)/ir/ident -I$(top_srcdir)/ir/tr -I$(top_srcdir)/ir/tv \
-I$(top_srcdir)/ir/debug -I$(top_srcdir)/ir/ana -I$(top_srcdir)/ir/st \
-I$(top_srcdir)/ir/stat -I$(top_srcdir)/ir/external -I$(top_srcdir)/ir/ana2 -I$(top_srcdir)/ir/lower \
- -I$(topdir)/ir/config
+ -I$(topdir)/ir/config -I$(top_srcdir)/ir/arch -I$(top_srcdir)/ir/lower -I$(top_srcdir)/ir/opt
include $(top_srcdir)/MakeTargets
$(full_dirbe)/gen_$(arch)_emitter.c $(full_dirbe)/gen_$(arch)_emitter.h: $(full_dir)/scripts/generate_emitter.pl $(full_dirbe)/$(arch)_spec.pl
$(full_dir)/scripts/generate_emitter.pl $(full_dirbe)/$(arch)_spec.pl $(full_dirbe)
+$(full_dirbe)/gen_$(arch)_machine.c $(full_dirbe)/gen_$(arch)_machine.h: $(full_dir)/scripts/generate_machine.pl $(full_dirbe)/$(arch)_spec.pl
+ $(full_dir)/scripts/generate_machine.pl $(full_dirbe)/$(arch)_spec.pl $(full_dirbe)
+
$(full_dirbe)/gen_$(arch)_regalloc_if.c $(full_dirbe)/gen_$(arch)_regalloc_if.h $(full_dirbe)/gen_$(arch)_regalloc_if_t.h: $(full_dir)/scripts/generate_regalloc_if.pl $(full_dirbe)/$(arch)_spec.pl
$(full_dir)/scripts/generate_regalloc_if.pl $(full_dirbe)/$(arch)_spec.pl $(full_dirbe)