/**
* @file
* @brief The main amd64 backend driver file.
- * @version $Id: bearch_amd64.c 26909 2010-01-05 15:56:54Z matze $
*/
#include "config.h"
#include "ircons.h"
#include "irgmod.h"
#include "irdump.h"
+#include "lower_calls.h"
#include "bitset.h"
#include "debug.h"
#include "be.h"
-#include "../bearch.h"
-#include "../benode.h"
-#include "../belower.h"
-#include "../besched.h"
-#include "../beabi.h"
-#include "../bemodule.h"
-#include "../begnuas.h"
-#include "../belistsched.h"
-#include "../beflags.h"
-#include "../bespillslots.h"
+#include "bearch.h"
+#include "benode.h"
+#include "belower.h"
+#include "besched.h"
+#include "beabi.h"
+#include "bemodule.h"
+#include "begnuas.h"
+#include "belistsched.h"
+#include "beflags.h"
+#include "bespillslots.h"
+#include "bespillutil.h"
+#include "bestack.h"
#include "bearch_amd64_t.h"
DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
-static arch_irn_class_t amd64_classify(const ir_node *irn)
-{
- (void) irn;
- return arch_irn_class_none;
-}
-
static ir_entity *amd64_get_frame_entity(const ir_node *node)
{
if (is_amd64_FrameAddr(node)) {
/* fill register allocator interface */
static const arch_irn_ops_t amd64_irn_ops = {
- amd64_classify,
amd64_get_frame_entity,
amd64_set_frame_offset,
amd64_get_sp_bias,
dump_ir_graph(irg, "transformed");
}
-
-/**
- * Called immediatly before emit phase.
- */
-static void amd64_finish_irg(ir_graph *irg)
-{
- (void) irg;
-}
-
static void amd64_before_ra(ir_graph *irg)
{
be_sched_fix_flags(irg, &amd64_reg_classes[CLASS_amd64_flags], NULL, NULL);
}
-
static void transform_Reload(ir_node *node)
{
ir_graph *irg = get_irn_irg(node);
}
}
-static void amd64_after_ra(ir_graph *irg)
+/**
+ * Called immediatly before emit phase.
+ */
+static void amd64_finish_irg(ir_graph *irg)
{
be_stack_layout_t *stack_layout = be_get_irg_stack_layout(irg);
bool at_begin = stack_layout->sp_relative ? true : false;
be_free_frame_entity_coalescer(fec_env);
irg_block_walk_graph(irg, NULL, amd64_after_ra_walker, NULL);
+
+ /* fix stack entity offsets */
+ be_abi_fix_stack_nodes(irg);
+ be_abi_fix_stack_bias(irg);
}
/**
},
};
-/**
- * Initializes the backend ISA
- */
-static arch_env_t *amd64_init(FILE *outfile)
+static void amd64_init(void)
{
- amd64_isa_t *isa = XMALLOC(amd64_isa_t);
- *isa = amd64_isa_template;
-
- be_emit_init(outfile);
-
amd64_register_init();
amd64_create_opcodes(&amd64_irn_ops);
+}
- return &isa->base;
+static void amd64_finish(void)
+{
+ amd64_free_opcodes();
}
+static arch_env_t *amd64_begin_codegeneration(const be_main_env_t *env)
+{
+ amd64_isa_t *isa = XMALLOC(amd64_isa_t);
+ *isa = amd64_isa_template;
+ be_emit_init(env->file_handle);
+ be_gas_begin_compilation_unit(env);
+
+ return &isa->base;
+}
/**
* Closes the output file and frees the ISA structure.
*/
-static void amd64_done(void *self)
+static void amd64_end_codegeneration(void *self)
{
amd64_isa_t *isa = (amd64_isa_t*)self;
/* emit now all global declarations */
- be_gas_emit_decls(isa->base.main_env);
+ be_gas_end_compilation_unit(isa->base.main_env);
be_emit_exit();
free(self);
}
-
-/**
- * Get the register class which shall be used to store a value of a given mode.
- * @param self The this pointer.
- * @param mode The mode in question.
- * @return A register class which can hold values of the given mode.
- */
-static const arch_register_class_t *amd64_get_reg_class_for_mode(const ir_mode *mode)
-{
- assert(!mode_is_float(mode));
- return &amd64_reg_classes[CLASS_amd64_gp];
-}
-
-
-
typedef struct {
be_abi_call_flags_bits_t flags;
ir_graph *irg;
* @param method_type The type of the method (procedure) in question.
* @param abi The abi object to be modified
*/
-static void amd64_get_call_abi(const void *self, ir_type *method_type,
- be_abi_call_t *abi)
+static void amd64_get_call_abi(ir_type *method_type, be_abi_call_t *abi)
{
ir_type *tp;
ir_mode *mode;
be_abi_call_flags_t call_flags;
int no_reg = 0;
- (void) self;
-
/* set abi flags for calls */
call_flags.bits.store_args_sequential = 0;
call_flags.bits.try_omit_fp = 1;
}
}
-/**
- * Returns the necessary byte alignment for storing a register of given class.
- */
-static int amd64_get_reg_class_alignment(const arch_register_class_t *cls)
-{
- ir_mode *mode = arch_register_class_mode(cls);
- return get_mode_size_bytes(mode);
-}
-
static void amd64_lower_for_target(void)
{
- lower_params_t params = {
- 4, /* def_ptr_alignment */
- LF_COMPOUND_RETURN | LF_RETURN_HIDDEN, /* flags */
- ADD_HIDDEN_ALWAYS_IN_FRONT, /* hidden_params */
- NULL, /* find pointer type */
- NULL, /* ret_compound_in_regs */
- };
+ size_t i, n_irgs = get_irp_n_irgs();
/* lower compound param handling */
- lower_calls_with_compounds(¶ms);
+ lower_calls_with_compounds(LF_RETURN_HIDDEN);
+
+ for (i = 0; i < n_irgs; ++i) {
+ ir_graph *irg = get_irp_irg(i);
+ /* Turn all small CopyBs into loads/stores, and turn all bigger
+ * CopyBs into memcpy calls, because we cannot handle CopyB nodes
+ * during code generation yet.
+ * TODO: Adapt this once custom CopyB handling is implemented. */
+ lower_CopyB(irg, 64, 65, true);
+ }
}
static int amd64_is_mux_allowed(ir_node *sel, ir_node *mux_false,
0, /* no inline assembly */
1, /* support Rotl nodes */
0, /* little endian */
+ 1, /* modulo shift is efficient */
+ 0, /* non-modulo shift is not efficient */
NULL, /* will be set later */
amd64_is_mux_allowed, /* parameter for if conversion */
64, /* machine size */
NULL, /* float arithmetic mode */
- 0, /* size of long double */
+ NULL, /* long long type */
+ NULL, /* unsigned long long type */
+ NULL, /* long double type (not supported yet) */
0, /* no trampoline support: size 0 */
0, /* no trampoline support: align 0 */
NULL, /* no trampoline support: no trampoline builder */
return &p;
}
-static ir_graph **amd64_get_backend_irg_list(const void *self,
- ir_graph ***irgs)
-{
- (void) self;
- (void) irgs;
- return NULL;
-}
-
static asm_constraint_flags_t amd64_parse_asm_constraint(const char **c)
{
(void) c;
const arch_isa_if_t amd64_isa_if = {
amd64_init,
- amd64_lower_for_target,
- amd64_done,
- NULL, /* handle intrinsics */
- amd64_get_reg_class_for_mode,
- amd64_get_call_abi,
- amd64_get_reg_class_alignment,
+ amd64_finish,
amd64_get_backend_params,
- amd64_get_backend_irg_list,
- NULL, /* mark remat */
+ amd64_lower_for_target,
amd64_parse_asm_constraint,
amd64_is_valid_clobber,
+ amd64_begin_codegeneration,
+ amd64_end_codegeneration,
amd64_init_graph,
+ amd64_get_call_abi,
+ NULL, /* mark remat */
NULL, /* get_pic_base */
+ be_new_spill,
+ be_new_reload,
+ amd64_register_saved_by,
+
+ NULL, /* handle intrinsics */
NULL, /* before_abi */
amd64_prepare_graph,
amd64_before_ra,
- amd64_after_ra,
amd64_finish_irg,
amd64_gen_routine,
- amd64_register_saved_by,
};
BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch_amd64)
projects / libfirm / blobdiff