sparc: implement float->unsigned conversions

[libfirm] / ir / be / amd64 / bearch_amd64.c

diff --git a/ir/be/amd64/bearch_amd64.c b/ir/be/amd64/bearch_amd64.c
index 19828fe..2e31788 100644 (file)
--- a/ir/be/amd64/bearch_amd64.c
+++ b/ir/be/amd64/bearch_amd64.c
@@ -57,12 +57,6 @@
 
 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
 
-static arch_irn_class_t amd64_classify(const ir_node *irn)
-{
-       (void) irn;
-       return arch_irn_class_none;
-}
-
 static ir_entity *amd64_get_frame_entity(const ir_node *node)
 {
        if (is_amd64_FrameAddr(node)) {
@@ -113,7 +107,6 @@ static int amd64_get_sp_bias(const ir_node *irn)
 /* fill register allocator interface */
 
 static const arch_irn_ops_t amd64_irn_ops = {
-       amd64_classify,
        amd64_get_frame_entity,
        amd64_set_frame_offset,
        amd64_get_sp_bias,
@@ -302,16 +295,21 @@ static amd64_isa_t amd64_isa_template = {
        },
 };
 
-/**
- * Initializes the backend ISA
- */
-static arch_env_t *amd64_init(const be_main_env_t *env)
+static void amd64_init(void)
 {
-       amd64_isa_t *isa = XMALLOC(amd64_isa_t);
-       *isa = amd64_isa_template;
-
        amd64_register_init();
        amd64_create_opcodes(&amd64_irn_ops);
+}
+
+static void amd64_finish(void)
+{
+       amd64_free_opcodes();
+}
+
+static arch_env_t *amd64_begin_codegeneration(const be_main_env_t *env)
+{
+       amd64_isa_t *isa = XMALLOC(amd64_isa_t);
+       *isa = amd64_isa_template;
 
        be_emit_init(env->file_handle);
        be_gas_begin_compilation_unit(env);
@@ -319,12 +317,10 @@ static arch_env_t *amd64_init(const be_main_env_t *env)
        return &isa->base;
 }
 
-
-
 /**
  * Closes the output file and frees the ISA structure.
  */
-static void amd64_done(void *self)
+static void amd64_end_codegeneration(void *self)
 {
        amd64_isa_t *isa = (amd64_isa_t*)self;
 
@@ -545,25 +541,28 @@ static int amd64_register_saved_by(const arch_register_t *reg, int callee)
 
 const arch_isa_if_t amd64_isa_if = {
        amd64_init,
-       amd64_lower_for_target,
-       amd64_done,
-       NULL,                /* handle intrinsics */
-       amd64_get_call_abi,
+       amd64_finish,
     amd64_get_backend_params,
-       NULL,                    /* mark remat */
+       amd64_lower_for_target,
        amd64_parse_asm_constraint,
        amd64_is_valid_clobber,
 
+       amd64_begin_codegeneration,
+       amd64_end_codegeneration,
        amd64_init_graph,
+       amd64_get_call_abi,
+       NULL,              /* mark remat */
        NULL,              /* get_pic_base */
+       be_new_spill,
+       be_new_reload,
+       amd64_register_saved_by,
+
+       NULL,              /* handle intrinsics */
        NULL,              /* before_abi */
        amd64_prepare_graph,
        amd64_before_ra,
        amd64_finish_irg,
        amd64_gen_routine,
-       amd64_register_saved_by,
-       be_new_spill,
-       be_new_reload
 };
 
 BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch_amd64)