remove old spillslot coalescing API
[libfirm] / ir / be / amd64 / bearch_amd64.c
index 8bd0459..167cbe5 100644 (file)
@@ -216,9 +216,33 @@ static void amd64_after_ra_walker(ir_node *block, void *data)
        }
 }
 
+static void amd64_set_frame_entity(ir_node *node, ir_entity *entity)
+{
+       assert(be_is_Reload(node));
+       be_node_set_frame_entity(node, entity);
+}
+
+/**
+ * Collects nodes that need frame entities assigned.
+ */
+static void amd64_collect_frame_entity_nodes(ir_node *node, void *data)
+{
+       if (be_is_Reload(node) && be_get_frame_entity(node) == NULL) {
+               be_fec_env_t  *env   = (be_fec_env_t*)data;
+               const ir_mode *mode  = get_irn_mode(node);
+               int            align = get_mode_size_bytes(mode);
+               be_node_needs_frame_entity(env, node, mode, align);
+       }
+}
+
 static void amd64_after_ra(ir_graph *irg)
 {
-       be_coalesce_spillslots(irg);
+       be_fec_env_t *fec_env = be_new_frame_entity_coalescer(irg);
+
+       /* create and coalesce frame entities */
+       irg_walk_graph(irg, NULL, amd64_collect_frame_entity_nodes, fec_env);
+       be_assign_entities(fec_env, amd64_set_frame_entity);
+       be_free_frame_entity_coalescer(fec_env);
 
        irg_block_walk_graph(irg, NULL, amd64_after_ra_walker, NULL);
 }
@@ -500,6 +524,16 @@ static int amd64_get_reg_class_alignment(const arch_register_class_t *cls)
 
 static void amd64_lower_for_target(void)
 {
+       lower_params_t params = {
+               4,                                     /* def_ptr_alignment */
+               LF_COMPOUND_RETURN | LF_RETURN_HIDDEN, /* flags */
+               ADD_HIDDEN_ALWAYS_IN_FRONT,            /* hidden_params */
+               NULL,                                  /* find pointer type */
+               NULL,                                  /* ret_compound_in_regs */
+       };
+
+       /* lower compound param handling */
+       lower_calls_with_compounds(&params);
 }
 
 static int amd64_is_mux_allowed(ir_node *sel, ir_node *mux_false,
@@ -519,7 +553,6 @@ static const backend_params *amd64_get_backend_params(void) {
                0,     /* no inline assembly */
                1,     /* support Rotl nodes */
                0,     /* little endian */
-               amd64_lower_for_target,  /* lowering callback */
                NULL,  /* will be set later */
                amd64_is_mux_allowed,  /* parameter for if conversion */
                NULL,  /* float arithmetic mode */
@@ -553,6 +586,7 @@ static int amd64_is_valid_clobber(const char *clobber)
 
 const arch_isa_if_t amd64_isa_if = {
        amd64_init,
+       amd64_lower_for_target,
        amd64_done,
        NULL,                /* handle intrinsics */
        amd64_get_reg_class_for_mode,