#include "amd64_emitter.h"
#include "gen_amd64_emitter.h"
+#include "gen_amd64_regalloc_if.h"
#include "amd64_nodes_attr.h"
#include "amd64_new_nodes.h"
be_emit_irprintf("0x%X", attr->ext.imm_value);
}
+void amd64_emit_fp_offset(const ir_node *node)
+{
+ const amd64_SymConst_attr_t *attr = get_amd64_SymConst_attr_const(node);
+ if (attr->fp_offset)
+ be_emit_irprintf("%d", attr->fp_offset);
+}
+
void amd64_emit_source_register(const ir_node *node, int pos)
{
amd64_emit_register(get_in_reg(node, pos));
static void emit_amd64_SymConst(const ir_node *irn)
{
const amd64_SymConst_attr_t *attr = get_amd64_SymConst_attr_const(irn);
-// sym_or_tv_t key, *entry;
-// unsigned label;
-//
-// key.u.id = get_entity_ld_ident(attr->entity);
-// key.is_ident = 1;
-// key.label = 0;
-// entry = (sym_or_tv_t *)set_insert(sym_or_tv, &key, sizeof(key), HASH_PTR(key.u.generic));
-// if (entry->label == 0) {
-// /* allocate a label */
-// entry->label = get_unique_label();
-// }
-// label = entry->label;
+#if 0
+ sym_or_tv_t key, *entry;
+ unsigned label;
+
+ key.u.id = get_entity_ld_ident(attr->entity);
+ key.is_ident = 1;
+ key.label = 0;
+ entry = (sym_or_tv_t *)set_insert(sym_or_tv, &key, sizeof(key), HASH_PTR(key.u.generic));
+ if (entry->label == 0) {
+ /* allocate a label */
+ entry->label = get_unique_label();
+ }
+ label = entry->label;
+#endif
be_emit_cstring("\tmov $");
be_gas_emit_entity(attr->entity);
*/
static void emit_amd64_Conv(const ir_node *irn)
{
- const amd64_attr_t *attr = get_irn_generic_attr_const(irn);
- (void) attr;
-
be_emit_cstring("\tmov ");
amd64_emit_source_register(irn, 0);
be_emit_cstring(", ");
*/
static ir_node *sched_next_block(const ir_node *block)
{
- return get_irn_link(block);
+ return (ir_node*)get_irn_link(block);
}
/**
*/
static ir_node *get_cfop_target_block(const ir_node *irn)
{
- return get_irn_link(irn);
+ return (ir_node*)get_irn_link(irn);
}
/**
const ir_node *block;
const ir_node *next_block;
const char *suffix;
- const amd64_attr_t *attr = get_irn_generic_attr_const(irn);
+ const amd64_attr_t *attr = get_amd64_attr_const(irn);
int proj_num = attr->ext.pnc;
ir_node *op1 = get_irn_n(irn, 0);
- const amd64_attr_t *cmp_attr = get_irn_generic_attr_const(op1);
+ const amd64_attr_t *cmp_attr = get_amd64_attr_const(op1);
bool is_signed = !cmp_attr->data.cmp_unsigned;
assert(is_amd64_Cmp(op1));
case pn_Cmp_Eq: suffix = "e"; break;
case pn_Cmp_Lt: suffix = is_signed ? "l" : "b"; break;
case pn_Cmp_Le: suffix = is_signed ? "le" : "be"; break;
- case pn_Cmp_Gt: suffix = is_signed ? "g" : "o"; break;
- case pn_Cmp_Ge: suffix = is_signed ? "ge" : "oe"; break;
+ case pn_Cmp_Gt: suffix = is_signed ? "g" : "a"; break;
+ case pn_Cmp_Ge: suffix = is_signed ? "ge" : "ae"; break;
case pn_Cmp_Lg: suffix = "ne"; break;
case pn_Cmp_Leg: suffix = "mp"; break;
default: panic("Cmp has unsupported pnc");
}
}
+static void emit_be_Perm(const ir_node *node)
+{
+ const arch_register_t *in0, *in1;
+ const arch_register_class_t *cls0, *cls1;
+
+ in0 = arch_get_irn_register(get_irn_n(node, 0));
+ in1 = arch_get_irn_register(get_irn_n(node, 1));
+
+ cls0 = arch_register_get_class(in0);
+ cls1 = arch_register_get_class(in1);
+
+ assert(cls0 == cls1 && "Register class mismatch at Perm");
+
+ be_emit_cstring("\txchg ");
+ amd64_emit_register (in0);
+ be_emit_cstring(", ");
+ amd64_emit_register (in1);
+ be_emit_finish_line_gas(node);
+
+ if (cls0 != &amd64_reg_classes[CLASS_amd64_gp]) {
+ panic("unexpected register class in be_Perm (%+F)", node);
+ }
+}
+
static void emit_amd64_FrameAddr(const ir_node *irn)
{
- const amd64_SymConst_attr_t *attr = get_irn_generic_attr_const(irn);
+ const amd64_SymConst_attr_t *attr =
+ (const amd64_SymConst_attr_t*) get_amd64_attr_const(irn);
be_emit_cstring("\tmov ");
amd64_emit_source_register(irn, 0);
if (offs > 0) {
be_emit_irprintf("\tsub ");
+ be_emit_irprintf("$%u, ", offs);
amd64_emit_dest_register(node, 0);
- be_emit_irprintf(", $%u", offs);
be_emit_finish_line_gas(node);
} else {
be_emit_irprintf("\tadd ");
+ be_emit_irprintf("$%u, ", -offs);
amd64_emit_dest_register(node, 0);
- be_emit_irprintf(", $%u", -offs);
be_emit_finish_line_gas(node);
}
}
{
if (irn->op == op_amd64_Add) {
be_emit_cstring("\tadd ");
- } else if (irn->op == op_amd64_Mul) {
- be_emit_cstring("\tmul ");
+ amd64_emit_source_register(irn, second_op);
+ be_emit_cstring(", ");
+ amd64_emit_dest_register(irn, 0);
+ be_emit_finish_line_gas(irn);
} else if (irn->op == op_amd64_Sub) {
- be_emit_cstring("\tsub ");
+ be_emit_cstring("\tneg ");
+ amd64_emit_source_register(irn, second_op);
+ be_emit_finish_line_gas(irn);
+ be_emit_cstring("\tadd ");
+ amd64_emit_source_register(irn, second_op);
+ be_emit_cstring(", ");
+ amd64_emit_dest_register(irn, 0);
+ be_emit_finish_line_gas(irn);
+ be_emit_cstring("\tneg ");
+ amd64_emit_source_register(irn, second_op);
+ be_emit_finish_line_gas(irn);
}
- amd64_emit_source_register(irn, second_op);
- be_emit_cstring(", ");
- amd64_emit_dest_register(irn, 0);
- be_emit_finish_line_gas(irn);
}
/**
set_emitter(op_be_Call, emit_be_Call);
set_emitter(op_be_Copy, emit_be_Copy);
set_emitter(op_be_IncSP, emit_be_IncSP);
+ set_emitter(op_be_Perm, emit_be_Perm);
set_emitter(op_amd64_Add, emit_amd64_binop);
- set_emitter(op_amd64_Mul, emit_amd64_binop);
+ set_emitter(op_amd64_Sub, emit_amd64_binop);
set_emitter(op_be_Start, emit_nothing);
set_emitter(op_be_Keep, emit_nothing);
/**
* Main driver
*/
-void amd64_gen_routine(const amd64_code_gen_t *cg, ir_graph *irg)
+void amd64_gen_routine(ir_graph *irg)
{
ir_entity *entity = get_irg_entity(irg);
ir_node **blk_sched;
int i, n;
- (void)cg;
/* register all emitter functions */
amd64_register_emitters();
blk_sched = be_create_block_schedule(irg);
- be_dbg_method_begin(entity, be_abi_get_stack_layout(cg->birg->abi));
+ be_dbg_method_begin(entity);
be_gas_emit_function_prolog(entity, 4);
irg_block_walk_graph(irg, amd64_gen_labels, NULL, NULL);
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