backend: put ignore regs into beirg

[libfirm] / ir / be / amd64 / amd64_emitter.c

diff --git a/ir/be/amd64/amd64_emitter.c b/ir/be/amd64/amd64_emitter.c
index cbdbde1..66889da 100644 (file)
--- a/ir/be/amd64/amd64_emitter.c
+++ b/ir/be/amd64/amd64_emitter.c
@@ -43,6 +43,7 @@
 
 #include "amd64_emitter.h"
 #include "gen_amd64_emitter.h"
+#include "gen_amd64_regalloc_if.h"
 #include "amd64_nodes_attr.h"
 #include "amd64_new_nodes.h"
 
@@ -181,18 +182,20 @@ static void emit_nothing(const ir_node *node)
 static void emit_amd64_SymConst(const ir_node *irn)
 {
        const amd64_SymConst_attr_t *attr = get_amd64_SymConst_attr_const(irn);
-//     sym_or_tv_t key, *entry;
-//     unsigned label;
-//
-//     key.u.id     = get_entity_ld_ident(attr->entity);
-//     key.is_ident = 1;
-//     key.label    = 0;
-//     entry = (sym_or_tv_t *)set_insert(sym_or_tv, &key, sizeof(key), HASH_PTR(key.u.generic));
-//     if (entry->label == 0) {
-//             /* allocate a label */
-//             entry->label = get_unique_label();
-//     }
-//     label = entry->label;
+#if 0
+       sym_or_tv_t key, *entry;
+       unsigned label;
+
+       key.u.id     = get_entity_ld_ident(attr->entity);
+       key.is_ident = 1;
+       key.label    = 0;
+       entry = (sym_or_tv_t *)set_insert(sym_or_tv, &key, sizeof(key), HASH_PTR(key.u.generic));
+       if (entry->label == 0) {
+               /* allocate a label */
+               entry->label = get_unique_label();
+       }
+       label = entry->label;
+#endif
 
        be_emit_cstring("\tmov $");
        be_gas_emit_entity(attr->entity);
@@ -395,6 +398,30 @@ static void emit_be_Copy(const ir_node *irn)
        }
 }
 
+static void emit_be_Perm(const ir_node *node)
+{
+       const arch_register_t *in0, *in1;
+       const arch_register_class_t *cls0, *cls1;
+
+       in0 = arch_get_irn_register(get_irn_n(node, 0));
+       in1 = arch_get_irn_register(get_irn_n(node, 1));
+
+       cls0 = arch_register_get_class(in0);
+       cls1 = arch_register_get_class(in1);
+
+       assert(cls0 == cls1 && "Register class mismatch at Perm");
+
+       be_emit_cstring("\txchg ");
+       amd64_emit_register (in0);
+       be_emit_cstring(", ");
+       amd64_emit_register (in1);
+       be_emit_finish_line_gas(node);
+
+       if (cls0 != &amd64_reg_classes[CLASS_amd64_gp]) {
+               panic("unexpected register class in be_Perm (%+F)", node);
+       }
+}
+
 static void emit_amd64_FrameAddr(const ir_node *irn)
 {
        const amd64_SymConst_attr_t *attr = get_irn_generic_attr_const(irn);
@@ -530,6 +557,7 @@ static void amd64_register_emitters(void)
        set_emitter(op_be_Call,          emit_be_Call);
        set_emitter(op_be_Copy,          emit_be_Copy);
        set_emitter(op_be_IncSP,         emit_be_IncSP);
+       set_emitter(op_be_Perm,          emit_be_Perm);
 
        set_emitter(op_amd64_Add,        emit_amd64_binop);
        set_emitter(op_amd64_Sub,        emit_amd64_binop);
@@ -599,19 +627,18 @@ static void amd64_gen_labels(ir_node *block, void *env)
 /**
  * Main driver
  */
-void amd64_gen_routine(const amd64_code_gen_t *cg, ir_graph *irg)
+void amd64_gen_routine(ir_graph *irg)
 {
        ir_entity *entity = get_irg_entity(irg);
        ir_node  **blk_sched;
        int i, n;
-       (void)cg;
 
        /* register all emitter functions */
        amd64_register_emitters();
 
        blk_sched = be_create_block_schedule(irg);
 
-       be_dbg_method_begin(entity, be_abi_get_stack_layout(cg->birg->abi));
+       be_dbg_method_begin(entity);
        be_gas_emit_function_prolog(entity, 4);
 
        irg_block_walk_graph(irg, amd64_gen_labels, NULL, NULL);