/* fill register allocator interface */
static const arch_irn_ops_t TEMPLATE_irn_ops = {
- get_TEMPLATE_in_req,
TEMPLATE_classify,
TEMPLATE_get_frame_entity,
TEMPLATE_set_frame_offset,
* Transforms the standard firm graph into
* a TEMLPATE firm graph
*/
-static void TEMPLATE_prepare_graph(void *self)
+static void TEMPLATE_prepare_graph(ir_graph *irg)
{
- TEMPLATE_code_gen_t *cg = self;
-
/* transform nodes into assembler instructions */
- TEMPLATE_transform_graph(cg);
+ TEMPLATE_transform_graph(irg);
}
/**
* Called immediatly before emit phase.
*/
-static void TEMPLATE_finish_irg(void *self)
+static void TEMPLATE_finish_irg(ir_graph *irg)
{
- (void) self;
+ (void) irg;
}
-static void TEMPLATE_before_ra(void *self)
+static void TEMPLATE_before_ra(ir_graph *irg)
{
- (void) self;
+ (void) irg;
/* Some stuff you need to do after scheduling but before register allocation */
}
-static void TEMPLATE_after_ra(void *self)
+static void TEMPLATE_after_ra(ir_graph *irg)
{
- (void) self;
+ (void) irg;
/* Some stuff you need to do immediatly after register allocation */
}
-
-
-/**
- * Emits the code, closes the output file and frees
- * the code generator interface.
- */
-static void TEMPLATE_emit_and_done(void *self)
+static void TEMPLATE_init_graph(ir_graph *irg)
{
- TEMPLATE_code_gen_t *cg = self;
- ir_graph *irg = cg->irg;
-
- TEMPLATE_emit_routine(irg);
-
- /* de-allocate code generator */
- free(cg);
-}
-
-static void *TEMPLATE_cg_init(ir_graph *irg);
-
-static const arch_code_generator_if_t TEMPLATE_code_gen_if = {
- TEMPLATE_cg_init,
- NULL, /* get_pic_base hook */
- NULL, /* before abi introduce hook */
- TEMPLATE_prepare_graph,
- NULL, /* spill hook */
- TEMPLATE_before_ra, /* before register allocation hook */
- TEMPLATE_after_ra, /* after register allocation hook */
- TEMPLATE_finish_irg,
- TEMPLATE_emit_and_done
-};
-
-/**
- * Initializes the code generator.
- */
-static void *TEMPLATE_cg_init(ir_graph *irg)
-{
- const arch_env_t *arch_env = be_get_irg_arch_env(irg);
- TEMPLATE_isa_t *isa = (TEMPLATE_isa_t *) arch_env;
- TEMPLATE_code_gen_t *cg = XMALLOC(TEMPLATE_code_gen_t);
-
- cg->impl = &TEMPLATE_code_gen_if;
- cg->irg = irg;
- cg->isa = isa;
-
- return (arch_code_generator_t *)cg;
+ (void) irg;
}
}
}
-static int TEMPLATE_to_appear_in_schedule(void *block_env, const ir_node *irn)
-{
- (void) block_env;
-
- if (!is_TEMPLATE_irn(irn))
- return -1;
-
- return 1;
-}
-
/**
- * Initializes the code generator interface.
- */
-static const arch_code_generator_if_t *TEMPLATE_get_code_generator_if(
- void *self)
-{
- (void) self;
- return &TEMPLATE_code_gen_if;
-}
-
-list_sched_selector_t TEMPLATE_sched_selector;
-
-/**
- * Returns the reg_pressure scheduler with to_appear_in_schedule() overloaded
+ * Returns the necessary byte alignment for storing a register of given class.
*/
-static const list_sched_selector_t *TEMPLATE_get_list_sched_selector(
- const void *self, list_sched_selector_t *selector)
+static int TEMPLATE_get_reg_class_alignment(const arch_register_class_t *cls)
{
- (void) self;
- (void) selector;
-
- TEMPLATE_sched_selector = trivial_selector;
- TEMPLATE_sched_selector.to_appear_in_schedule = TEMPLATE_to_appear_in_schedule;
- return &TEMPLATE_sched_selector;
+ ir_mode *mode = arch_register_class_mode(cls);
+ return get_mode_size_bytes(mode);
}
-static const ilp_sched_selector_t *TEMPLATE_get_ilp_sched_selector(
- const void *self)
+static void TEMPLATE_lower_for_target(void)
{
- (void) self;
- return NULL;
}
-/**
- * Returns the necessary byte alignment for storing a register of given class.
- */
-static int TEMPLATE_get_reg_class_alignment(const arch_register_class_t *cls)
+static int TEMPLATE_is_mux_allowed(ir_node *sel, ir_node *mux_false,
+ ir_node *mux_true)
{
- ir_mode *mode = arch_register_class_mode(cls);
- return get_mode_size_bytes(mode);
+ (void) sel;
+ (void) mux_false;
+ (void) mux_true;
+ return false;
}
/**
static const backend_params *TEMPLATE_get_backend_params(void)
{
static backend_params p = {
- 0, /* no dword lowering */
0, /* no inline assembly */
- NULL, /* will be set later */
- NULL, /* no creator function */
- NULL, /* context for create_intrinsic_fkt */
- NULL, /* parameter for if conversion */
+ 0, /* no support for Rotl nodes */
+ 0, /* 0: little-endian, 1: big-endian */
+ TEMPLATE_lower_for_target, /* lowering for target */
+ NULL, /* architecture dependent settings, will be set later */
+ TEMPLATE_is_mux_allowed, /* parameter for if conversion */
NULL, /* float arithmetic mode */
0, /* no trampoline support: size 0 */
0, /* no trampoline support: align 0 */
return &p;
}
-static const be_execution_unit_t ***TEMPLATE_get_allowed_execution_units(
- const ir_node *irn)
-{
- (void) irn;
- /* TODO */
- return NULL;
-}
-
-static const be_machine_t *TEMPLATE_get_machine(const void *self)
-{
- (void) self;
- /* TODO */
- return NULL;
-}
-
static ir_graph **TEMPLATE_get_backend_irg_list(const void *self,
ir_graph ***irgs)
{
TEMPLATE_get_reg_class,
TEMPLATE_get_reg_class_for_mode,
TEMPLATE_get_call_abi,
- TEMPLATE_get_code_generator_if,
- TEMPLATE_get_list_sched_selector,
- TEMPLATE_get_ilp_sched_selector,
TEMPLATE_get_reg_class_alignment,
TEMPLATE_get_backend_params,
- TEMPLATE_get_allowed_execution_units,
- TEMPLATE_get_machine,
TEMPLATE_get_backend_irg_list,
NULL, /* mark remat */
TEMPLATE_parse_asm_constraint,
- TEMPLATE_is_valid_clobber
+ TEMPLATE_is_valid_clobber,
+
+ TEMPLATE_init_graph,
+ NULL, /* get_pic_base */
+ NULL, /* before_abi */
+ TEMPLATE_prepare_graph,
+ TEMPLATE_before_ra,
+ TEMPLATE_after_ra,
+ TEMPLATE_finish_irg,
+ TEMPLATE_emit_routine,
};
BE_REGISTER_MODULE_CONSTRUCTOR(be_init_arch_TEMPLATE);