Do not forcefully rebuild outedges in compute_execfreq(), but handle this at the...

[libfirm] / ir / be / TEMPLATE / bearch_TEMPLATE.c

diff --git a/ir/be/TEMPLATE/bearch_TEMPLATE.c b/ir/be/TEMPLATE/bearch_TEMPLATE.c
index 08f28e5..90cefe6 100644 (file)
--- a/ir/be/TEMPLATE/bearch_TEMPLATE.c
+++ b/ir/be/TEMPLATE/bearch_TEMPLATE.c
@@ -496,11 +496,12 @@ static void TEMPLATE_abi_dont_save_regs(void *self, pset *s)
  * Build the prolog, return the BASE POINTER register
  */
 static const arch_register_t *TEMPLATE_abi_prologue(void *self, ir_node **mem,
-                                                    pmap *reg_map)
+                                                    pmap *reg_map, int *stack_bias)
 {
        TEMPLATE_abi_env_t *env = self;
        (void) reg_map;
        (void) mem;
+       (void) stack_bias;
 
        if(env->flags.try_omit_fp)
                return env->arch_env->sp;
@@ -678,11 +679,11 @@ static asm_constraint_flags_t TEMPLATE_parse_asm_constraint(const void *self,
        return ASM_CONSTRAINT_FLAG_INVALID;
 }
 
-static bool TEMPLATE_is_valid_clobber(const void *self, const char *clobber)
+static int TEMPLATE_is_valid_clobber(const void *self, const char *clobber)
 {
        (void) self;
        (void) clobber;
-       return false;
+       return 0;
 }
 
 const arch_isa_if_t TEMPLATE_isa_if = {