const TEMPLATE_register_req_t *irn_req;
long node_pos = pos == -1 ? 0 : pos;
ir_mode *mode = get_irn_mode(irn);
- firm_dbg_module_t *mod = firm_dbg_register(DEBUG_MODULE);
+ FIRM_DBG_REGISTER(firm_dbg_module_t *mod, DEBUG_MODULE);
if (mode == mode_T || mode == mode_M) {
DBG((mod, LEVEL_1, "ignoring mode_T, mode_M node %+F\n", irn));
}
static void TEMPLATE_before_ra(void *self) {
- /* Some stuff you need to do immediatly after register allocation */
+ /* Some stuff you need to do after scheduling but before register allocation */
}
-
-/**
- * Creates a Store for a Spill
- */
-static ir_node *TEMPLATE_lower_spill(void *self, ir_node *spill) {
- TEMPLATE_code_gen_t *cg = self;
- dbg_info *dbg = get_irn_dbg_info(spill);
- ir_node *block = get_nodes_block(spill);
- ir_node *ptr = get_irg_frame(cg->irg);
- ir_node *val = be_get_Spill_context(spill);
- ir_node *mem = new_rd_NoMem(cg->irg);
- ir_mode *mode = get_irn_mode(spill);
- ir_node *res;
- entity *ent = be_get_spill_entity(spill);
- unsigned offs = get_entity_offset_bytes(ent);
-
- DB((cg->mod, LEVEL_1, "lower_spill: got offset %d for %+F\n", offs, ent));
-
- /* TODO: create Store */
-
- return res;
+static void TEMPLATE_after_ra(void *self) {
+ /* Some stuff you need to do immediatly after register allocation */
}
-/**
- * Create a Load for a Spill
- */
-static ir_node *TEMPLATE_lower_reload(void *self, ir_node *reload) {
- TEMPLATE_code_gen_t *cg = self;
- dbg_info *dbg = get_irn_dbg_info(reload);
- ir_node *block = get_nodes_block(reload);
- ir_node *ptr = get_irg_frame(cg->irg);
- ir_mode *mode = get_irn_mode(reload);
- ir_node *pred = get_irn_n(reload, 0);
- tarval *tv;
- ir_node *res;
- /* TODO: create Load */
-
- return res;
-}
/**
* Emits the code, closes the output file and frees
static void TEMPLATE_emit_and_done(void *self) {
TEMPLATE_code_gen_t *cg = self;
ir_graph *irg = cg->irg;
- FILE *out = cg->out;
+ FILE *out = cg->isa->out;
if (cg->emit_decls) {
- TEMPLATE_gen_decls(cg->out);
+ TEMPLATE_gen_decls(out);
cg->emit_decls = 0;
}
free(self);
}
-static void *TEMPLATE_cg_init(FILE *F, const be_irg_t *birg);
+static void *TEMPLATE_cg_init(const be_irg_t *birg);
static const arch_code_generator_if_t TEMPLATE_code_gen_if = {
TEMPLATE_cg_init,
TEMPLATE_prepare_graph,
TEMPLATE_before_sched, /* before scheduling hook */
TEMPLATE_before_ra, /* before register allocation hook */
- TEMPLATE_lower_spill,
- TEMPLATE_lower_reload,
+ TEMPLATE_after_ra, /* after register allocation hook */
TEMPLATE_emit_and_done
};
/**
* Initializes the code generator.
*/
-static void *TEMPLATE_cg_init(FILE *F, const be_irg_t *birg) {
+static void *TEMPLATE_cg_init(const be_irg_t *birg) {
TEMPLATE_isa_t *isa = (TEMPLATE_isa_t *)birg->main_env->arch_env->isa;
TEMPLATE_code_gen_t *cg = xmalloc(sizeof(*cg));
cg->impl = &TEMPLATE_code_gen_if;
cg->irg = birg->irg;
cg->reg_set = new_set(TEMPLATE_cmp_irn_reg_assoc, 1024);
- cg->mod = firm_dbg_register("firm.be.TEMPLATE.cg");
- cg->out = F;
cg->arch_env = birg->main_env->arch_env;
+ cg->isa = isa;
cg->birg = birg;
+ FIRM_DBG_REGISTER(cg->mod, "firm.be.TEMPLATE.cg");
isa->num_codegens++;
/**
* Initializes the backend ISA and opens the output file.
*/
-static void *TEMPLATE_init(void) {
+static void *TEMPLATE_init(FILE *outfile) {
static int inited = 0;
TEMPLATE_isa_t *isa;
isa = xcalloc(1, sizeof(*isa));
memcpy(isa, &TEMPLATE_isa_template, sizeof(*isa));
+ isa->out = outfile;
+
TEMPLATE_register_init(isa);
TEMPLATE_create_opcodes();
ir_mode *mode;
int i, n = get_method_n_params(method_type);
const arch_register_t *reg;
+ be_abi_call_flags_t call_flags;
+
+ /* set abi flags for calls */
+ call_flags.bits.left_to_right = 0;
+ call_flags.bits.store_args_sequential = 1;
+ call_flags.bits.try_omit_fp = 1;
+ call_flags.bits.fp_free = 0;
+ call_flags.bits.call_has_imm = 1;
/* get the between type and the frame pointer save entity */
between_type = get_between_type();
/* set stack parameter passing style */
- be_abi_call_set_flags(abi, BE_ABI_NONE, between_type);
+ be_abi_call_set_flags(abi, call_flags, between_type);
for (i = 0; i < n; i++) {
/* TODO: implement register parameter: */
/* be_abi_call_param_reg(abi, i, reg); */
/* default: all parameters on stack */
- be_abi_call_param_stack(abi, i);
+ be_abi_call_param_stack(abi, i, 4, 0, 0);
}
/* TODO: set correct return register */
return &TEMPLATE_sched_selector;
}
+/**
+ * Returns the necessary byte alignment for storing a register of given class.
+ */
+static int TEMPLATE_get_reg_class_alignment(const void *self, const arch_register_class_t *cls) {
+ ir_mode *mode = arch_register_class_mode(cls);
+ return get_mode_size_bytes(mode);
+}
+
#ifdef WITH_LIBCORE
static void TEMPLATE_register_options(lc_opt_entry_t *ent)
{
#endif /* WITH_LIBCORE */
const arch_isa_if_t TEMPLATE_isa_if = {
-#ifdef WITH_LIBCORE
- TEMPLATE_register_options,
-#endif
TEMPLATE_init,
TEMPLATE_done,
TEMPLATE_get_n_reg_class,
TEMPLATE_get_irn_handler,
TEMPLATE_get_code_generator_if,
TEMPLATE_get_list_sched_selector,
+ TEMPLATE_get_reg_class_alignment,
+#ifdef WITH_LIBCORE
+ TEMPLATE_register_options
+#endif
};
projects / libfirm / blobdiff