Handle replacement of ia32_Conv_I2I by Cwtl as peephole optimisation instead of handl...

[libfirm] / ir / be / TEMPLATE / TEMPLATE_transform.c

diff --git a/ir/be/TEMPLATE/TEMPLATE_transform.c b/ir/be/TEMPLATE/TEMPLATE_transform.c
index 7b9ddad..0df5418 100644 (file)
--- a/ir/be/TEMPLATE/TEMPLATE_transform.c
+++ b/ir/be/TEMPLATE/TEMPLATE_transform.c
@@ -1,8 +1,28 @@
-/* The codegenrator (transform FIRM into TEMPLATE FIRM */
-/* $Id$ */
-#ifdef HAVE_CONFIG_H
-#include <config.h>
-#endif
+/*
+ * Copyright (C) 1995-2008 University of Karlsruhe.  All right reserved.
+ *
+ * This file is part of libFirm.
+ *
+ * This file may be distributed and/or modified under the terms of the
+ * GNU General Public License version 2 as published by the Free Software
+ * Foundation and appearing in the file LICENSE.GPL included in the
+ * packaging of this file.
+ *
+ * Licensees holding valid libFirm Professional Edition licenses may use
+ * this file in accordance with the libFirm Commercial License.
+ * Agreement provided with the Software.
+ *
+ * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
+ * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE.
+ */
+
+/**
+ * @file
+ * @brief   code selection (transform FIRM into TEMPLATE FIRM)
+ * @version $Id$
+ */
+#include "config.h"
 
 #include "irnode_t.h"
 #include "irgraph_t.h"
@@ -11,7 +31,6 @@
 #include "iredges.h"
 #include "irvrfy.h"
 #include "ircons.h"
-#include "dbginfo.h"
 #include "iropt_t.h"
 #include "debug.h"
 
@@ -19,7 +38,7 @@
 #include "bearch_TEMPLATE_t.h"
 
 #include "TEMPLATE_nodes_attr.h"
-#include "../arch/archop.h"     /* we need this for Min and Max nodes */
+#include "archop.h"
 #include "TEMPLATE_transform.h"
 #include "TEMPLATE_new_nodes.h"
 #include "TEMPLATE_map_regs.h"
@@ -49,7 +68,7 @@ extern ir_op *get_op_Mulh(void);
  * @return the created TEMPLATE Add node
  */
 static ir_node *gen_Add(TEMPLATE_transform_env_t *env, ir_node *op1, ir_node *op2) {
-       return new_rd_TEMPLATE_Add(env->dbg, env->irg, env->block, op1, op2, env->mode);
+       return new_bd_TEMPLATE_Add(env->dbg, env->block, op1, op2, env->mode);
 }
 
 
@@ -66,10 +85,10 @@ static ir_node *gen_Add(TEMPLATE_transform_env_t *env, ir_node *op1, ir_node *op
  */
 static ir_node *gen_Mul(TEMPLATE_transform_env_t *env, ir_node *op1, ir_node *op2) {
        if (mode_is_float(env->mode)) {
-               return new_rd_TEMPLATE_fMul(env->dbg, env->irg, env->block, op1, op2, env->mode);
+               return new_bd_TEMPLATE_fMul(env->dbg, env->block, op1, op2, env->mode);
        }
        else {
-               return new_rd_TEMPLATE_Mul(env->dbg, env->irg, env->block, op1, op2, env->mode);
+               return new_bd_TEMPLATE_Mul(env->dbg, env->block, op1, op2, env->mode);
        }
 }
 
@@ -86,7 +105,7 @@ static ir_node *gen_Mul(TEMPLATE_transform_env_t *env, ir_node *op1, ir_node *op
  * @return the created TEMPLATE And node
  */
 static ir_node *gen_And(TEMPLATE_transform_env_t *env, ir_node *op1, ir_node *op2) {
-       return new_rd_TEMPLATE_And(env->dbg, env->irg, env->block, op1, op2, env->mode);
+       return new_bd_TEMPLATE_And(env->dbg, env->block, op1, op2, env->mode);
 }
 
 
@@ -102,7 +121,7 @@ static ir_node *gen_And(TEMPLATE_transform_env_t *env, ir_node *op1, ir_node *op
  * @return the created TEMPLATE Or node
  */
 static ir_node *gen_Or(TEMPLATE_transform_env_t *env, ir_node *op1, ir_node *op2) {
-       return new_rd_TEMPLATE_Or(env->dbg, env->irg, env->block, op1, op2, env->mode);
+       return new_bd_TEMPLATE_Or(env->dbg, env->block, op1, op2, env->mode);
 }
 
 
@@ -118,7 +137,7 @@ static ir_node *gen_Or(TEMPLATE_transform_env_t *env, ir_node *op1, ir_node *op2
  * @return the created TEMPLATE Eor node
  */
 static ir_node *gen_Eor(TEMPLATE_transform_env_t *env, ir_node *op1, ir_node *op2) {
-       return new_rd_TEMPLATE_Eor(env->dbg, env->irg, env->block, op1, op2, env->mode);
+       return new_bd_TEMPLATE_Eor(env->dbg, env->block, op1, op2, env->mode);
 }
 
 
@@ -135,10 +154,10 @@ static ir_node *gen_Eor(TEMPLATE_transform_env_t *env, ir_node *op1, ir_node *op
  */
 static ir_node *gen_Sub(TEMPLATE_transform_env_t *env, ir_node *op1, ir_node *op2) {
        if (mode_is_float(env->mode)) {
-               return new_rd_TEMPLATE_fSub(env->dbg, env->irg, env->block, op1, op2, env->mode);
+               return new_bd_TEMPLATE_fSub(env->dbg, env->block, op1, op2, env->mode);
        }
        else {
-               return new_rd_TEMPLATE_Sub(env->dbg, env->irg, env->block, op1, op2, env->mode);
+               return new_bd_TEMPLATE_Sub(env->dbg, env->block, op1, op2, env->mode);
        }
 }
 
@@ -155,7 +174,7 @@ static ir_node *gen_Sub(TEMPLATE_transform_env_t *env, ir_node *op1, ir_node *op
  * @return the created TEMPLATE fDiv node
  */
 static ir_node *gen_Quot(TEMPLATE_transform_env_t *env, ir_node *op1, ir_node *op2) {
-       return new_rd_TEMPLATE_fDiv(env->dbg, env->irg, env->block, op1, op2, env->mode);
+       return new_bd_TEMPLATE_fDiv(env->dbg, env->block, op1, op2, env->mode);
 }
 
 
@@ -171,7 +190,7 @@ static ir_node *gen_Quot(TEMPLATE_transform_env_t *env, ir_node *op1, ir_node *o
  * @return the created TEMPLATE Shl node
  */
 static ir_node *gen_Shl(TEMPLATE_transform_env_t *env, ir_node *op1, ir_node *op2) {
-       return new_rd_TEMPLATE_Shl(env->dbg, env->irg, env->block, op1, op2, env->mode);
+       return new_bd_TEMPLATE_Shl(env->dbg, env->block, op1, op2, env->mode);
 }
 
 
@@ -187,7 +206,7 @@ static ir_node *gen_Shl(TEMPLATE_transform_env_t *env, ir_node *op1, ir_node *op
  * @return the created TEMPLATE Shr node
  */
 static ir_node *gen_Shr(TEMPLATE_transform_env_t *env, ir_node *op1, ir_node *op2) {
-       return new_rd_TEMPLATE_Shr(env->dbg, env->irg, env->block, op1, op2, env->mode);
+       return new_bd_TEMPLATE_Shr(env->dbg, env->block, op1, op2, env->mode);
 }
 
 
@@ -204,9 +223,9 @@ static ir_node *gen_Shr(TEMPLATE_transform_env_t *env, ir_node *op1, ir_node *op
  */
 static ir_node *gen_Minus(TEMPLATE_transform_env_t *env, ir_node *op) {
        if (mode_is_float(env->mode)) {
-               return new_rd_TEMPLATE_fMinus(env->dbg, env->irg, env->block, op, env->mode);
+               return new_bd_TEMPLATE_fMinus(env->dbg, env->block, op, env->mode);
        }
-       return new_rd_TEMPLATE_Minus(env->dbg, env->irg, env->block, op, env->mode);
+       return new_bd_TEMPLATE_Minus(env->dbg, env->block, op, env->mode);
 }
 
 
@@ -222,7 +241,7 @@ static ir_node *gen_Minus(TEMPLATE_transform_env_t *env, ir_node *op) {
  * @return the created TEMPLATE Not node
  */
 static ir_node *gen_Not(TEMPLATE_transform_env_t *env, ir_node *op) {
-       return new_rd_TEMPLATE_Not(env->dbg, env->irg, env->block, op, env->mode);
+       return new_bd_TEMPLATE_Not(env->dbg, env->block, op, env->mode);
 }
 
 
@@ -240,9 +259,9 @@ static ir_node *gen_Load(TEMPLATE_transform_env_t *env) {
        ir_node *node = env->irn;
 
        if (mode_is_float(env->mode)) {
-               return new_rd_TEMPLATE_fLoad(env->dbg, env->irg, env->block, get_Load_ptr(node), get_Load_mem(node), env->mode);
+               return new_bd_TEMPLATE_fLoad(env->dbg, env->block, get_Load_ptr(node), get_Load_mem(node), env->mode);
        }
-       return new_rd_TEMPLATE_Load(env->dbg, env->irg, env->block, get_Load_ptr(node), get_Load_mem(node), env->mode);
+       return new_bd_TEMPLATE_Load(env->dbg, env->block, get_Load_ptr(node), get_Load_mem(node), env->mode);
 }
 
 
@@ -260,9 +279,9 @@ static ir_node *gen_Store(TEMPLATE_transform_env_t *env) {
        ir_node *node = env->irn;
 
        if (mode_is_float(env->mode)) {
-               return new_rd_TEMPLATE_fStore(env->dbg, env->irg, env->block, get_Store_ptr(node), get_Store_value(node), get_Store_mem(node), env->mode);
+               return new_bd_TEMPLATE_fStore(env->dbg, env->block, get_Store_ptr(node), get_Store_value(node), get_Store_mem(node), env->mode);
        }
-       return new_rd_TEMPLATE_Store(env->dbg, env->irg, env->block, get_Store_ptr(node), get_Store_value(node), get_Store_mem(node), env->mode);
+       return new_bd_TEMPLATE_Store(env->dbg, env->block, get_Store_ptr(node), get_Store_value(node), get_Store_mem(node), env->mode);
 }
 
 
@@ -287,10 +306,13 @@ static ir_node *gen_Store(TEMPLATE_transform_env_t *env) {
  * @param env     the debug module
  */
 void TEMPLATE_transform_node(ir_node *node, void *env) {
+#ifdef DEBUG_libfirm
        TEMPLATE_code_gen_t *cgenv = (TEMPLATE_code_gen_t *)env;
+#endif
        ir_opcode code             = get_irn_opcode(node);
        ir_node *asm_node          = NULL;
        TEMPLATE_transform_env_t tenv;
+       (void) env;
 
        if (is_Block(node))
                return;
@@ -299,7 +321,9 @@ void TEMPLATE_transform_node(ir_node *node, void *env) {
        tenv.dbg      = get_irn_dbg_info(node);
        tenv.irg      = current_ir_graph;
        tenv.irn      = node;
+#ifdef DEBUG_libfirm
        tenv.mod      = cgenv->mod;
+#endif
        tenv.mode     = get_irn_mode(node);
 
 #define UNOP(a)        case iro_##a: asm_node = gen_##a(&tenv, get_##a##_op(node)); break
@@ -376,8 +400,8 @@ void TEMPLATE_transform_node(ir_node *node, void *env) {
 
                default:
                        if (get_irn_op(node) == get_op_Max() ||
-                               get_irn_op(node) == get_op_Min() ||
-                               get_irn_op(node) == get_op_Mulh())
+                           get_irn_op(node) == get_op_Min() ||
+                           is_Mulh(node))
                        {
                                /* TODO: implement */
                                /* ignore for now  */