/*
- * Project: libFIRM
- * File name: ir/arch/archop.c
- * Purpose: Architecture dependand IR operations
- * Author:
- * Created:
- * CVS-ID: $Id$
- * Copyright: (c) 1998-2005 Universität Karlsruhe
- * Licence: This file protected by GPL - GNU GENERAL PUBLIC LICENSE.
+ * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
+ *
+ * This file is part of libFirm.
+ *
+ * This file may be distributed and/or modified under the terms of the
+ * GNU General Public License version 2 as published by the Free Software
+ * Foundation and appearing in the file LICENSE.GPL included in the
+ * packaging of this file.
+ *
+ * Licensees holding valid libFirm Professional Edition licenses may use
+ * this file in accordance with the libFirm Commercial License.
+ * Agreement provided with the Software.
+ *
+ * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
+ * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE.
+ */
+
+/**
+ * @file
+ * @brief architecture dependant IR operations
+ * @version $Id$
*/
#ifdef HAVE_CONFIG_H
#include "config.h"
#include "ircons_t.h"
#include "iropt_t.h"
#include "firm_common_t.h"
-#include "irvrfy.h"
+#include "irvrfy_t.h"
#include "iropt_dbg.h"
#include "archop.h"
/**
* Returns an equivalent node for a Min/Max node.
- * We do not allow Exeptions in our Min/Max, so there will be always
+ * We do not allow Exceptions in our Min/Max, so there will be always
* an result.
* The problem is Min(NaN, NaN) == NaN ???.
*/
b = get_binop_right(n);
if (a == b) {
- DBG_OPT_ALGSIM0(n, a);
+ DBG_OPT_ALGSIM0(n, a, FS_OPT_MIN_MAX_EQ);
return a;
}
#define equivalent_node_Max equivalent_node_MinMax
/*
- * Create Min and Mux from Mux nodes
+ * Create Min and Max from Mux nodes
*/
ir_node *arch_transform_node_Mux(ir_node *n)
{
a, b,
get_irn_mode(n));
- DBG_OPT_ALGSIM1(oldn, cmp, proj, n);
+ DBG_OPT_ALGSIM1(oldn, cmp, proj, n, FS_OPT_MUX_TO_MIN);
return n;
}
else if (a == f && b == t) {
a, b,
get_irn_mode(n));
- DBG_OPT_ALGSIM1(oldn, cmp, proj, n);
+ DBG_OPT_ALGSIM1(oldn, cmp, proj, n, FS_OPT_MUX_TO_MAX);
return n;
}
}
a, b,
get_irn_mode(n));
- DBG_OPT_ALGSIM1(oldn, cmp, proj, n);
+ DBG_OPT_ALGSIM1(oldn, cmp, proj, n, FS_OPT_MUX_TO_MAX);
return n;
}
else if (a == f && b == t) {
a, b,
get_irn_mode(n));
- DBG_OPT_ALGSIM1(oldn, cmp, proj, n);
+ DBG_OPT_ALGSIM1(oldn, cmp, proj, n, FS_OPT_MUX_TO_MIN);
return n;
}
}
return n;
}
+/**
+ * verify a MinMax node
+ */
+static int verify_node_MinMax(ir_node *n, ir_graph *irg) {
+ ir_mode *mymode = get_irn_mode(n);
+ ir_mode *op1mode = get_irn_mode(get_binop_left(n));
+ ir_mode *op2mode = get_irn_mode(get_binop_right(n));
+ (void) irg;
+
+ ASSERT_AND_RET(
+ /* MinMax: BB x numP x numP --> numP */
+ op1mode == mymode &&
+ op2mode == mymode &&
+ mode_is_data(mymode),
+ "Min or Max node", 0
+ );
+ return 1;
+}
+
/*
* initialize the ops.
*/
void firm_archops_init(const arch_ops_info *info)
{
+ ir_op_ops ops;
+
if (! info)
info = &default_settings;
memcpy(&settings, info, sizeof(settings));
if (info->enabled_ops & ARCH_OPS_MINMAX) {
- op_Min = new_ir_op(get_next_ir_opcode(), "Min", op_pin_state_floats, irop_flag_commutative, oparity_binary, 0, 0);
- op_Min->computed_value = computed_value_Min;
- op_Min->equivalent_node = equivalent_node_Min;
+ memset(&ops, 0, sizeof(ops));
+
+ ops.computed_value = computed_value_Min;
+ ops.equivalent_node = equivalent_node_Min;
+ ops.verify_node = verify_node_MinMax;
+
+ op_Min = new_ir_op(get_next_ir_opcode(), "Min", op_pin_state_floats, irop_flag_commutative, oparity_binary, 0, 0, &ops);
+
+ ops.computed_value = computed_value_Max;
+ ops.equivalent_node = equivalent_node_Max;
+ ops.verify_node = verify_node_MinMax;
- op_Max = new_ir_op(get_next_ir_opcode(), "Max", op_pin_state_floats, irop_flag_commutative, oparity_binary, 0, 0);
- op_Max->computed_value = computed_value_Max;
- op_Max->equivalent_node = equivalent_node_Max;
+ op_Max = new_ir_op(get_next_ir_opcode(), "Max", op_pin_state_floats, irop_flag_commutative, oparity_binary, 0, 0, &ops);
}
}