+ for (j = 2, i = 0; i < n_params; ++i) {
+ ir_node *pred = get_Call_param(node, i);
+ ir_mode *pred_mode = get_irn_mode(pred);
+
+ if (pred_mode == env->high_signed || pred_mode == env->high_unsigned) {
+ const lower64_entry_t *pred_entry = get_node_entry(pred);
+ if (env->params->little_endian) {
+ in[j++] = pred_entry->low_word;
+ in[j++] = pred_entry->high_word;
+ } else {
+ in[j++] = pred_entry->high_word;
+ in[j++] = pred_entry->low_word;
+ }
+ } else {
+ in[j++] = pred;
+ }
+ }
+
+ set_irn_in(node, j, in);
+
+ /* find results T */
+ resproj = NULL;
+ foreach_out_edge(node, edge) {
+ ir_node *proj = get_edge_src_irn(edge);
+ if (!is_Proj(proj))
+ continue;
+ if (get_Proj_proj(proj) == pn_Call_T_result) {
+ resproj = proj;
+ break;
+ }
+ }
+ if (resproj == NULL)
+ return;
+
+ /* fix the results */
+ foreach_out_edge_safe(resproj, edge) {
+ ir_node *proj = get_edge_src_irn(edge);
+ ir_mode *proj_mode = get_irn_mode(proj);
+ ir_mode *mode_l = env->low_unsigned;
+ ir_node *pred;
+ long proj_nr;
+ ir_mode *mode_h;
+ ir_node *res_low;
+ ir_node *res_high;
+ dbg_info *dbg;
+
+ if (!is_Proj(proj))
+ continue;
+ pred = get_Proj_pred(proj);
+ proj_nr = get_Proj_proj(proj);
+
+ if (proj_mode == env->high_signed) {
+ mode_h = env->low_signed;
+ } else if (proj_mode == env->high_unsigned) {
+ mode_h = env->low_unsigned;
+ } else {
+ long new_nr = res_numbers[proj_nr];
+ set_Proj_proj(proj, new_nr);
+ continue;
+ }
+
+ dbg = get_irn_dbg_info(proj);
+ if (env->params->little_endian) {
+ res_low = new_rd_Proj(dbg, pred, mode_l, res_numbers[proj_nr]);
+ res_high = new_rd_Proj(dbg, pred, mode_h, res_numbers[proj_nr] + 1);
+ } else {
+ res_high = new_rd_Proj(dbg, pred, mode_h, res_numbers[proj_nr]);
+ res_low = new_rd_Proj(dbg, pred, mode_l, res_numbers[proj_nr] + 1);
+ }
+ ir_set_dw_lowered(proj, res_low, res_high);
+ }
+}
+
+/**
+ * Translate an Unknown into two.
+ */
+static void lower_Unknown(ir_node *node, ir_mode *mode)
+{
+ ir_mode *low_mode = env->low_unsigned;
+ ir_graph *irg = get_irn_irg(node);
+ ir_node *res_low = new_r_Unknown(irg, low_mode);
+ ir_node *res_high = new_r_Unknown(irg, mode);
+ ir_set_dw_lowered(node, res_low, res_high);
+}
+
+/**
+ * Translate a Bad into two.
+ */
+static void lower_Bad(ir_node *node, ir_mode *mode)
+{
+ ir_mode *low_mode = env->low_unsigned;
+ ir_graph *irg = get_irn_irg(node);
+ ir_node *res_low = new_r_Bad(irg, low_mode);
+ ir_node *res_high = new_r_Bad(irg, mode);
+ ir_set_dw_lowered(node, res_low, res_high);
+}
+
+/**
+ * Translate a Phi.
+ *
+ * First step: just create two templates
+ */
+static void lower_Phi(ir_node *phi)
+{
+ ir_mode *mode = get_irn_mode(phi);
+ int i;
+ int arity;
+ ir_node **in_l;
+ ir_node **in_h;
+ ir_node *unk_l;
+ ir_node *unk_h;
+ ir_node *phi_l;
+ ir_node *phi_h;
+ dbg_info *dbg;
+ ir_node *block;
+ ir_graph *irg;
+ ir_mode *mode_l;
+ ir_mode *mode_h;
+
+ /* enqueue predecessors */
+ arity = get_Phi_n_preds(phi);
+ for (i = 0; i < arity; ++i) {
+ ir_node *pred = get_Phi_pred(phi, i);
+ pdeq_putr(env->waitq, pred);
+ }
+
+ if (mode != env->high_signed && mode != env->high_unsigned)
+ return;
+
+ /* first create a new in array */
+ NEW_ARR_A(ir_node *, in_l, arity);
+ NEW_ARR_A(ir_node *, in_h, arity);
+ irg = get_irn_irg(phi);
+ mode_l = env->low_unsigned;
+ mode_h = mode == env->high_signed ? env->low_signed : env->low_unsigned;
+ unk_l = new_r_Dummy(irg, mode_l);
+ unk_h = new_r_Dummy(irg, mode_h);
+ for (i = 0; i < arity; ++i) {
+ in_l[i] = unk_l;
+ in_h[i] = unk_h;
+ }
+
+ dbg = get_irn_dbg_info(phi);
+ block = get_nodes_block(phi);
+ phi_l = new_rd_Phi(dbg, block, arity, in_l, mode_l);
+ phi_h = new_rd_Phi(dbg, block, arity, in_h, mode_h);
+
+ ir_set_dw_lowered(phi, phi_l, phi_h);
+
+ /* remember that we need to fixup the predecessors later */
+ ARR_APP1(ir_node*, env->lowered_phis, phi);
+}
+
+static void fixup_phi(ir_node *phi)
+{
+ const lower64_entry_t *entry = get_node_entry(phi);
+ ir_node *phi_l = entry->low_word;
+ ir_node *phi_h = entry->high_word;
+ int arity = get_Phi_n_preds(phi);
+ int i;
+
+ /* exchange phi predecessors which are lowered by now */
+ for (i = 0; i < arity; ++i) {
+ ir_node *pred = get_Phi_pred(phi, i);
+ const lower64_entry_t *pred_entry = get_node_entry(pred);
+
+ set_Phi_pred(phi_l, i, pred_entry->low_word);
+ set_Phi_pred(phi_h, i, pred_entry->high_word);
+ }
+}
+
+/**
+ * Translate a Mux.
+ */
+static void lower_Mux(ir_node *mux, ir_mode *mode)
+{
+ ir_node *truen = get_Mux_true(mux);
+ ir_node *falsen = get_Mux_false(mux);
+ ir_node *sel = get_Mux_sel(mux);
+ const lower64_entry_t *true_entry = get_node_entry(truen);
+ const lower64_entry_t *false_entry = get_node_entry(falsen);
+ ir_node *true_l = true_entry->low_word;
+ ir_node *true_h = true_entry->high_word;
+ ir_node *false_l = false_entry->low_word;
+ ir_node *false_h = false_entry->high_word;
+ dbg_info *dbgi = get_irn_dbg_info(mux);
+ ir_node *block = get_nodes_block(mux);
+ ir_node *res_low
+ = new_rd_Mux(dbgi, block, sel, false_l, true_l, env->low_unsigned);
+ ir_node *res_high
+ = new_rd_Mux(dbgi, block, sel, false_h, true_h, mode);
+ ir_set_dw_lowered(mux, res_low, res_high);
+}
+
+/**
+ * Translate an ASM node.
+ */
+static void lower_ASM(ir_node *asmn, ir_mode *mode)
+{
+ ir_mode *high_signed = env->high_signed;
+ ir_mode *high_unsigned = env->high_unsigned;
+ int n_outs = get_ASM_n_output_constraints(asmn);
+ ir_asm_constraint *output_constraints = get_ASM_output_constraints(asmn);
+ ir_asm_constraint *input_constraints = get_ASM_input_constraints(asmn);
+ unsigned n_64bit_outs = 0;
+
+ (void)mode;
+
+ for (int i = get_irn_arity(asmn) - 1; i >= 0; --i) {
+ ir_node *op = get_irn_n(asmn, i);
+ ir_mode *op_mode = get_irn_mode(op);
+ if (op_mode == high_signed || op_mode == high_unsigned) {
+ panic("lowering ASM 64bit input unimplemented");
+ }
+ }
+
+ for (int o = 0; o < n_outs; ++o) {
+ const ir_asm_constraint *constraint = &output_constraints[o];
+ if (constraint->mode == high_signed || constraint->mode == high_unsigned) {
+ const char *constr = get_id_str(constraint->constraint);
+ ++n_64bit_outs;
+ /* TODO: How to do this architecture neutral? This is very
+ * i386 specific... */
+ if (constr[0] != '=' || constr[1] != 'A') {
+ panic("lowering ASM 64bit output only supports '=A' currently");
+ }
+ }
+ }
+
+ if (n_64bit_outs == 0)
+ return;
+
+ dbg_info *dbgi = get_irn_dbg_info(asmn);
+ ir_node *block = get_nodes_block(asmn);
+ ir_node *mem = get_ASM_mem(asmn);
+ int new_n_outs = 0;
+ int n_clobber = get_ASM_n_clobbers(asmn);
+ long *proj_map = ALLOCAN(long, n_outs);
+ ident **clobbers = get_ASM_clobbers(asmn);
+ ident *asm_text = get_ASM_text(asmn);
+ ir_asm_constraint *new_outputs
+ = ALLOCAN(ir_asm_constraint, n_outs+n_64bit_outs);
+ ir_node *new_asm;
+
+ for (int o = 0; o < n_outs; ++o) {
+ const ir_asm_constraint *constraint = &output_constraints[o];
+ if (constraint->mode == high_signed || constraint->mode == high_unsigned) {
+ new_outputs[new_n_outs].pos = constraint->pos;
+ new_outputs[new_n_outs].constraint = new_id_from_str("=a");
+ new_outputs[new_n_outs].mode = env->low_unsigned;
+ proj_map[o] = new_n_outs;
+ ++new_n_outs;
+ new_outputs[new_n_outs].pos = constraint->pos;
+ new_outputs[new_n_outs].constraint = new_id_from_str("=d");
+ if (constraint->mode == high_signed)
+ new_outputs[new_n_outs].mode = env->low_signed;
+ else
+ new_outputs[new_n_outs].mode = env->low_unsigned;
+ ++new_n_outs;
+ } else {
+ new_outputs[new_n_outs] = *constraint;
+ proj_map[o] = new_n_outs;
+ ++new_n_outs;
+ }
+ }
+ assert(new_n_outs == n_outs+(int)n_64bit_outs);
+
+ int n_inputs = get_ASM_n_inputs(asmn);
+ ir_node **new_ins = ALLOCAN(ir_node*, n_inputs);
+ for (int i = 0; i < n_inputs; ++i)
+ new_ins[i] = get_ASM_input(asmn, i);
+
+ new_asm = new_rd_ASM(dbgi, block, mem, n_inputs, new_ins, input_constraints,
+ new_n_outs, new_outputs, n_clobber, clobbers,
+ asm_text);
+
+ foreach_out_edge_safe(asmn, edge) {
+ ir_node *proj = get_edge_src_irn(edge);
+ ir_mode *proj_mode = get_irn_mode(proj);
+ long pn;
+
+ if (!is_Proj(proj))
+ continue;
+ pn = get_Proj_proj(proj);
+
+ if (pn < n_outs)
+ pn = proj_map[pn];
+ else
+ pn = new_n_outs + pn - n_outs;
+
+ if (proj_mode == high_signed || proj_mode == high_unsigned) {
+ ir_mode *high_mode
+ = proj_mode == high_signed ? env->low_signed : env->low_unsigned;
+ ir_node *np_low = new_r_Proj(new_asm, env->low_unsigned, pn);
+ ir_node *np_high = new_r_Proj(new_asm, high_mode, pn+1);
+ ir_set_dw_lowered(proj, np_low, np_high);
+ } else {
+ ir_node *np = new_r_Proj(new_asm, proj_mode, pn);
+ exchange(proj, np);
+ }
+ }
+}
+
+/**
+ * Lower the builtin type to its higher part.
+ *
+ * @param mtp the builtin type to lower
+ *
+ * @return the lowered type
+ */
+static ir_type *lower_Builtin_type_high(ir_type *mtp)
+{
+ ir_type *res;
+ size_t i;
+ size_t n_params;
+ size_t n_results;
+ bool must_be_lowered;
+
+ res = pmap_get(ir_type, lowered_builtin_type_high, mtp);
+ if (res != NULL)
+ return res;
+
+ n_params = get_method_n_params(mtp);
+ n_results = get_method_n_ress(mtp);
+ must_be_lowered = false;
+
+ /* check for double word parameter */
+ for (i = n_params; i > 0;) {
+ ir_type *tp = get_method_param_type(mtp, --i);
+
+ if (is_Primitive_type(tp)) {
+ ir_mode *mode = get_type_mode(tp);
+
+ if (mode == env->high_signed || mode == env->high_unsigned) {
+ must_be_lowered = true;
+ break;
+ }
+ }
+ }
+
+ if (!must_be_lowered) {
+ set_type_link(mtp, NULL);
+ return mtp;
+ }
+
+ res = new_d_type_method(n_params, n_results, get_type_dbg_info(mtp));
+
+ /* set param types and result types */
+ for (i = 0; i < n_params; ++i) {
+ ir_type *tp = get_method_param_type(mtp, i);