- return;
- } /* if */
- } /* if */
- lower_Shiftop(node, mode, env);
-} /* lower_Shl */
-
-/**
- * Translate a Shrs and handle special cases.
- */
-static void lower_Shrs(ir_node *node, ir_mode *mode, lower_env_t *env)
-{
- ir_graph *irg = get_irn_irg(node);
- ir_node *right = get_Shrs_right(node);
-
- if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
- tarval *tv = get_Const_tarval(right);
-
- if (tarval_is_long(tv) &&
- get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
- ir_node *block = get_nodes_block(node);
- ir_node *left = get_Shrs_left(node);
- ir_mode *low_unsigned = env->low_unsigned;
- long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
- unsigned idx = get_irn_idx(left);
- ir_node *left_unsigned = left;
- ir_node *low;
- ir_node *c;
-
- left = env->entries[idx]->high_word;
- if (left == NULL) {
- /* not ready yet, wait */
- pdeq_putr(env->waitq, node);
- return;
- }
-
- idx = get_irn_idx(node);
- /* convert high word into low_unsigned mode if necessary */
- if (get_irn_mode(left_unsigned) != low_unsigned)
- left_unsigned = new_r_Conv(block, left, low_unsigned);
-
- if (shf_cnt > 0) {
- c = new_r_Const_long(irg, low_unsigned, shf_cnt);
- low = new_r_Shrs(block, left_unsigned, c, low_unsigned);
- } else {
- low = left_unsigned;
- } /* if */
- /* low word is expected to have low_unsigned */
- env->entries[idx]->low_word = new_r_Conv(block, low, low_unsigned);
-
- c = new_r_Const_long(irg, low_unsigned,
- get_mode_size_bits(mode) - 1);
- env->entries[idx]->high_word = new_r_Shrs(block, left, c, mode);
-
- return;
- } /* if */
- } /* if */
- lower_Shiftop(node, mode, env);
-} /* lower_Shrs */
-
-/**
- * Rebuild Rotl nodes into Or(Shl, Shr) and prepare all nodes.
- */
-static void prepare_links_and_handle_rotl(ir_node *node, void *env)
-{
- lower_env_t *lenv = env;
-
- if (is_Rotl(node)) {
- ir_mode *mode = get_irn_op_mode(node);
- if (mode == lenv->high_signed ||
- mode == lenv->high_unsigned) {
- ir_node *right = get_Rotl_right(node);
- ir_node *left, *shl, *shr, *or, *block, *sub, *c;
- ir_mode *omode, *rmode;
- ir_graph *irg;
- dbg_info *dbg;
- optimization_state_t state;
-
- if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
- tarval *tv = get_Const_tarval(right);
-
- if (tarval_is_long(tv) &&
- get_tarval_long(tv) == (long)get_mode_size_bits(mode)) {
- /* will be optimized in lower_Rotl() */
- return;
- }
- }
-
- /* replace the Rotl(x,y) by an Or(Shl(x,y), Shr(x,64-y)) and lower those */
- irg = get_irn_irg(node);
- dbg = get_irn_dbg_info(node);
- omode = get_irn_mode(node);
- left = get_Rotl_left(node);
- block = get_nodes_block(node);
- shl = new_rd_Shl(dbg, block, left, right, omode);
- rmode = get_irn_mode(right);
- c = new_r_Const_long(irg, rmode, get_mode_size_bits(omode));
- sub = new_rd_Sub(dbg, block, c, right, rmode);
- shr = new_rd_Shr(dbg, block, left, sub, omode);
-
- /* optimization must be switched off here, or we will get the Rotl back */
- save_optimization_state(&state);
- set_opt_algebraic_simplification(0);
- or = new_rd_Or(dbg, block, shl, shr, omode);
- restore_optimization_state(&state);
-
- exchange(node, or);
-
- /* do lowering on the new nodes */
- prepare_links(shl, env);
- prepare_links(c, env);
- prepare_links(sub, env);
- prepare_links(shr, env);
- prepare_links(or, env);
- }